[PATCH v4 0/2] arch/riscv: Add bitrev.h file to support rev8 and brev8

[PATCH v4 0/2] arch/riscv: Add bitrev.h file to support rev8 and brev8

[Jinjie Ruan]

Add bitrev.h file to support rev8 and brev8 for riscv.

Tested functionally on riscv64 QEMU with:
	"-M virt,acpi=on,zbkb=true,zbb=true"

Changes in v4:
- Update the riscv implementation as David suggested.
- Add new config called NEED_BYTE_REV_TABLE as David suggested to avoid
  bloating the .data section for architectures that have full hardware
  bit-reverse support and don't need the table.

Changes in v3:
- Fix the build issue by remving the CONFIG_HAVE_ARCH_BITREVERSE macro
  for byte_rev_table.
- Update the riscv implementation as David suggested.
- Add Reviwed-by.

Changes in v2:
- Define generic __bitrev8/16/32 for reuse in riscv.

Jinjie Ruan (2):
  bitops: Define generic __bitrev8/16/32 for reuse
  arch/riscv: Add bitrev.h file to support rev8 and brev8

 arch/riscv/Kconfig                    |  2 ++
 arch/riscv/include/asm/bitrev.h       | 51 +++++++++++++++++++++++++++
 include/asm-generic/bitops/__bitrev.h | 25 +++++++++++++
 include/linux/bitrev.h                | 20 +++--------
 lib/Kconfig                           |  4 +++
 lib/bitrev.c                          |  4 +--
 6 files changed, 88 insertions(+), 18 deletions(-)
 create mode 100644 arch/riscv/include/asm/bitrev.h
 create mode 100644 include/asm-generic/bitops/__bitrev.h

-- 
2.34.1

[PATCH v4 1/2] bitops: Define generic __bitrev8/16/32 for reuse

[Jinjie Ruan]

Define generic __bitrev8/16/32 using the implementation
in <linux/bitrev.h>, so they can be reused in <asm/bitrev.h>,
such as RISCV.

And introduce a NEED_BYTE_REVERSE_TABLE Kconfig option, so byte_rev_table
is only compiled when !HAVE_ARCH_BITREVERSE or when an architecture (like
RISC-V) explicitly selects it as a fallback. This avoids bloating the .data
section for architectures that have full hardware bit-reverse support and
don't need the table.

Reviewed-by: Yury Norov <ynorov@nvidia.com>
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
---
 include/asm-generic/bitops/__bitrev.h | 25 +++++++++++++++++++++++++
 include/linux/bitrev.h                | 20 ++++----------------
 lib/Kconfig                           |  4 ++++
 lib/bitrev.c                          |  4 ++--
 4 files changed, 35 insertions(+), 18 deletions(-)
 create mode 100644 include/asm-generic/bitops/__bitrev.h

diff --git a/include/asm-generic/bitops/__bitrev.h b/include/asm-generic/bitops/__bitrev.h
new file mode 100644
index 000000000000..9d7d3d369364
--- /dev/null
+++ b/include/asm-generic/bitops/__bitrev.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_GENERIC_BITOPS___BITREV_H_
+#define _ASM_GENERIC_BITOPS___BITREV_H_
+
+#ifdef CONFIG_NEED_BYTE_REVERSE_TABLE
+#include <asm/types.h>
+
+extern u8 const byte_rev_table[256];
+static __always_inline __attribute_const__ u8 generic___bitrev8(u8 byte)
+{
+	return byte_rev_table[byte];
+}
+
+static __always_inline __attribute_const__ u16 generic___bitrev16(u16 x)
+{
+	return (generic___bitrev8(x & 0xff) << 8) | generic___bitrev8(x >> 8);
+}
+
+static __always_inline __attribute_const__ u32 generic___bitrev32(u32 x)
+{
+	return (generic___bitrev16(x & 0xffff) << 16) | generic___bitrev16(x >> 16);
+}
+#endif /* CONFIG_NEED_BYTE_REVERSE_TABLE */
+
+#endif /* _ASM_GENERIC_BITOPS___BITREV_H_ */
diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h
index d35b8ec1c485..11620a70e776 100644
--- a/include/linux/bitrev.h
+++ b/include/linux/bitrev.h
@@ -12,22 +12,10 @@
 #define __bitrev8 __arch_bitrev8
 
 #else
-extern u8 const byte_rev_table[256];
-static inline u8 __bitrev8(u8 byte)
-{
-	return byte_rev_table[byte];
-}
-
-static inline u16 __bitrev16(u16 x)
-{
-	return (__bitrev8(x & 0xff) << 8) | __bitrev8(x >> 8);
-}
-
-static inline u32 __bitrev32(u32 x)
-{
-	return (__bitrev16(x & 0xffff) << 16) | __bitrev16(x >> 16);
-}
-
+#include <asm-generic/bitops/__bitrev.h>
+#define __bitrev32 generic___bitrev32
+#define __bitrev16 generic___bitrev16
+#define __bitrev8 generic___bitrev8
 #endif /* CONFIG_HAVE_ARCH_BITREVERSE */
 
 #define __bitrev8x4(x)	(__bitrev32(swab32(x)))
diff --git a/lib/Kconfig b/lib/Kconfig
index 0f2fb9610647..75cbb647b1da 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -62,6 +62,10 @@ config HAVE_ARCH_BITREVERSE
 	  This option enables the use of hardware bit-reversal instructions on
 	  architectures which support such operations.
 
+config NEED_BYTE_REVERSE_TABLE
+	bool
+	default y if !HAVE_ARCH_BITREVERSE
+
 config ARCH_HAS_STRNCPY_FROM_USER
 	bool
 
diff --git a/lib/bitrev.c b/lib/bitrev.c
index 81b56e0a7f32..d9d5ee00229c 100644
--- a/lib/bitrev.c
+++ b/lib/bitrev.c
@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
-#ifndef CONFIG_HAVE_ARCH_BITREVERSE
+#ifdef CONFIG_NEED_BYTE_REVERSE_TABLE
 #include <linux/types.h>
 #include <linux/module.h>
 #include <linux/bitrev.h>
@@ -44,4 +44,4 @@ const u8 byte_rev_table[256] = {
 };
 EXPORT_SYMBOL_GPL(byte_rev_table);
 
-#endif /* CONFIG_HAVE_ARCH_BITREVERSE */
+#endif /* CONFIG_NEED_BYTE_REVERSE_TABLE */
-- 
2.34.1

Re: [PATCH v4 1/2] bitops: Define generic __bitrev8/16/32 for reuse

[Yury Norov]

On Mon, Apr 20, 2026 at 09:12:51PM +0800, Jinjie Ruan wrote:
> Define generic __bitrev8/16/32 using the implementation
> in <linux/bitrev.h>, so they can be reused in <asm/bitrev.h>,
> such as RISCV.
> 
> And introduce a NEED_BYTE_REVERSE_TABLE Kconfig option, so byte_rev_table

Please split the move and new config option into different patches,
for bisectability.

> is only compiled when !HAVE_ARCH_BITREVERSE or when an architecture (like
> RISC-V) explicitly selects it as a fallback. This avoids bloating the .data
> section for architectures that have full hardware bit-reverse support and
> don't need the table.
> 
> Reviewed-by: Yury Norov <ynorov@nvidia.com>
> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>

If I recall correctly, the option was suggested by
David. Maybe credit him with a tag?

> ---
>  include/asm-generic/bitops/__bitrev.h | 25 +++++++++++++++++++++++++
>  include/linux/bitrev.h                | 20 ++++----------------
>  lib/Kconfig                           |  4 ++++
>  lib/bitrev.c                          |  4 ++--
>  4 files changed, 35 insertions(+), 18 deletions(-)
>  create mode 100644 include/asm-generic/bitops/__bitrev.h
> 
> diff --git a/include/asm-generic/bitops/__bitrev.h b/include/asm-generic/bitops/__bitrev.h
> new file mode 100644
> index 000000000000..9d7d3d369364
> --- /dev/null
> +++ b/include/asm-generic/bitops/__bitrev.h
> @@ -0,0 +1,25 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef _ASM_GENERIC_BITOPS___BITREV_H_
> +#define _ASM_GENERIC_BITOPS___BITREV_H_
> +
> +#ifdef CONFIG_NEED_BYTE_REVERSE_TABLE

I would rather say CONFIG_GENERIC_BITREVERSE.

> +#include <asm/types.h>
> +
> +extern u8 const byte_rev_table[256];
> +static __always_inline __attribute_const__ u8 generic___bitrev8(u8 byte)
> +{
> +	return byte_rev_table[byte];
> +}
> +
> +static __always_inline __attribute_const__ u16 generic___bitrev16(u16 x)
> +{
> +	return (generic___bitrev8(x & 0xff) << 8) | generic___bitrev8(x >> 8);
> +}
> +
> +static __always_inline __attribute_const__ u32 generic___bitrev32(u32 x)
> +{
> +	return (generic___bitrev16(x & 0xffff) << 16) | generic___bitrev16(x >> 16);
> +}
> +#endif /* CONFIG_NEED_BYTE_REVERSE_TABLE */
> +
> +#endif /* _ASM_GENERIC_BITOPS___BITREV_H_ */
> diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h
> index d35b8ec1c485..11620a70e776 100644
> --- a/include/linux/bitrev.h
> +++ b/include/linux/bitrev.h
> @@ -12,22 +12,10 @@
>  #define __bitrev8 __arch_bitrev8
>  
>  #else
> -extern u8 const byte_rev_table[256];
> -static inline u8 __bitrev8(u8 byte)
> -{
> -	return byte_rev_table[byte];
> -}
> -
> -static inline u16 __bitrev16(u16 x)
> -{
> -	return (__bitrev8(x & 0xff) << 8) | __bitrev8(x >> 8);
> -}
> -
> -static inline u32 __bitrev32(u32 x)
> -{
> -	return (__bitrev16(x & 0xffff) << 16) | __bitrev16(x >> 16);
> -}
> -
> +#include <asm-generic/bitops/__bitrev.h>
> +#define __bitrev32 generic___bitrev32
> +#define __bitrev16 generic___bitrev16
> +#define __bitrev8 generic___bitrev8
>  #endif /* CONFIG_HAVE_ARCH_BITREVERSE */
>  
>  #define __bitrev8x4(x)	(__bitrev32(swab32(x)))
> diff --git a/lib/Kconfig b/lib/Kconfig
> index 0f2fb9610647..75cbb647b1da 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -62,6 +62,10 @@ config HAVE_ARCH_BITREVERSE
>  	  This option enables the use of hardware bit-reversal instructions on
>  	  architectures which support such operations.
>  
> +config NEED_BYTE_REVERSE_TABLE
> +	bool
> +	default y if !HAVE_ARCH_BITREVERSE

bool + default = def_bool

I don't need the table if I don't enable BITREVERSE. The bitrev.c
will not be compiled in that case, but .config will be polluted
with useless and misleading NEED_BYTE_REVERSE_TABLE option. So
altogether this should be:

 config GENERIC_BITREVERSE
 	def_bool !HAVE_ARCH_BITREVERSE
        depends on BITREVERSE

Can you add a help section, so that the others would understand why
arch and generic implementations are not mutually exclusive, and when
they need to select this?

> +
>  config ARCH_HAS_STRNCPY_FROM_USER
>  	bool
>  
> diff --git a/lib/bitrev.c b/lib/bitrev.c
> index 81b56e0a7f32..d9d5ee00229c 100644
> --- a/lib/bitrev.c
> +++ b/lib/bitrev.c
> @@ -1,5 +1,5 @@
>  // SPDX-License-Identifier: GPL-2.0-only
> -#ifndef CONFIG_HAVE_ARCH_BITREVERSE
> +#ifdef CONFIG_NEED_BYTE_REVERSE_TABLE
>  #include <linux/types.h>
>  #include <linux/module.h>
>  #include <linux/bitrev.h>
> @@ -44,4 +44,4 @@ const u8 byte_rev_table[256] = {
>  };
>  EXPORT_SYMBOL_GPL(byte_rev_table);
>  
> -#endif /* CONFIG_HAVE_ARCH_BITREVERSE */
> +#endif /* CONFIG_NEED_BYTE_REVERSE_TABLE */
> -- 
> 2.34.1

Re: [PATCH v4 1/2] bitops: Define generic __bitrev8/16/32 for reuse

[Jinjie Ruan]

On 4/21/2026 10:03 AM, Yury Norov wrote:
> On Mon, Apr 20, 2026 at 09:12:51PM +0800, Jinjie Ruan wrote:
>> Define generic __bitrev8/16/32 using the implementation
>> in <linux/bitrev.h>, so they can be reused in <asm/bitrev.h>,
>> such as RISCV.
>>
>> And introduce a NEED_BYTE_REVERSE_TABLE Kconfig option, so byte_rev_table
> 
> Please split the move and new config option into different patches,
> for bisectability.

ok, that will be more clearer.

> 
>> is only compiled when !HAVE_ARCH_BITREVERSE or when an architecture (like
>> RISC-V) explicitly selects it as a fallback. This avoids bloating the .data
>> section for architectures that have full hardware bit-reverse support and
>> don't need the table.
>>
>> Reviewed-by: Yury Norov <ynorov@nvidia.com>
>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
> 
> If I recall correctly, the option was suggested by
> David. Maybe credit him with a tag?

Sure, will add a Suggested-by.

> 
>> ---
>>  include/asm-generic/bitops/__bitrev.h | 25 +++++++++++++++++++++++++
>>  include/linux/bitrev.h                | 20 ++++----------------
>>  lib/Kconfig                           |  4 ++++
>>  lib/bitrev.c                          |  4 ++--
>>  4 files changed, 35 insertions(+), 18 deletions(-)
>>  create mode 100644 include/asm-generic/bitops/__bitrev.h
>>
>> diff --git a/include/asm-generic/bitops/__bitrev.h b/include/asm-generic/bitops/__bitrev.h
>> new file mode 100644
>> index 000000000000..9d7d3d369364
>> --- /dev/null
>> +++ b/include/asm-generic/bitops/__bitrev.h
>> @@ -0,0 +1,25 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +#ifndef _ASM_GENERIC_BITOPS___BITREV_H_
>> +#define _ASM_GENERIC_BITOPS___BITREV_H_
>> +
>> +#ifdef CONFIG_NEED_BYTE_REVERSE_TABLE
> 
> I would rather say CONFIG_GENERIC_BITREVERSE.

Thanks for the suggestion. I'll rename CONFIG_NEED_BYTE_REVERSE_TABLE to
CONFIG_GENERIC_BITREVERSE in the next version.

> 
>> +#include <asm/types.h>
>> +
>> +extern u8 const byte_rev_table[256];
>> +static __always_inline __attribute_const__ u8 generic___bitrev8(u8 byte)
>> +{
>> +	return byte_rev_table[byte];
>> +}
>> +
>> +static __always_inline __attribute_const__ u16 generic___bitrev16(u16 x)
>> +{
>> +	return (generic___bitrev8(x & 0xff) << 8) | generic___bitrev8(x >> 8);
>> +}
>> +
>> +static __always_inline __attribute_const__ u32 generic___bitrev32(u32 x)
>> +{
>> +	return (generic___bitrev16(x & 0xffff) << 16) | generic___bitrev16(x >> 16);
>> +}
>> +#endif /* CONFIG_NEED_BYTE_REVERSE_TABLE */
>> +
>> +#endif /* _ASM_GENERIC_BITOPS___BITREV_H_ */
>> diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h
>> index d35b8ec1c485..11620a70e776 100644
>> --- a/include/linux/bitrev.h
>> +++ b/include/linux/bitrev.h
>> @@ -12,22 +12,10 @@
>>  #define __bitrev8 __arch_bitrev8
>>  
>>  #else
>> -extern u8 const byte_rev_table[256];
>> -static inline u8 __bitrev8(u8 byte)
>> -{
>> -	return byte_rev_table[byte];
>> -}
>> -
>> -static inline u16 __bitrev16(u16 x)
>> -{
>> -	return (__bitrev8(x & 0xff) << 8) | __bitrev8(x >> 8);
>> -}
>> -
>> -static inline u32 __bitrev32(u32 x)
>> -{
>> -	return (__bitrev16(x & 0xffff) << 16) | __bitrev16(x >> 16);
>> -}
>> -
>> +#include <asm-generic/bitops/__bitrev.h>
>> +#define __bitrev32 generic___bitrev32
>> +#define __bitrev16 generic___bitrev16
>> +#define __bitrev8 generic___bitrev8
>>  #endif /* CONFIG_HAVE_ARCH_BITREVERSE */
>>  
>>  #define __bitrev8x4(x)	(__bitrev32(swab32(x)))
>> diff --git a/lib/Kconfig b/lib/Kconfig
>> index 0f2fb9610647..75cbb647b1da 100644
>> --- a/lib/Kconfig
>> +++ b/lib/Kconfig
>> @@ -62,6 +62,10 @@ config HAVE_ARCH_BITREVERSE
>>  	  This option enables the use of hardware bit-reversal instructions on
>>  	  architectures which support such operations.
>>  
>> +config NEED_BYTE_REVERSE_TABLE
>> +	bool
>> +	default y if !HAVE_ARCH_BITREVERSE
> 
> bool + default = def_bool

That will more clearer.

> 
> I don't need the table if I don't enable BITREVERSE. The bitrev.c
> will not be compiled in that case, but .config will be polluted
> with useless and misleading NEED_BYTE_REVERSE_TABLE option. So
> altogether this should be:
> 
>  config GENERIC_BITREVERSE
>  	def_bool !HAVE_ARCH_BITREVERSE
>         depends on BITREVERSE

You are absolutely right.

> 
> Can you add a help section, so that the others would understand why
> arch and generic implementations are not mutually exclusive, and when
> they need to select this?

Sure.

> 
>> +
>>  config ARCH_HAS_STRNCPY_FROM_USER
>>  	bool
>>  
>> diff --git a/lib/bitrev.c b/lib/bitrev.c
>> index 81b56e0a7f32..d9d5ee00229c 100644
>> --- a/lib/bitrev.c
>> +++ b/lib/bitrev.c
>> @@ -1,5 +1,5 @@
>>  // SPDX-License-Identifier: GPL-2.0-only
>> -#ifndef CONFIG_HAVE_ARCH_BITREVERSE
>> +#ifdef CONFIG_NEED_BYTE_REVERSE_TABLE
>>  #include <linux/types.h>
>>  #include <linux/module.h>
>>  #include <linux/bitrev.h>
>> @@ -44,4 +44,4 @@ const u8 byte_rev_table[256] = {
>>  };
>>  EXPORT_SYMBOL_GPL(byte_rev_table);
>>  
>> -#endif /* CONFIG_HAVE_ARCH_BITREVERSE */
>> +#endif /* CONFIG_NEED_BYTE_REVERSE_TABLE */
>> -- 
>> 2.34.1
> 

[PATCH v4 2/2] arch/riscv: Add bitrev.h file to support rev8 and brev8

[Jinjie Ruan]

The RISC-V Bit-manipulation Extension for Cryptography (Zbkb) provides
the 'brev8' instruction, which reverses the bits within each byte.
Combined with the 'rev8' instruction (from Zbb or Zbkb), which reverses
the byte order of a register, we can efficiently implement 16-bit,
32-bit, and (on RV64) 64-bit bit reversal.

This is significantly faster than the default software table-lookup
implementation in lib/bitrev.c, as it replaces memory accesses and
multiple arithmetic operations with just two or three hardware
instructions.

Select HAVE_ARCH_BITREVERSE as well as NEED_BYTE_REVERSE_TABLE, and
provide <asm/bitrev.h> to utilize these instructions when the Zbkb
extension is available at runtime via the alternatives mechanism.

Link: https://docs.riscv.org/reference/isa/unpriv/b-st-ext.html
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
---
 arch/riscv/Kconfig              |  2 ++
 arch/riscv/include/asm/bitrev.h | 51 +++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+)
 create mode 100644 arch/riscv/include/asm/bitrev.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 90c531e6abf5..465545200379 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -128,6 +128,7 @@ config RISCV
 	select HAS_IOPORT if MMU
 	select HAVE_ALIGNED_STRUCT_PAGE
 	select HAVE_ARCH_AUDITSYSCALL
+	select HAVE_ARCH_BITREVERSE if RISCV_ISA_ZBKB
 	select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP
 	select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT
 	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
@@ -207,6 +208,7 @@ config RISCV
 	select LOCK_MM_AND_FIND_VMA
 	select MMU_GATHER_RCU_TABLE_FREE if SMP && MMU
 	select MODULES_USE_ELF_RELA if MODULES
+	select NEED_BYTE_REVERSE_TABLE
 	select OF
 	select OF_EARLY_FLATTREE
 	select OF_IRQ
diff --git a/arch/riscv/include/asm/bitrev.h b/arch/riscv/include/asm/bitrev.h
new file mode 100644
index 000000000000..4b9b8d34cc3b
--- /dev/null
+++ b/arch/riscv/include/asm/bitrev.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_BITREV_H
+#define __ASM_BITREV_H
+
+#include <linux/types.h>
+#include <asm/cpufeature-macros.h>
+#include <asm/hwcap.h>
+#include <asm-generic/bitops/__bitrev.h>
+
+static __always_inline __attribute_const__ u32 __arch_bitrev32(u32 x)
+{
+	unsigned long result;
+
+	if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZBKB))
+		return generic___bitrev32(x);
+
+	asm volatile(
+		".option push\n"
+		".option arch,+zbkb\n"
+		"rev8 %0, %1\n"
+		"brev8 %0, %0\n"
+		".option pop"
+		: "=r" (result) : "r" ((long)x)
+	);
+
+	return result >> (__riscv_xlen - 32);
+}
+
+static __always_inline __attribute_const__ u16 __arch_bitrev16(u16 x)
+{
+	return __arch_bitrev32(x) >> 16;
+}
+
+static __always_inline __attribute_const__ u8 __arch_bitrev8(u8 x)
+{
+	unsigned long result;
+
+	if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZBKB))
+		return generic___bitrev8(x);
+
+	asm volatile(
+		".option push\n"
+		".option arch,+zbkb\n"
+		"brev8 %0, %1\n"
+		".option pop"
+		: "=r" (result) : "r" ((long)x)
+	);
+
+	return result;
+}
+#endif
-- 
2.34.1