Re: [BUG] sched/cache: "Make LLC id continuous" causes NULL cpumask

[Srikar Dronamraju <srikar@linux.ibm.com>]

* Chen, Yu C <yu.c.chen@intel.com> [2026-05-28 17:12:41]:

> On 5/28/2026 12:58 PM, Shrikanth Hegde wrote:
> > 
> > 
> > On 5/27/26 11:37 PM, Shrikanth Hegde wrote:
> 
> [ ... ]
> 
> > > diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/
> > > include/ asm/topology.h
> > > index 66ed5fe1b718..bd1db3b1dbb0 100644
> > > --- a/arch/powerpc/include/asm/topology.h
> > > +++ b/arch/powerpc/include/asm/topology.h
> > > @@ -131,6 +131,9 @@ static inline int cpu_to_coregroup_id(int cpu)
> > >   #ifdef CONFIG_SMP
> > >   #include <asm/cputable.h>
> > > 
> > > +const struct cpumask *arch_llc_mask(int cpu);
> > > +#define arch_llc_mask  arch_llc_mask
> > > +
> > >   struct cpumask *cpu_coregroup_mask(int cpu);
> > >   const struct cpumask *cpu_die_mask(int cpu);
> > >   int cpu_die_id(int cpu);
> > > diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
> > > index 3467f86fd78f..26c15c786c55 100644
> > > --- a/arch/powerpc/kernel/smp.c
> > > +++ b/arch/powerpc/kernel/smp.c
> > > @@ -1101,6 +1101,13 @@ const struct cpumask *cpu_die_mask(int cpu)
> > >   }
> > >   EXPORT_SYMBOL_GPL(cpu_die_mask);
> > > 
> > > +const struct cpumask *arch_llc_mask(int cpu)
> > > +{
> > > +       if (has_coregroup_support())
> > > +               return cpu_coregroup_mask(cpu);
> > > +       return cpu_smallcore_mask(cpu);
> > 
> > 
> > This function body needs change, since LLC is not at MC.
> > and I didn't account for power9.
> > 
> > Rest of the structure is what i would prefer the direction to go.
> > This will help future architectures too to account for their specific
> > needs.
> > 
> > What do you think?
> > 
> 
> Yes this direction look good to me. Regarding the arch_llc_mask(),
> how about the following per Srikar's description
> 
> const struct cpumask *arch_llc_mask(int cpu)
> {
> 	/* Power9, CACHE domain is the LLC*/	if (shared_caches)
> 		return cpu_l2_cache_mask(cpu);
> 
> 	/* P7, P8, P10, P11, SMT domain is the LLC*/	return cpu_smt_mask(cpu);

       On P7, P8, P10, P11, cpu_l2_cache_mask should be same as cpu_smt_mask
       so I dont see a point of checking if(shared caches)

	We can as well return 
#define arch_llc_mask cpu_l2_cache_mask


-- 
Thanks and Regards
Srikar Dronamraju