Re: [PATCH v4 6/6] iio: dac: ad3530r: Add support for AD3532R/AD3532

[Andy Shevchenko <andriy.shevchenko@intel.com>]

On Fri, Jul 03, 2026 at 06:10:11PM +0800, Kim Seer Paller wrote:
> The AD3532R/AD3532 is a 16-channel, 16-bit voltage output DAC. It shares
> similar functionality with AD3530R but splits its registers into two
> banks: bank 0 at 0x10xx for channels 0-7 and bank 1 at 0x30xx for
> channels 8-15. The input, LDAC trigger and operating-mode registers are
> therefore selected per bank.
> 
> Add the AD3532R register map, channel specs, per-bank register arrays, a
> dedicated powerdown handler and its own regmap_config, reusing the
> table-driven helpers for the shared configuration steps.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
I still don't like much the all this register offset calculations but I have
nothing better to suggest, so let it be.

...

> +/* AD3532R/AD3532 bank 0 registers (channels 0-7) */
> +#define AD3532R_INTERFACE_CONFIG_A_0		0x1000
> +#define AD3532R_OUTPUT_OPERATING_MODE_0		0x1020
> +#define AD3532R_OUTPUT_OPERATING_MODE_1		0x1021
> +#define AD3532R_OUTPUT_CONTROL_0		0x102A
> +#define AD3532R_REFERENCE_CONTROL_0		0x103C
> +#define AD3532R_SW_LDAC_TRIG_0			0x10E5
> +#define AD3532R_INPUT_CH_0			0x10EB
> +
> +/* AD3532R/AD3532 bank 1 registers (channels 8-15) */
> +#define AD3532R_INTERFACE_CONFIG_A_1		0x3000
> +#define AD3532R_OUTPUT_OPERATING_MODE_2		0x3020
> +#define AD3532R_OUTPUT_OPERATING_MODE_3		0x3021
> +#define AD3532R_OUTPUT_CONTROL_1		0x302A
> +#define AD3532R_REFERENCE_CONTROL_1		0x303C
> +#define AD3532R_SW_LDAC_TRIG_1			0x30E5
> +#define AD3532R_INPUT_CH_1			0x30EB

+ blank line here as the below is not related to any bank.

> +#define AD3532R_MAX_REG_ADDR			0x30F9

-- 
With Best Regards,
Andy Shevchenko