The Linux Kernel Mailing List
 help / color / mirror / Atom feed
From: Drew Fustini <fustini@kernel.org>
To: sashiko-reviews@lists.linux.dev
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 5/8] riscv_cbqri: resctrl: Add cache allocation via capacity block mask
Date: Mon, 6 Jul 2026 09:59:15 -0700	[thread overview]
Message-ID: <akve44tGHORcofdY@x1> (raw)
In-Reply-To: <20260628213426.EB9C01F000E9@smtp.kernel.org>

On Sun, Jun 28, 2026 at 09:34:24PM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] Dynamically registered capacity controllers bypass capability validation, leading to hardware errors that abort CPU hotplug.
> --
> 
> commit 3d57a44029d899d70e2c81681585f914c01cc700
> Author: Drew Fustini <fustini@kernel.org>
> 
> riscv_cbqri: resctrl: Add cache allocation via capacity block mask
> 
> Wire CBQRI capacity controllers into resctrl as RDT_RESOURCE_L2 and
> RDT_RESOURCE_L3 schemata. Mismatched CC caps at the same cache level
> are treated as a fatal configuration error since fs/resctrl exposes a
> single per-rid cap set. Domains are created lazily in the cpuhp online
> callback so cpu_mask reflects only currently online CPUs.
> 
> > diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c
> > new file mode 100644
> > index 0000000000000..1fb0fbe1b000f
> > --- /dev/null
> > +++ b/drivers/resctrl/cbqri_resctrl.c
> [ ... ]
> > +static int cbqri_attach_cpu_to_cap_ctrl(struct cbqri_controller *ctrl,
> > +					unsigned int cpu)
> > +{
> > +	struct cbqri_resctrl_res *hw_res;
> > +	struct rdt_ctrl_domain *domain;
> > +	struct rdt_resource *res;
> > +	int dom_id;
> > +	int rid;
> > +
> > +	rid = cbqri_cache_level_to_rid(ctrl->cache.cache_level);
> > +	if (rid < 0)
> > +		return 0;
> > +	hw_res = &cbqri_resctrl_resources[rid];
> > +
> > +	if (!hw_res->ctrl)
> > +		return 0;
> > +
> > +	res = &hw_res->resctrl_res;
> > +	dom_id = ctrl->cache.cache_id;
> > +
> > +	domain = cbqri_find_ctrl_domain(&res->ctrl_domains, dom_id);
> > +	if (domain) {
> > +		cpumask_set_cpu(cpu, &domain->hdr.cpu_mask);
> > +		return 0;
> > +	}
> > +
> > +	domain = cbqri_create_ctrl_domain(ctrl, res, cpu, dom_id);
> 
> [Severity: High]
> Does this regression cause CPU hotplug to abort if a capacity controller is
> dynamically registered (e.g., via a device tree overlay) after boot?
> 
> Late-registered controllers bypass the capability validation in
> cbqri_resctrl_pick_caches(). When a CPU sharing this new controller is
> hotplugged, it reaches this point to create a new domain.
> 
> If the late controller supports fewer RCIDs than the global controller,
> cbqri_init_domain_ctrlval() will issue out-of-bounds commands to the hardware
> because it iterates up to the global hw_res->ctrl->rcid_count:
> 
> drivers/resctrl/cbqri_resctrl.c:cbqri_init_domain_ctrlval() {
> ...
> 	for (i = 0; i < hw_res->ctrl->rcid_count; i++) {
> 		for (t = 0; t < CDP_NUM_TYPES; t++) {
> 			err = resctrl_arch_update_one(r, d, i, t, ...
> ...
> }
> 
> The hardware will reject the out-of-bounds RCID commands, and the resulting
> error will bubble up to cbqri_resctrl_online_cpu(), keeping the CPU
> permanently offline.
> 
> Should the capabilities of dynamically registered controllers be validated
> against hw_res->ctrl before attaching them?

cbqri_resctrl_pick_caches() drops a cache level entirely if its
same-level controllers disagree on rcid_count ), so every exposed level
is backed by controllers with a uniform rcid_count.

However, it doesn't hurt to harden it by iterating to the attached
domain's own hw_dom->hw_ctrl->rcid_count.

-Drew

  reply	other threads:[~2026-07-06 16:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-28 21:18 [PATCH v3 0/8] riscv: Add Ssqosid and initial CBQRI resctrl support Drew Fustini
2026-06-28 21:18 ` [PATCH v3 1/8] dt-bindings: riscv: Add Ssqosid extension description Drew Fustini
2026-06-28 21:18 ` [PATCH v3 2/8] riscv: Detect the Ssqosid extension Drew Fustini
2026-06-28 21:18 ` [PATCH v3 3/8] riscv: Add support for srmcfg CSR from " Drew Fustini
2026-06-28 21:28   ` sashiko-bot
2026-06-29 22:46     ` Drew Fustini
2026-06-28 21:18 ` [PATCH v3 4/8] riscv_cbqri: Add capacity controller probe and allocation device ops Drew Fustini
2026-06-28 21:28   ` sashiko-bot
2026-07-01  0:24     ` Drew Fustini
2026-06-28 21:18 ` [PATCH v3 5/8] riscv_cbqri: resctrl: Add cache allocation via capacity block mask Drew Fustini
2026-06-28 21:34   ` sashiko-bot
2026-07-06 16:59     ` Drew Fustini [this message]
2026-07-01 20:18   ` Fenghua Yu
2026-07-03  8:00     ` Drew Fustini
2026-06-28 21:18 ` [PATCH v3 6/8] riscv: Enable resctrl filesystem for Ssqosid Drew Fustini
2026-06-28 21:30   ` sashiko-bot
2026-07-06 17:05     ` Drew Fustini
2026-06-28 21:18 ` [PATCH v3 7/8] dt-bindings: riscv: Add binding for CBQRI controllers Drew Fustini
2026-06-29 15:32   ` Conor Dooley
2026-06-28 21:18 ` [PATCH v3 8/8] riscv_cbqri: Add CBQRI capacity allocation platform driver Drew Fustini
2026-06-28 21:27   ` sashiko-bot
2026-07-06 17:09     ` Drew Fustini

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=akve44tGHORcofdY@x1 \
    --to=fustini@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox