From: David Matlack <dmatlack@google.com>
To: Josh Hilke <jrhilke@google.com>
Cc: Alex Williamson <alex@shazbot.org>,
Vipin Sharma <vipinsh@google.com>, Shuah Khan <shuah@kernel.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org,
Alex Williamson <alex.williamson@nvidia.com>
Subject: Re: [PATCH v2 09/10] selftests/vfio: igb: Recover after DMA-read faults
Date: Mon, 6 Jul 2026 21:16:38 +0000 [thread overview]
Message-ID: <akwbNmaeX0Jmvs_x@google.com> (raw)
In-Reply-To: <20260526235417.2058313-10-jrhilke@google.com>
On 2026-05-26 11:54 PM, Josh Hilke wrote:
> From: Alex Williamson <alex.williamson@nvidia.com>
>
> The mix_and_match test intentionally submits a TX descriptor with an
> unmapped source IOVA so that the DMA read fails. On real 82576
> hardware the resulting fault leaves the descriptor engine unable to
> service subsequent valid descriptors, so the next memcpy in the same
> test iteration times out.
>
> The 82576 datasheet (section 4.2.1.6.1) describes CTRL.RST as the
> software mechanism to recover from a hung device. Empirically
> CTRL.RST alone is not sufficient in this state: the visible queue
> registers are reinitialized, but the next valid memcpy still posts
> descriptors without any TDH/TDT progress in the same process. A
> fresh device open after the failure works, which points to a reset
> scope broader than CTRL.RST being required. The 82576 advertises
> PCIe FLR; VFIO_DEVICE_RESET drives FLR and supplies that scope while
> preserving the selftest process and its DMA mappings.
>
> Add igb_error_reset_and_reinit() implementing the recovery sequence:
> issue VFIO_DEVICE_RESET, re-arm the kernel-side MSI-X trigger against
> the still-valid eventfd via vfio_pci_irq_reenable() (this does not
> touch the eventfd, which test fixtures may have cached), and
> re-program the device via igb_hw_init(). FLR clears EICR and leaves
> EIMS=0, so no explicit interrupt mask or cause writes are needed.
> igb_hw_init() resets tx_tail/rx_tail to 0 and igb_memcpy_start() zeros
> each descriptor before submission, so no ring memset is needed either.
>
> Call this from igb_memcpy_wait() on completion timeout, preceded by a
> 10 ms delay so that PCIe/IOMMU/AER error handling triggered by the
> just-observed DMA fault can release the device lock VFIO_DEVICE_RESET
> contends for. The delay is heuristic and tied to the fault path, so
> it lives at the call site rather than inside the reset helper. The
> failed memcpy still returns -ETIMEDOUT; reset recovery only ensures
> the next operation starts from a usable device state.
>
> Assisted-by: Claude:claude-opus-4-7
> Signed-off-by: Alex Williamson <alex.williamson@nvidia.com>
Reviewed-by: David Matlack <dmatlack@google.com>
next prev parent reply other threads:[~2026-07-06 21:16 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 23:54 [PATCH v2 00/10] selftests/vfio: igb: Add driver for Intel Josh Hilke
2026-05-26 23:54 ` [PATCH v2 01/10] selftests/vfio: igb: Add driver for IGB QEMU device Josh Hilke
2026-05-26 23:54 ` [PATCH v2 02/10] selftests/vfio: igb: Use PHY internal loopback on 82576 Josh Hilke
2026-05-26 23:54 ` [PATCH v2 03/10] selftests/vfio: igb: Use advanced TX and RX descriptors Josh Hilke
2026-05-26 23:54 ` [PATCH v2 04/10] selftests/vfio: igb: Program MSI-X interrupt routing Josh Hilke
2026-05-26 23:54 ` [PATCH v2 05/10] selftests/vfio: igb: Extend memcpy completion timeout for line-rate hardware Josh Hilke
2026-05-26 23:54 ` [PATCH v2 06/10] selftests/vfio: igb: Disable PCIe completion timeout retries Josh Hilke
2026-05-26 23:54 ` [PATCH v2 07/10] selftests/vfio: Add vfio_pci_irq_reenable() helper Josh Hilke
2026-07-06 21:03 ` David Matlack
2026-05-26 23:54 ` [PATCH v2 08/10] selftests/vfio: igb: Factor hardware programming into igb_hw_init() Josh Hilke
2026-07-06 21:16 ` David Matlack
2026-05-26 23:54 ` [PATCH v2 09/10] selftests/vfio: igb: Recover after DMA-read faults Josh Hilke
2026-07-06 21:16 ` David Matlack [this message]
2026-05-26 23:54 ` [PATCH v2 10/10] selftests/vfio: igb: Use offical IGB headers in selftest driver Josh Hilke
2026-07-06 20:49 ` David Matlack
2026-07-06 20:55 ` [PATCH v2 00/10] selftests/vfio: igb: Add driver for Intel David Matlack
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=akwbNmaeX0Jmvs_x@google.com \
--to=dmatlack@google.com \
--cc=alex.williamson@nvidia.com \
--cc=alex@shazbot.org \
--cc=jrhilke@google.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=shuah@kernel.org \
--cc=vipinsh@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox