* [PATCH 0/3] Add CCI and CAMSS support for Kaanapali
@ 2026-05-08 8:36 Hangxiang Ma
2026-05-08 8:36 ` [PATCH 1/3] arm64: dts: qcom: kaanapali: Add camss node Hangxiang Ma
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Hangxiang Ma @ 2026-05-08 8:36 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Hangxiang Ma
This series adds CCI and CAMSS support for Qualcomm Kaanapali SoC.
This series has been tested using the following commands with a downstream
driver for S5KJN5 sensor.
- media-ctl --reset
- media-ctl -V '"msm_csiphy2":0[fmt:SGBRG10/4096x3072]'
- media-ctl -V '"msm_csid0":0[fmt:SGBRG10/4096x3072]'
- media-ctl -V '"msm_vfe0_rdi0":0[fmt:SGBRG10/4096x3072]'
- media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]'
- media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
- yavta --capture=20 -I -n 5 -f SGBRG10P -s 4096x3072 -F /dev/video0
Driver and dt-binding are waiting to be merged:
https://lore.kernel.org/all/20260508-kaanapali-camss-v13-0-2541d8e55651@oss.qualcomm.com/
Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
---
Hangxiang Ma (3):
arm64: dts: qcom: kaanapali: Add camss node
arm64: dts: qcom: kaanapali: Add CCI definitions
arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 539 ++++++++++++++++++++++++++++++++
1 file changed, 539 insertions(+)
---
base-commit: b25f15a8600145233c948b40cab6d7d57bac3076
change-id: 20260507-knp-camera-a070d05ec552
Best regards,
--
Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 1/3] arm64: dts: qcom: kaanapali: Add camss node 2026-05-08 8:36 [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Hangxiang Ma @ 2026-05-08 8:36 ` Hangxiang Ma 2026-05-08 10:45 ` Vladimir Zapolskiy 2026-05-08 8:36 ` [PATCH 2/3] arm64: dts: qcom: kaanapali: Add CCI definitions Hangxiang Ma ` (2 subsequent siblings) 3 siblings, 1 reply; 11+ messages in thread From: Hangxiang Ma @ 2026-05-08 8:36 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel, Hangxiang Ma Add node for the Kaanapali camera subsystem. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 201 ++++++++++++++++++++++++++++++++ 1 file changed, 201 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi index 7cc326aa1a1a..9d8aee202797 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -3138,6 +3138,207 @@ opp-202000000 { }; }; + camss: isp@9253000 { + compatible = "qcom,kaanapali-camss"; + + reg = <0x0 0x09253000 0x0 0x5e80>, + <0x0 0x09263000 0x0 0x5e80>, + <0x0 0x09273000 0x0 0x5e80>, + <0x0 0x092d3000 0x0 0x3880>, + <0x0 0x092e7000 0x0 0x3880>, + <0x0 0x09523000 0x0 0x2000>, + <0x0 0x09525000 0x0 0x2000>, + <0x0 0x09527000 0x0 0x2000>, + <0x0 0x09529000 0x0 0x2000>, + <0x0 0x0952b000 0x0 0x2000>, + <0x0 0x0952d000 0x0 0x2000>, + <0x0 0x093fd000 0x0 0x400>, + <0x0 0x093fe000 0x0 0x400>, + <0x0 0x093ff000 0x0 0x400>, + <0x0 0x09151000 0x0 0x20000>, + <0x0 0x09171000 0x0 0x20000>, + <0x0 0x09191000 0x0 0x20000>, + <0x0 0x092dc000 0x0 0x1300>, + <0x0 0x092f0000 0x0 0x1300>; + reg-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "csiphy5", + "csitpg0", + "csitpg1", + "csitpg2", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + + clocks = <&camcc CAM_CC_CAMNOC_NRT_AXI_CLK>, + <&camcc CAM_CC_CAMNOC_RT_AXI_CLK>, + <&camcc CAM_CC_CAM_TOP_AHB_CLK>, + <&camcc CAM_CC_CAM_TOP_FAST_AHB_CLK>, + <&camcc CAM_CC_CAMNOC_RT_TFE_0_MAIN_CLK>, + <&camcc CAM_CC_CAMNOC_RT_TFE_1_MAIN_CLK>, + <&camcc CAM_CC_CAMNOC_RT_TFE_2_MAIN_CLK>, + <&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>, + <&camcc CAM_CC_CSID_CLK>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY4_CLK>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY5_CLK>, + <&camcc CAM_CC_CSI5PHYTIMER_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&gcc GCC_CAMERA_SF_AXI_CLK>, + <&camcc CAM_CC_TFE_0_MAIN_CLK>, + <&camcc CAM_CC_TFE_0_MAIN_FAST_AHB_CLK>, + <&camcc CAM_CC_TFE_1_MAIN_CLK>, + <&camcc CAM_CC_TFE_1_MAIN_FAST_AHB_CLK>, + <&camcc CAM_CC_TFE_2_MAIN_CLK>, + <&camcc CAM_CC_TFE_2_MAIN_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_QDSS_DEBUG_XO_CLK>; + clock-names = "camnoc_nrt_axi", + "camnoc_rt_axi", + "cpas_ahb", + "cpas_fast_ahb", + "cpas_vfe0", + "cpas_vfe1", + "cpas_vfe2", + "cpas_vfe_lite", + "csid", + "csid_csiphy_rx", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "csiphy4", + "csiphy4_timer", + "csiphy5", + "csiphy5_timer", + "gcc_axi_hf", + "gcc_axi_sf", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe2", + "vfe2_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid", + "qdss_debug_xo"; + + interrupts = <GIC_SPI 601 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 603 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 431 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 605 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 457 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 606 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "csiphy5", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_CAMNOC_NRT_ICP_SF QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "ahb", + "hf_mnoc", + "sf_mnoc", + "sf_icp_mnoc"; + + iommus = <&apps_smmu 0x1c00 0x00>; + + power-domains = <&camcc CAM_CC_TFE_0_GDSC>, + <&camcc CAM_CC_TFE_1_GDSC>, + <&camcc CAM_CC_TFE_2_GDSC>, + <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "ife2", + "top"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + + port@3 { + reg = <3>; + }; + + port@4 { + reg = <4>; + }; + + port@5 { + reg = <5>; + }; + }; + }; + camcc: clock-controller@956d000 { compatible = "qcom,kaanapali-camcc"; reg = <0x0 0x0956d000 0x0 0x80000>; -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 1/3] arm64: dts: qcom: kaanapali: Add camss node 2026-05-08 8:36 ` [PATCH 1/3] arm64: dts: qcom: kaanapali: Add camss node Hangxiang Ma @ 2026-05-08 10:45 ` Vladimir Zapolskiy 0 siblings, 0 replies; 11+ messages in thread From: Vladimir Zapolskiy @ 2026-05-08 10:45 UTC (permalink / raw) To: Hangxiang Ma, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel On 5/8/26 11:36, Hangxiang Ma wrote: > Add node for the Kaanapali camera subsystem. > > Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: kaanapali: Add CCI definitions 2026-05-08 8:36 [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Hangxiang Ma 2026-05-08 8:36 ` [PATCH 1/3] arm64: dts: qcom: kaanapali: Add camss node Hangxiang Ma @ 2026-05-08 8:36 ` Hangxiang Ma 2026-05-08 10:44 ` Vladimir Zapolskiy 2026-05-08 8:36 ` [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma 2026-07-08 14:56 ` [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Bjorn Andersson 3 siblings, 1 reply; 11+ messages in thread From: Hangxiang Ma @ 2026-05-08 8:36 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel, Hangxiang Ma Qualcomm Kaanapali SoC has three Camera Control Interface (CCI). Each controller contains two I2C hosts. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 282 ++++++++++++++++++++++++++++++++ 1 file changed, 282 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi index 9d8aee202797..ed7b7af6c43f 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -3339,6 +3339,96 @@ port@5 { }; }; + cci0: cci@941b000 { + compatible = "qcom,kaanapali-cci", "qcom,msm8996-cci"; + reg = <0x0 0x0941b000 0x0 0x1000>; + interrupts = <GIC_SPI 426 IRQ_TYPE_EDGE_RISING>; + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + clocks = <&camcc CAM_CC_CAM_TOP_AHB_CLK>, + <&camcc CAM_CC_CCI_0_CLK>; + clock-names = "ahb", "cci"; + pinctrl-0 = <&cci0_0_default &cci0_1_default>; + pinctrl-1 = <&cci0_0_sleep &cci0_1_sleep>; + pinctrl-names = "default", "sleep"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + cci0_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci0_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + cci1: cci@941c000 { + compatible = "qcom,kaanapali-cci", "qcom,msm8996-cci"; + reg = <0x0 0x0941c000 0x0 0x1000>; + interrupts = <GIC_SPI 427 IRQ_TYPE_EDGE_RISING>; + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + clocks = <&camcc CAM_CC_CAM_TOP_AHB_CLK>, + <&camcc CAM_CC_CCI_1_CLK>; + clock-names = "ahb", "cci"; + pinctrl-0 = <&cci1_0_default &cci1_1_default>; + pinctrl-1 = <&cci1_0_sleep &cci1_1_sleep>; + pinctrl-names = "default", "sleep"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + cci1_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci1_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + cci2: cci@941d000 { + compatible = "qcom,kaanapali-cci", "qcom,msm8996-cci"; + reg = <0x0 0x0941d000 0x0 0x1000>; + interrupts = <GIC_SPI 428 IRQ_TYPE_EDGE_RISING>; + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; + clocks = <&camcc CAM_CC_CAM_TOP_AHB_CLK>, + <&camcc CAM_CC_CCI_2_CLK>; + clock-names = "ahb", "cci"; + pinctrl-0 = <&cci2_0_default &cci2_1_default>; + pinctrl-1 = <&cci2_0_sleep &cci2_1_sleep>; + pinctrl-names = "default", "sleep"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + cci2_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci2_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + camcc: clock-controller@956d000 { compatible = "qcom,kaanapali-camcc"; reg = <0x0 0x0956d000 0x0 0x80000>; @@ -3813,6 +3903,198 @@ tlmm: pinctrl@f100000 { #interrupt-cells = <2>; wakeup-parent = <&pdc>; + cci0_0_default: cci0-0-default-state { + sda-pins { + pins = "gpio109"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-up; + }; + + scl-pins { + pins = "gpio110"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + cci0_0_sleep: cci0-0-sleep-state { + sda-pins { + pins = "gpio109"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-down; + }; + + scl-pins { + pins = "gpio110"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + cci0_1_default: cci0-1-default-state { + sda-pins { + pins = "gpio111"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-up; + }; + + scl-pins { + pins = "gpio112"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + cci0_1_sleep: cci0-1-sleep-state { + sda-pins { + pins = "gpio111"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-down; + }; + + scl-pins { + pins = "gpio112"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + cci1_0_default: cci1-0-default-state { + sda-pins { + pins = "gpio113"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-up; + }; + + scl-pins { + pins = "gpio114"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + cci1_0_sleep: cci1-0-sleep-state { + sda-pins { + pins = "gpio113"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-down; + }; + + scl-pins { + pins = "gpio114"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + cci1_1_default: cci1-1-default-state { + sda-pins { + pins = "gpio107"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-up; + }; + + scl-pins { + pins = "gpio160"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + cci1_1_sleep: cci1-1-sleep-state { + sda-pins { + pins = "gpio107"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-down; + }; + + scl-pins { + pins = "gpio160"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + cci2_0_default: cci2-0-default-state { + sda-pins { + pins = "gpio108"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-up; + }; + + scl-pins { + pins = "gpio149"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + cci2_0_sleep: cci2-0-sleep-state { + sda-pins { + pins = "gpio108"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-down; + }; + + scl-pins { + pins = "gpio149"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + cci2_1_default: cci2-1-default-state { + sda-pins { + pins = "gpio115"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-up; + }; + + scl-pins { + pins = "gpio116"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + cci2_1_sleep: cci2-1-sleep-state { + sda-pins { + pins = "gpio115"; + function = "cci_i2c_sda"; + drive-strength = <2>; + bias-pull-down; + }; + + scl-pins { + pins = "gpio116"; + function = "cci_i2c_scl"; + drive-strength = <2>; + bias-pull-down; + }; + }; + hub_i2c0_data_clk: hub-i2c0-data-clk-state { /* SDA, SCL */ pins = "gpio66", "gpio67"; -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/3] arm64: dts: qcom: kaanapali: Add CCI definitions 2026-05-08 8:36 ` [PATCH 2/3] arm64: dts: qcom: kaanapali: Add CCI definitions Hangxiang Ma @ 2026-05-08 10:44 ` Vladimir Zapolskiy 0 siblings, 0 replies; 11+ messages in thread From: Vladimir Zapolskiy @ 2026-05-08 10:44 UTC (permalink / raw) To: Hangxiang Ma, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel On 5/8/26 11:36, Hangxiang Ma wrote: > Qualcomm Kaanapali SoC has three Camera Control Interface (CCI). Each > controller contains two I2C hosts. > > Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl 2026-05-08 8:36 [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Hangxiang Ma 2026-05-08 8:36 ` [PATCH 1/3] arm64: dts: qcom: kaanapali: Add camss node Hangxiang Ma 2026-05-08 8:36 ` [PATCH 2/3] arm64: dts: qcom: kaanapali: Add CCI definitions Hangxiang Ma @ 2026-05-08 8:36 ` Hangxiang Ma 2026-05-08 10:40 ` Vladimir Zapolskiy 2026-06-19 15:36 ` Konrad Dybcio 2026-07-08 14:56 ` [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Bjorn Andersson 3 siblings, 2 replies; 11+ messages in thread From: Hangxiang Ma @ 2026-05-08 8:36 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel, Hangxiang Ma Define pinctrl definitions to enable camera master clocks on Kaanapali. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 56 +++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi index ed7b7af6c43f..1b0ce1d29390 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -3903,6 +3903,62 @@ tlmm: pinctrl@f100000 { #interrupt-cells = <2>; wakeup-parent = <&pdc>; + cam0_default: cam0-default-state { + pins = "gpio89"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam1_default: cam1-default-state { + pins = "gpio90"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam2_default: cam2-default-state { + pins = "gpio91"; + function = "cam_asc_mclk2"; + drive-strength = <2>; + bias-disable; + }; + + cam3_default: cam3-default-state { + pins = "gpio92"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam4_default: cam4-default-state { + pins = "gpio93"; + function = "cam_asc_mclk4"; + drive-strength = <2>; + bias-disable; + }; + + cam5_default: cam5-default-state { + pins = "gpio94"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam6_default: cam6-default-state { + pins = "gpio95"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam7_default: cam7-default-state { + pins = "gpio96"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + cci0_0_default: cci0-0-default-state { sda-pins { pins = "gpio109"; -- 2.34.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl 2026-05-08 8:36 ` [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma @ 2026-05-08 10:40 ` Vladimir Zapolskiy 2026-06-19 15:36 ` Konrad Dybcio 1 sibling, 0 replies; 11+ messages in thread From: Vladimir Zapolskiy @ 2026-05-08 10:40 UTC (permalink / raw) To: Hangxiang Ma, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel On 5/8/26 11:36, Hangxiang Ma wrote: > Define pinctrl definitions to enable camera master clocks on Kaanapali. > > Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl 2026-05-08 8:36 ` [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma 2026-05-08 10:40 ` Vladimir Zapolskiy @ 2026-06-19 15:36 ` Konrad Dybcio 1 sibling, 0 replies; 11+ messages in thread From: Konrad Dybcio @ 2026-06-19 15:36 UTC (permalink / raw) To: Hangxiang Ma, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel On 5/8/26 10:36 AM, Hangxiang Ma wrote: > Define pinctrl definitions to enable camera master clocks on Kaanapali. > > Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/3] Add CCI and CAMSS support for Kaanapali 2026-05-08 8:36 [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Hangxiang Ma ` (2 preceding siblings ...) 2026-05-08 8:36 ` [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma @ 2026-07-08 14:56 ` Bjorn Andersson 2026-07-13 2:44 ` Hangxiang Ma 3 siblings, 1 reply; 11+ messages in thread From: Bjorn Andersson @ 2026-07-08 14:56 UTC (permalink / raw) To: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Hangxiang Ma Cc: linux-arm-msm, devicetree, linux-kernel On Fri, 08 May 2026 01:36:44 -0700, Hangxiang Ma wrote: > This series adds CCI and CAMSS support for Qualcomm Kaanapali SoC. > > This series has been tested using the following commands with a downstream > driver for S5KJN5 sensor. > - media-ctl --reset > - media-ctl -V '"msm_csiphy2":0[fmt:SGBRG10/4096x3072]' > - media-ctl -V '"msm_csid0":0[fmt:SGBRG10/4096x3072]' > - media-ctl -V '"msm_vfe0_rdi0":0[fmt:SGBRG10/4096x3072]' > - media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]' > - media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' > - yavta --capture=20 -I -n 5 -f SGBRG10P -s 4096x3072 -F /dev/video0 > > [...] Applied, thanks! [1/3] arm64: dts: qcom: kaanapali: Add camss node commit: 7cc8ca0387f572a4d69941fe380e7a262342491d [2/3] arm64: dts: qcom: kaanapali: Add CCI definitions commit: c25b80614c31a30b1b0f44fc5ae260aff90fa4aa [3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl commit: b6f8ecb80c1f894bcd0c612bf0ed4c5fee52d287 Best regards, -- Bjorn Andersson <andersson@kernel.org> ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/3] Add CCI and CAMSS support for Kaanapali 2026-07-08 14:56 ` [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Bjorn Andersson @ 2026-07-13 2:44 ` Hangxiang Ma 2026-07-15 20:19 ` Bjorn Andersson 0 siblings, 1 reply; 11+ messages in thread From: Hangxiang Ma @ 2026-07-13 2:44 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: linux-arm-msm, devicetree, linux-kernel On 7/8/2026 10:56 PM, Bjorn Andersson wrote: > > On Fri, 08 May 2026 01:36:44 -0700, Hangxiang Ma wrote: >> This series adds CCI and CAMSS support for Qualcomm Kaanapali SoC. >> >> This series has been tested using the following commands with a downstream >> driver for S5KJN5 sensor. >> - media-ctl --reset >> - media-ctl -V '"msm_csiphy2":0[fmt:SGBRG10/4096x3072]' >> - media-ctl -V '"msm_csid0":0[fmt:SGBRG10/4096x3072]' >> - media-ctl -V '"msm_vfe0_rdi0":0[fmt:SGBRG10/4096x3072]' >> - media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]' >> - media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' >> - yavta --capture=20 -I -n 5 -f SGBRG10P -s 4096x3072 -F /dev/video0 >> >> [...] > > Applied, thanks! > > [1/3] arm64: dts: qcom: kaanapali: Add camss node > commit: 7cc8ca0387f572a4d69941fe380e7a262342491d > [2/3] arm64: dts: qcom: kaanapali: Add CCI definitions > commit: c25b80614c31a30b1b0f44fc5ae260aff90fa4aa > [3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl > commit: b6f8ecb80c1f894bcd0c612bf0ed4c5fee52d287 > > Best regards, Sorry Bjorn, the camss binding + driver series wasn't merged as expected, which would cause dt-binding checker failure. Could you please revert this series? Bryan expect us to rebase on his new re-arch camss and the binding/dtsi may be changed accordingly. Thanks a lot. Best regards, Hangxiang ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/3] Add CCI and CAMSS support for Kaanapali 2026-07-13 2:44 ` Hangxiang Ma @ 2026-07-15 20:19 ` Bjorn Andersson 0 siblings, 0 replies; 11+ messages in thread From: Bjorn Andersson @ 2026-07-15 20:19 UTC (permalink / raw) To: Hangxiang Ma Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-msm, devicetree, linux-kernel On Mon, Jul 13, 2026 at 10:44:57AM +0800, Hangxiang Ma wrote: > On 7/8/2026 10:56 PM, Bjorn Andersson wrote: > > > > On Fri, 08 May 2026 01:36:44 -0700, Hangxiang Ma wrote: > > > This series adds CCI and CAMSS support for Qualcomm Kaanapali SoC. > > > > > > This series has been tested using the following commands with a downstream > > > driver for S5KJN5 sensor. > > > - media-ctl --reset > > > - media-ctl -V '"msm_csiphy2":0[fmt:SGBRG10/4096x3072]' > > > - media-ctl -V '"msm_csid0":0[fmt:SGBRG10/4096x3072]' > > > - media-ctl -V '"msm_vfe0_rdi0":0[fmt:SGBRG10/4096x3072]' > > > - media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]' > > > - media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' > > > - yavta --capture=20 -I -n 5 -f SGBRG10P -s 4096x3072 -F /dev/video0 > > > > > > [...] > > > > Applied, thanks! > > > > [1/3] arm64: dts: qcom: kaanapali: Add camss node > > commit: 7cc8ca0387f572a4d69941fe380e7a262342491d > > [2/3] arm64: dts: qcom: kaanapali: Add CCI definitions > > commit: c25b80614c31a30b1b0f44fc5ae260aff90fa4aa > > [3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl > > commit: b6f8ecb80c1f894bcd0c612bf0ed4c5fee52d287 > > > > Best regards, > > Sorry Bjorn, the camss binding + driver series wasn't merged as expected, > which would cause dt-binding checker failure. Could you please revert this > series? Bryan expect us to rebase on his new re-arch camss and the > binding/dtsi may be changed accordingly. Thanks a lot. > Thank you, I missed this in my dtbs_check. I have backed these changes out. Regards, Bjorn > Best regards, > Hangxiang ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-07-15 20:19 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-05-08 8:36 [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Hangxiang Ma 2026-05-08 8:36 ` [PATCH 1/3] arm64: dts: qcom: kaanapali: Add camss node Hangxiang Ma 2026-05-08 10:45 ` Vladimir Zapolskiy 2026-05-08 8:36 ` [PATCH 2/3] arm64: dts: qcom: kaanapali: Add CCI definitions Hangxiang Ma 2026-05-08 10:44 ` Vladimir Zapolskiy 2026-05-08 8:36 ` [PATCH 3/3] arm64: dts: qcom: kaanapali: Add camera MCLK pinctrl Hangxiang Ma 2026-05-08 10:40 ` Vladimir Zapolskiy 2026-06-19 15:36 ` Konrad Dybcio 2026-07-08 14:56 ` [PATCH 0/3] Add CCI and CAMSS support for Kaanapali Bjorn Andersson 2026-07-13 2:44 ` Hangxiang Ma 2026-07-15 20:19 ` Bjorn Andersson
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox