From: Keith Busch <kbusch@kernel.org>
To: Anuj Gupta <anuj1072538@gmail.com>
Cc: changfengnan <changfengnan@bytedance.com>,
axboe@kernel.dk, hch@lst.de, sagi@grimberg.me,
linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org,
Guzebing <guzebing@bytedance.com>,
anuj20.g@samsung.com
Subject: Re: [RESEND RFC PATCH v2] nvme-pci: add adaptive interrupt polling
Date: Fri, 14 Aug 2026 16:16:33 -0600 [thread overview]
Message-ID: <an-TwefeWQTSM1ZH@kbusch-mbp> (raw)
In-Reply-To: <mxcthoo4vrlki7smlaqwh64hdyjkuovjrfzsyzdma4ktcrrc4k@g4dph2ouwnbv>
On Thu, Aug 13, 2026 at 09:15:31AM +0530, Anuj Gupta wrote:
>
> I also had a similar assesment on DIM. Emperically, with Keith's POC
> interrupts per IO drop from ~1.0 to ~0.29 but with a small performance
> regression (572K -> 557K IOPS). With your original approach they drop to
> ~0.03 with a 23% performance gain. The DIM machinery overhead maybe
> outweighing the partial interrupt reduction.
I may ultimately adandon this suggestion, but it looks like a major
factor in performance loss was from using IRQ_WAKE_THREAD with sleep
cycles instead of the softirq hrtimer. Just changing that is getting me
back to performance parity, but since it's not any better, perhaps the
hill climb is a worse algorithm than trying to reason out the delayed
poll time directly.
next prev parent reply other threads:[~2026-08-14 22:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-06 3:10 [RESEND RFC PATCH v2] nvme-pci: add adaptive interrupt polling Fengnan Chang
2026-08-10 20:55 ` Keith Busch
2026-08-11 2:32 ` changfengnan
2026-08-11 20:29 ` Keith Busch
2026-08-13 2:11 ` changfengnan
2026-08-13 3:45 ` Anuj Gupta
2026-08-14 22:16 ` Keith Busch [this message]
2026-08-12 17:50 ` Anuj Gupta
2026-08-13 2:04 ` changfengnan
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