From: Frank Li <Frank.li@oss.nxp.com>
To: Koichiro Den <den@valinux.co.jp>
Cc: "Manivannan Sadhasivam" <mani@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Frank Li" <Frank.Li@kernel.org>,
"Marek Vasut" <marek.vasut+renesas@mailbox.org>,
"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 2/6] PCI: endpoint: Add DMA auxiliary resource metadata
Date: Tue, 4 Aug 2026 10:26:33 -0500 [thread overview]
Message-ID: <anIEqUqEni_CDVFi@SMW015318> (raw)
In-Reply-To: <20260804033855.2115817-3-den@valinux.co.jp>
On Tue, Aug 04, 2026 at 12:38:51PM +0900, Koichiro Den wrote:
> Extend EPC auxiliary resource metadata so endpoint functions can
> discover controller-owned DMA registers, logical DMA channels, and
> descriptor memory.
>
> The DMA metadata is intentionally generic at the EPC layer. A backend
> reports the register layout, channel counts, logical channel resources,
> and descriptor memory resources. Logical channels carry hardware channel
> numbers and refer to descriptor memory by ID; reserving or delegating
> those channels is handled by separate EPC operations so resource metadata
> stays independent of any backend-specific DMA provider. Descriptor memory
> is identified separately so one memory resource can be shared by multiple
> channels.
>
> For DesignWare controllers, reg_layout_data carries the eDMA/HDMA map
> format so a consumer can distinguish legacy, unroll, HDMA compatible,
> and HDMA native register layouts without making the EPC API itself
> DesignWare-specific.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Changes in v6:
> - No changes.
>
> include/linux/pci-epc.h | 46 +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
> index f247cf9bcf1a..8c89cb6d6733 100644
> --- a/include/linux/pci-epc.h
> +++ b/include/linux/pci-epc.h
> @@ -65,6 +65,9 @@ struct pci_epc_map {
> * enum pci_epc_aux_resource_type - auxiliary resource type identifiers
> * @PCI_EPC_AUX_DOORBELL_MMIO: Doorbell MMIO, that might be outside the DMA
> * controller register window
> + * @PCI_EPC_AUX_DMA_CTRL_MMIO: DMA controller MMIO register window
> + * @PCI_EPC_AUX_DMA_CHAN: Logical DMA channel
> + * @PCI_EPC_AUX_DMA_DESC_MEM: DMA descriptor memory
> *
> * EPC backends may expose auxiliary blocks (e.g. DMA engines) by mapping their
> * register windows and descriptor memories into BAR space. This enum
> @@ -72,6 +75,29 @@ struct pci_epc_map {
> */
> enum pci_epc_aux_resource_type {
> PCI_EPC_AUX_DOORBELL_MMIO,
> + PCI_EPC_AUX_DMA_CTRL_MMIO,
> + PCI_EPC_AUX_DMA_CHAN,
> + PCI_EPC_AUX_DMA_DESC_MEM,
> +};
> +
> +/**
> + * enum pci_epc_aux_dma_reg_layout - DMA controller register layout
> + * @PCI_EPC_AUX_DMA_REG_LAYOUT_UNKNOWN: unknown or uninitialized layout
> + * @PCI_EPC_AUX_DMA_REG_LAYOUT_DW_EDMA: Synopsys DesignWare eDMA/HDMA layout
> + */
> +enum pci_epc_aux_dma_reg_layout {
> + PCI_EPC_AUX_DMA_REG_LAYOUT_UNKNOWN = 0,
> + PCI_EPC_AUX_DMA_REG_LAYOUT_DW_EDMA,
> +};
> +
> +/**
> + * enum pci_epc_aux_dma_dir - DMA channel direction relative to the endpoint
> + * @PCI_EPC_AUX_DMA_EP_TO_RC: channel moves data from endpoint to root complex
> + * @PCI_EPC_AUX_DMA_RC_TO_EP: channel moves data from root complex to endpoint
> + */
> +enum pci_epc_aux_dma_dir {
> + PCI_EPC_AUX_DMA_EP_TO_RC,
> + PCI_EPC_AUX_DMA_RC_TO_EP,
> };
>
> /**
> @@ -99,6 +125,26 @@ struct pci_epc_aux_resource {
> int irq; /* IRQ number for the doorbell handler */
> u32 data; /* write value to ring the doorbell */
> } db_mmio;
> +
> + /* PCI_EPC_AUX_DMA_CTRL_MMIO */
> + struct {
> + enum pci_epc_aux_dma_reg_layout reg_layout;
> + u32 reg_layout_data;
> + u16 ep_to_rc_ch_cnt;
> + u16 rc_to_ep_ch_cnt;
> + } dma_ctrl;
> +
> + /* PCI_EPC_AUX_DMA_CHAN */
> + struct {
> + enum pci_epc_aux_dma_dir dir;
> + u16 hw_ch;
> + u16 desc_mem_id;
> + } dma_chan;
> +
> + /* PCI_EPC_AUX_DMA_DESC_MEM */
> + struct {
> + u16 id;
> + } dma_desc;
> } u;
> };
>
> --
> 2.51.0
>
next prev parent reply other threads:[~2026-08-04 15:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-04 3:38 [PATCH v6 0/6] PCI: endpoint: Expose endpoint DMA resources (part 2/3) Koichiro Den
2026-08-04 3:38 ` [PATCH v6 1/6] PCI: endpoint: Define endpoint DMA BAR metadata format Koichiro Den
2026-08-04 15:23 ` Frank Li
2026-08-05 2:03 ` Koichiro Den
2026-08-04 3:38 ` [PATCH v6 2/6] PCI: endpoint: Add DMA auxiliary resource metadata Koichiro Den
2026-08-04 15:26 ` Frank Li [this message]
2026-08-04 3:38 ` [PATCH v6 3/6] PCI: endpoint: Add API to delegate EPC DMA channels to the host Koichiro Den
2026-08-04 16:06 ` Frank Li
2026-08-04 3:38 ` [PATCH v6 4/6] dmaengine: dw-edma: Add delegated channel request helpers Koichiro Den
2026-08-04 16:23 ` Frank Li
2026-08-05 2:05 ` Koichiro Den
2026-08-05 18:47 ` Frank Li
2026-08-06 3:45 ` Koichiro Den
2026-08-06 16:50 ` Frank Li
2026-08-04 3:38 ` [PATCH v6 5/6] PCI: dwc: Implement endpoint DMA channel delegation Koichiro Den
2026-08-04 3:38 ` [PATCH v6 6/6] PCI: dwc: Expose endpoint DMA resources Koichiro Den
2026-08-04 16:29 ` Frank Li
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