[PATCH] soc: qcom: llcc: Update the SCT table for IPQ5424

[PATCH] soc: qcom: llcc: Update the SCT table for IPQ5424

[Kathiravan Thirumoorthy]

Update the IPQ5424 LLCC slice configuration table to match the intended
cache consumers on the SoC.

Assign slice IDs 1 and 5 to the PPE RX descriptor and RX fill use cases,
slice IDs 6 and 7 to the Wi-Fi radios connected over PCIe, and slice ID
2 to the CPU subsystem. Adjust the corresponding capacities, priorities,
and way masks for these consumers.

Rename the usecase IDs for slice IDs 1 and 2 because LLCC_CPUSS and
LLCC_VIDSC0 do not describe the actual users of those slices.

Assisted-by: LLM
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
 drivers/soc/qcom/llcc-qcom.c       | 56 ++++++++++++++++++++++++++++++++------
 include/linux/soc/qcom/llcc-qcom.h |  4 +++
 2 files changed, 52 insertions(+), 8 deletions(-)

diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index 733999867bbf..d60431ace50f 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -626,11 +626,11 @@ static const struct llcc_slice_config glymur_data[] = {
 
 static const struct llcc_slice_config ipq5424_data[] =  {
 	{
-		.usecase_id = LLCC_CPUSS,
+		.usecase_id = LLCC_PPE_RXDESC,
 		.slice_id = 1,
-		.max_cap = 768,
-		.priority = 1,
-		.bonus_ways = 0xFFFF,
+		.max_cap = 128,
+		.priority = 3,
+		.bonus_ways = 0x0FFF,
 		.retain_on_pc = true,
 		.activate_on_init = true,
 		.write_scid_cacheable_en = true,
@@ -642,12 +642,52 @@ static const struct llcc_slice_config ipq5424_data[] =  {
 		.vict_prio = true,
 	},
 	{
-		.usecase_id = LLCC_VIDSC0,
+		.usecase_id = LLCC_CPUSS,
 		.slice_id = 2,
-		.max_cap = 256,
-		.priority = 2,
+		.max_cap = 768,
+		.priority = 1,
 		.fixed_size = true,
-		.bonus_ways = 0xF000,
+		.bonus_ways = 0x0FFF,
+		.retain_on_pc = true,
+		.activate_on_init = true,
+		.write_scid_cacheable_en = true,
+		.stale_en = true,
+		.stale_cap_en = true,
+	},
+	{
+		.usecase_id = LLCC_PPE_RXFILL,
+		.slice_id = 5,
+		.max_cap = 128,
+		.priority = 3,
+		.bonus_ways = 0x0FFF,
+		.retain_on_pc = true,
+		.activate_on_init = true,
+		.write_scid_cacheable_en = true,
+		.stale_en = true,
+		.stale_cap_en = true,
+		.alloc_oneway_en = true,
+		.ovcap_en = true,
+		.ovcap_prio = true,
+		.vict_prio = true,
+	},
+	{
+		.usecase_id = LLCC_WLAN_5G,
+		.slice_id = 6,
+		.max_cap = 128,
+		.priority = 3,
+		.bonus_ways = 0xC000,
+		.retain_on_pc = true,
+		.activate_on_init = true,
+		.write_scid_cacheable_en = true,
+		.stale_en = true,
+		.stale_cap_en = true,
+	},
+	{
+		.usecase_id = LLCC_WLAN_6G,
+		.slice_id = 7,
+		.max_cap = 128,
+		.priority = 3,
+		.bonus_ways = 0x3000,
 		.retain_on_pc = true,
 		.activate_on_init = true,
 		.write_scid_cacheable_en = true,
diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
index f3ed63e475ab..1ccc429401e8 100644
--- a/include/linux/soc/qcom/llcc-qcom.h
+++ b/include/linux/soc/qcom/llcc-qcom.h
@@ -86,6 +86,10 @@
 #define LLCC_CPUSS_HEU	 94
 #define LLCC_PCIE_TCU	 97
 #define LLCC_MDM_PNG_FIXED	 100
+#define LLCC_PPE_RXDESC		 101
+#define LLCC_PPE_RXFILL		 102
+#define LLCC_WLAN_5G		 103
+#define LLCC_WLAN_6G		 104
 
 /**
  * struct llcc_slice_desc - Cache slice descriptor

---
base-commit: ea2bff00da89d7767d677bb68470130ba96f4928
change-id: 20260806-ipq5424_llcc_updates-f9851d6db886

Best regards,
--  
Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>

Re: [PATCH] soc: qcom: llcc: Update the SCT table for IPQ5424

[Dmitry Baryshkov]

On Fri, Aug 07, 2026 at 02:08:16PM +0530, Kathiravan Thirumoorthy wrote:
> Update the IPQ5424 LLCC slice configuration table to match the intended
> cache consumers on the SoC.
> 
> Assign slice IDs 1 and 5 to the PPE RX descriptor and RX fill use cases,
> slice IDs 6 and 7 to the Wi-Fi radios connected over PCIe, and slice ID
> 2 to the CPU subsystem. Adjust the corresponding capacities, priorities,
> and way masks for these consumers.
> 
> Rename the usecase IDs for slice IDs 1 and 2 because LLCC_CPUSS and
> LLCC_VIDSC0 do not describe the actual users of those slices.

All of this: why? Your tool has provided a summary of the changes, which
is useless.

> 
> Assisted-by: LLM

Which one?

> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
> ---
>  drivers/soc/qcom/llcc-qcom.c       | 56 ++++++++++++++++++++++++++++++++------
>  include/linux/soc/qcom/llcc-qcom.h |  4 +++
>  2 files changed, 52 insertions(+), 8 deletions(-)

-- 
With best wishes
Dmitry

Re: [PATCH] soc: qcom: llcc: Update the SCT table for IPQ5424

[Kathiravan Thirumoorthy]

On 8/7/2026 2:35 PM, Dmitry Baryshkov wrote:
> On Fri, Aug 07, 2026 at 02:08:16PM +0530, Kathiravan Thirumoorthy wrote:
>> Update the IPQ5424 LLCC slice configuration table to match the intended
>> cache consumers on the SoC.
>>
>> Assign slice IDs 1 and 5 to the PPE RX descriptor and RX fill use cases,
>> slice IDs 6 and 7 to the Wi-Fi radios connected over PCIe, and slice ID
>> 2 to the CPU subsystem. Adjust the corresponding capacities, priorities,
>> and way masks for these consumers.
>>
>> Rename the usecase IDs for slice IDs 1 and 2 because LLCC_CPUSS and
>> LLCC_VIDSC0 do not describe the actual users of those slices.
> All of this: why? Your tool has provided a summary of the changes, which
> is useless.

Having the dedicated slice configuration for each of these use cases 
helps to improve the networking throughput by more than 1 Gbps.

Let me amend the commit message with the above information. Please let 
me know if that helps.

>
>> Assisted-by: LLM
> Which one?

As per the updated guideline [1], this is what expected.

[1] 816d9992d9ed ("coding-assistants: simplify attribution")

>
>> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
>> ---
>>   drivers/soc/qcom/llcc-qcom.c       | 56 ++++++++++++++++++++++++++++++++------
>>   include/linux/soc/qcom/llcc-qcom.h |  4 +++
>>   2 files changed, 52 insertions(+), 8 deletions(-)