[PATCH 1/2] watchdog: sbsa_wdog: Fix the timeout calculation while programming

[PATCH 1/2] watchdog: sbsa_wdog: Fix the timeout calculation while programming

[George Cherian]

The time out calculation done in sbsa_gwdt_set_timeout() would always
return a 32-bit value. Use proper typecasting to make sure the overflow
values are captured.

Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1")

Signed-off-by: George Cherian <george.cherian@marvell.com>
---
 drivers/watchdog/sbsa_gwdt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
index 9791c74aebd4..aaa3f5631f29 100644
--- a/drivers/watchdog/sbsa_gwdt.c
+++ b/drivers/watchdog/sbsa_gwdt.c
@@ -152,14 +152,14 @@ static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd,
 	wdd->timeout = timeout;
 
 	if (action)
-		sbsa_gwdt_reg_write(gwdt->clk * timeout, gwdt);
+		sbsa_gwdt_reg_write((u64)gwdt->clk * (u64)timeout, gwdt);
 	else
 		/*
 		 * In the single stage mode, The first signal (WS0) is ignored,
 		 * the timeout is (WOR * 2), so the WOR should be configured
 		 * to half value of timeout.
 		 */
-		sbsa_gwdt_reg_write(gwdt->clk / 2 * timeout, gwdt);
+		sbsa_gwdt_reg_write((u64)gwdt->clk / 2 * (u64)timeout, gwdt);
 
 	return 0;
 }
-- 
2.34.1

[PATCH 2/2] watchdog: sbsa_wdog: Make sure to program a larger timeout value

[George Cherian]

There could be a corner case were-in the timeout value calculated will
become way to less than the calculated value since we are rounding down
the timeout value from 64-bit to 32-bit. To avoid hitting such cases,
make sure to program the timeout value to be UINT_MAX if the timeout
value is greater than UINT_MAX and the imeplementation is sbsa watchdog
revision 0.

Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1")

Signed-off-by: George Cherian <george.cherian@marvell.com>
---
 drivers/watchdog/sbsa_gwdt.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
index aaa3f5631f29..028e450ed547 100644
--- a/drivers/watchdog/sbsa_gwdt.c
+++ b/drivers/watchdog/sbsa_gwdt.c
@@ -135,10 +135,14 @@ static u64 sbsa_gwdt_reg_read(struct sbsa_gwdt *gwdt)
 
 static void sbsa_gwdt_reg_write(u64 val, struct sbsa_gwdt *gwdt)
 {
-	if (gwdt->version == 0)
-		writel((u32)val, gwdt->control_base + SBSA_GWDT_WOR);
-	else
+	if (gwdt->version == 0) {
+		if (val > UINT_MAX)
+			writel(UINT_MAX, gwdt->control_base + SBSA_GWDT_WOR);
+		else
+			writel((u32)val, gwdt->control_base + SBSA_GWDT_WOR);
+	} else {
 		lo_hi_writeq(val, gwdt->control_base + SBSA_GWDT_WOR);
+	}
 }
 
 /*
-- 
2.34.1

Re: [PATCH 1/2] watchdog: sbsa_wdog: Fix the timeout calculation while programming

[Guenter Roeck]

On 2/6/23 20:46, George Cherian wrote:
> The time out calculation done in sbsa_gwdt_set_timeout() would always
> return a 32-bit value. Use proper typecasting to make sure the overflow
> values are captured.
> 
> Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1")
> 
> Signed-off-by: George Cherian <george.cherian@marvell.com>
> ---
>   drivers/watchdog/sbsa_gwdt.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
> index 9791c74aebd4..aaa3f5631f29 100644
> --- a/drivers/watchdog/sbsa_gwdt.c
> +++ b/drivers/watchdog/sbsa_gwdt.c
> @@ -152,14 +152,14 @@ static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd,
>   	wdd->timeout = timeout;
>   
>   	if (action)
> -		sbsa_gwdt_reg_write(gwdt->clk * timeout, gwdt);
> +		sbsa_gwdt_reg_write((u64)gwdt->clk * (u64)timeout, gwdt);
>   	else
>   		/*
>   		 * In the single stage mode, The first signal (WS0) is ignored,
>   		 * the timeout is (WOR * 2), so the WOR should be configured
>   		 * to half value of timeout.
>   		 */
> -		sbsa_gwdt_reg_write(gwdt->clk / 2 * timeout, gwdt);
> +		sbsa_gwdt_reg_write((u64)gwdt->clk / 2 * (u64)timeout, gwdt);
>   
>   	return 0;
>   }

The driver sets max_hw_heartbeat_ms. It is its responsibility to clamp
the timeout value written into the controller to the configured limit
to avoid confusing the watchdog core. Something like

	timeout = clamp(timeout, 0, wdd->max_hw_heartbeat_ms / 1000);

This also solves the problem in patch 2 since it guarantees that the
resulting register value is <= U32_MAX for version 0.

Guenter

Re: [PATCH 1/2] watchdog: sbsa_wdog: Fix the timeout calculation while programming

[George Cherian]

> -----Original Message-----
> From: Guenter Roeck <groeck7@gmail.com> On Behalf Of Guenter Roeck
> Sent: Tuesday, February 7, 2023 9:34 PM
> To: George Cherian <gcherian@marvell.com>; wim@linux-watchdog.org;
> zhangshaokun@hisilicon.com
> Cc: linux-watchdog@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 1/2] watchdog: sbsa_wdog: Fix the timeout
> calculation while programming
> 
> 
> ----------------------------------------------------------------------
> On 2/6/23 20:46, George Cherian wrote:
> > The time out calculation done in sbsa_gwdt_set_timeout() would always
> > return a 32-bit value. Use proper typecasting to make sure the overflow
> > values are captured.
> >
> > Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1")
> >
> > Signed-off-by: George Cherian <george.cherian@marvell.com>
> > ---
> >   drivers/watchdog/sbsa_gwdt.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/watchdog/sbsa_gwdt.c
> b/drivers/watchdog/sbsa_gwdt.c
> > index 9791c74aebd4..aaa3f5631f29 100644
> > --- a/drivers/watchdog/sbsa_gwdt.c
> > +++ b/drivers/watchdog/sbsa_gwdt.c
> > @@ -152,14 +152,14 @@ static int sbsa_gwdt_set_timeout(struct
> watchdog_device *wdd,
> >   	wdd->timeout = timeout;
> >
> >   	if (action)
> > -		sbsa_gwdt_reg_write(gwdt->clk * timeout, gwdt);
> > +		sbsa_gwdt_reg_write((u64)gwdt->clk * (u64)timeout, gwdt);
> >   	else
> >   		/*
> >   		 * In the single stage mode, The first signal (WS0) is ignored,
> >   		 * the timeout is (WOR * 2), so the WOR should be
> configured
> >   		 * to half value of timeout.
> >   		 */
> > -		sbsa_gwdt_reg_write(gwdt->clk / 2 * timeout, gwdt);
> > +		sbsa_gwdt_reg_write((u64)gwdt->clk / 2 * (u64)timeout,
> gwdt);
> >
> >   	return 0;
> >   }
> 
> The driver sets max_hw_heartbeat_ms. It is its responsibility to clamp
> the timeout value written into the controller to the configured limit
> to avoid confusing the watchdog core. Something like
> 
> 	timeout = clamp(timeout, 0, wdd->max_hw_heartbeat_ms / 1000);
> 
> This also solves the problem in patch 2 since it guarantees that the
> resulting register value is <= U32_MAX for version 0.

 Thanks for the review.  I will update accordingly and post a v2.

> 
> Guenter

Regards,
-George