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From: Sascha Bischoff <Sascha.Bischoff@arm.com>
To: "maz@kernel.org" <maz@kernel.org>,
	"lpieralisi@kernel.org" <lpieralisi@kernel.org>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"tglx@kernel.org" <tglx@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	nd <nd@arm.com>
Subject: Re: [PATCH 0/3] irqchip/gic-v5: Tidy up LPI allocation
Date: Tue, 5 May 2026 09:03:55 +0000	[thread overview]
Message-ID: <f1b8c1285cb44851f8cd8046d3cf20ff3e67db98.camel@arm.com> (raw)
In-Reply-To: <afhcw4u4413uZeUM@lpieralisi>

On Mon, 2026-05-04 at 10:45 +0200, Lorenzo Pieralisi wrote:
> On Sat, May 02, 2026 at 11:40:10AM +0100, Marc Zyngier wrote:
> > Hi Sascha,
> > 
> > On Thu, 30 Apr 2026 16:33:58 +0100,
> > Sascha Bischoff <Sascha.Bischoff@arm.com> wrote:
> > > 
> > > LPIs are owned by the LPI domain, so allocating and freeing them
> > > from
> > > the ITS MSI and IPI domains was always a bit backwards. Those
> > > domains
> > > should only ask their parent for interrupts, and never need to
> > > know how the parent picks or releases the underlying LPIs (or do
> > > it on
> > > behalf of said parent, as was the case).
> > > 
> > > This series moves LPI allocation into the LPI domain itself and
> > > removes the exported wrappers that allowed LPI allocation from
> > > elsewhere.
> > > 
> > > With that done, the LPI domain can also be slightly reworked to
> > > support allocating and freeing more than one LPI at a time. This
> > > rework is extended to the IPI allocation, too. The last patch
> > > makes
> > > the ITS MSI domain request its parent interrupts as a single
> > > range,
> > > matching the IPI cleanup from the previous patch.
> > > 
> > > As a side effect of these changes, the IPI path now unwinds
> > > earlier
> > > parent allocations correctly if a later allocation fails.
> > 
> > Thanks for cleaning up this mess. It aligns the GICv5 host code
> > with
> > the expectations we have for hierarchical domains (don't mess with
> > your parent's allocations), and will make the KVM management of
> > doorbell LPIs less awkward. It also removes global helpers that
> > always
> > irked me, so:
> 
> Bah, sorry, it not only breaks the IRQ domains expectations but
> the current allocation is really braindead - I was too fixated on
> the IDA 1 by 1 allocation (that should really disappear asap) that
> I could not see the wood for the trees.
> 
> Thank you Sascha for cleaning it up.

No worries at all. Frankly, it is a hangover from early prototyping,
and hence my fault to begin with!

Thanks for taking the time to review this, both.

Sascha

> 
> Reviewed-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
> 
> > Reviewed-by: Marc Zyngier <maz@kernel.org>
> > 
> > Thomas, could you please take th in at the earliest opportunity?
> > 
> > Thanks,
> > 
> > 	M.
> > 
> > -- 
> > Jazz isn't dead. It just smells funny.


      reply	other threads:[~2026-05-05  9:05 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-30 15:33 [PATCH 0/3] irqchip/gic-v5: Tidy up LPI allocation Sascha Bischoff
2026-04-30 15:34 ` [PATCH 1/3] irqchip/gic-v5: Move LPI alloc/free into LPI domain Sascha Bischoff
2026-05-05 20:02   ` Thomas Gleixner
2026-04-30 15:34 ` [PATCH 2/3] irqchip/gic-v5: Allow for nr_irqs > 1 for LPI alloc and teardown Sascha Bischoff
2026-05-05 20:08   ` Thomas Gleixner
2026-04-30 15:34 ` [PATCH 3/3] irqchip/gic-v5: Allocate ITS parent LPIs as a range Sascha Bischoff
2026-05-02 10:40 ` [PATCH 0/3] irqchip/gic-v5: Tidy up LPI allocation Marc Zyngier
2026-05-04  8:45   ` Lorenzo Pieralisi
2026-05-05  9:03     ` Sascha Bischoff [this message]

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