[PATCH v2 0/2] Add support for K3 BIST

[PATCH v2 0/2] Add support for K3 BIST

[Neha Malcom Francis]

BIST (Built-In Self Test) is an IP responsible for triggering hardware
circuitry tests on both logic as well as memory blocks. This driver is
currently being upstreamed in U-Boot [1] and triggers these tests on
cores. This patch series adds the dt-binding as well as a node for BIST
on J784S4.

Changes since v1:
https://lore.kernel.org/all/20241128140825.263216-1-n-francis@ti.com/
- Krzysztof
    - move from misc/ to soc/ti/
    - minor property changes
    - drop ti,bist-instance and instead opt for ti,bist-under-test
    - correct example dt

[1] https://lore.kernel.org/all/20250204123147.939917-1-n-francis@ti.com/

Neha Malcom Francis (2):
  dt-bindings: soc: ti: bist: Add BIST for K3 devices
  arm64: dts: ti: k3-j784s4-main: Add PBIST_14 node

 .../bindings/soc/ti/ti,j784s4-bist.yaml       | 67 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 11 +++
 2 files changed, 78 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml

-- 
2.34.1

[PATCH v2 1/2] dt-bindings: soc: ti: bist: Add BIST for K3 devices

[Neha Malcom Francis]

Document the binding for TI K3 BIST (Built-In Self Test) block.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 .../bindings/soc/ti/ti,j784s4-bist.yaml       | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml

diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
new file mode 100644
index 000000000000..f714a1fc550a
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2025 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/ti/ti,j784s4-bist.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 BIST
+
+maintainers:
+  - Neha Malcom Francis <n-francis@ti.com>
+
+description:
+  The BIST (Built-In Self Test) module is an IP block present in K3 devices
+  that support triggering of BIST tests, both PBIST (Memory BIST) and LBIST
+  (Logic BIST) on a core. Both tests are destructive in nature. At boot, BIST
+  is executed by hardware for the MCU domain automatically as part of HW POST.
+
+properties:
+  compatible:
+    const: ti,j784s4-bist
+
+  reg:
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: cfg
+      - const: ctrl_mmr
+
+  clocks:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  ti,bist-under-test:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description:
+      the device IDs of the devices under test control of the BIST device, the
+      number of devices may be more than one. The HW logic will trigger the
+      tests on all of these devices at once.
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - ti,bist-under-test
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/soc/ti,sci_pm_domain.h>
+    bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+        safety-selftest@33c0000 {
+            compatible = "ti,j784s4-bist";
+            reg = <0x00 0x033c0000 0x00 0x400>,
+                  <0x00 0x0010c1a0 0x00 0x01c>;
+            reg-names = "cfg", "ctrl_mmr";
+            clocks = <&k3_clks 237 7>;
+            power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
+            ti,bist-under-test = <343>, <344>, <365>, <366>;
+        };
+    };
-- 
2.34.1

Re: [PATCH v2 1/2] dt-bindings: soc: ti: bist: Add BIST for K3 devices

[Krzysztof Kozlowski]

On 28/03/2025 12:14, Neha Malcom Francis wrote:
> +properties:
> +  compatible:
> +    const: ti,j784s4-bist
> +
> +  reg:
> +    maxItems: 2
> +
> +  reg-names:
> +    items:
> +      - const: cfg
> +      - const: ctrl_mmr
> +
> +  clocks:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  ti,bist-under-test:
> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    description:
> +      the device IDs of the devices under test control of the BIST device, the

Still not phandle... What is a "device ID"?

> +      number of devices may be more than one. The HW logic will trigger the
> +      tests on all of these devices at once.
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - ti,bist-under-test
> +
> +additionalProperties: false


Best regards,
Krzysztof

Re: [PATCH v2 1/2] dt-bindings: soc: ti: bist: Add BIST for K3 devices

[Neha Malcom Francis]

On 28/03/25 17:18, Krzysztof Kozlowski wrote:
> On 28/03/2025 12:14, Neha Malcom Francis wrote:
>> +properties:
>> +  compatible:
>> +    const: ti,j784s4-bist
>> +
>> +  reg:
>> +    maxItems: 2
>> +
>> +  reg-names:
>> +    items:
>> +      - const: cfg
>> +      - const: ctrl_mmr
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  power-domains:
>> +    maxItems: 1
>> +
>> +  ti,bist-under-test:
>> +    $ref: /schemas/types.yaml#/definitions/uint32-array
>> +    description:
>> +      the device IDs of the devices under test control of the BIST device, the
> 
> Still not phandle... What is a "device ID"?

I took a shot at working with the phandle, however the test devices may
or may not be present in the devicetree at bootloader stage which is the
only place this BIST driver can execute (I know I shouldn't be bringing
up the driver here but it's crucial to how I can model this property).
HW mandates you run it as early as possible before any other software
executes on the test device.

So now thinking of other possible ways to define the test devices, we
have unique HW identifiers [1] for each of the device which is what I've
used here...

[1]
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/arm/keystone/ti%2Ck3-sci-common.yaml#L31

> 
>> +      number of devices may be more than one. The HW logic will trigger the
>> +      tests on all of these devices at once.
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - reg-names
>> +  - ti,bist-under-test
>> +
>> +additionalProperties: false
> 
> 
> Best regards,
> Krzysztof

-- 
Thanking You
Neha Malcom Francis

Re: [PATCH v2 1/2] dt-bindings: soc: ti: bist: Add BIST for K3 devices

[Krzysztof Kozlowski]

On 28/03/2025 13:42, Neha Malcom Francis wrote:
> On 28/03/25 17:18, Krzysztof Kozlowski wrote:
>> On 28/03/2025 12:14, Neha Malcom Francis wrote:
>>> +properties:
>>> +  compatible:
>>> +    const: ti,j784s4-bist
>>> +
>>> +  reg:
>>> +    maxItems: 2
>>> +
>>> +  reg-names:
>>> +    items:
>>> +      - const: cfg
>>> +      - const: ctrl_mmr
>>> +
>>> +  clocks:
>>> +    maxItems: 1
>>> +
>>> +  power-domains:
>>> +    maxItems: 1
>>> +
>>> +  ti,bist-under-test:
>>> +    $ref: /schemas/types.yaml#/definitions/uint32-array
>>> +    description:
>>> +      the device IDs of the devices under test control of the BIST device, the
>>
>> Still not phandle... What is a "device ID"?
> 
> I took a shot at working with the phandle, however the test devices may
> or may not be present in the devicetree at bootloader stage which is the

If the nodes are not in DT, then you should not reference them here.
Bootloader is supposed to receive all the nodes it is expected to work on.

> only place this BIST driver can execute (I know I shouldn't be bringing
> up the driver here but it's crucial to how I can model this property).
> HW mandates you run it as early as possible before any other software
> executes on the test device.
> 
> So now thinking of other possible ways to define the test devices, we
> have unique HW identifiers [1] for each of the device which is what I've
> used here...
> 
> [1]
> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/arm/keystone/ti%2Ck3-sci-common.yaml#L31

Then do not redefine properties, but use one common definition.


Best regards,
Krzysztof

Re: [PATCH v2 1/2] dt-bindings: soc: ti: bist: Add BIST for K3 devices

[Neha Malcom Francis]

On 29/03/25 10:08, Krzysztof Kozlowski wrote:
> On 28/03/2025 13:42, Neha Malcom Francis wrote:
>> On 28/03/25 17:18, Krzysztof Kozlowski wrote:
>>> On 28/03/2025 12:14, Neha Malcom Francis wrote:
>>>> +properties:
>>>> +  compatible:
>>>> +    const: ti,j784s4-bist
>>>> +
>>>> +  reg:
>>>> +    maxItems: 2
>>>> +
>>>> +  reg-names:
>>>> +    items:
>>>> +      - const: cfg
>>>> +      - const: ctrl_mmr
>>>> +
>>>> +  clocks:
>>>> +    maxItems: 1
>>>> +
>>>> +  power-domains:
>>>> +    maxItems: 1
>>>> +
>>>> +  ti,bist-under-test:
>>>> +    $ref: /schemas/types.yaml#/definitions/uint32-array
>>>> +    description:
>>>> +      the device IDs of the devices under test control of the BIST device, the
>>>
>>> Still not phandle... What is a "device ID"?
>>
>> I took a shot at working with the phandle, however the test devices may
>> or may not be present in the devicetree at bootloader stage which is the
> 
> If the nodes are not in DT, then you should not reference them here.
> Bootloader is supposed to receive all the nodes it is expected to work on.

Understood.

> 
>> only place this BIST driver can execute (I know I shouldn't be bringing
>> up the driver here but it's crucial to how I can model this property).
>> HW mandates you run it as early as possible before any other software
>> executes on the test device.
>>
>> So now thinking of other possible ways to define the test devices, we
>> have unique HW identifiers [1] for each of the device which is what I've
>> used here...
>>
>> [1]
>> https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/arm/keystone/ti%2Ck3-sci-common.yaml#L31
> 
> Then do not redefine properties, but use one common definition.

Right, I'll respin the driver and the dt-binding in this direction, thanks!

> 
> 
> Best regards,
> Krzysztof

-- 
Thanking You
Neha Malcom Francis

[PATCH v2 2/2] arm64: dts: ti: k3-j784s4-main: Add PBIST_14 node

[Neha Malcom Francis]

Add DT node for PBIST_14 that is responsible for triggering the PBIST
self-tests for the MAIN_R5_2_x cores.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 0160fe0da983..1a26f5e4ace6 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -113,6 +113,17 @@ serdes2: serdes@5020000 {
 			status = "disabled";
 		};
 	};
+
+	bist_main14: bist@33c0000 {
+		compatible = "ti,j784s4-bist";
+		reg = <0x00 0x033c0000 0x00 0x400>,
+		      <0x00 0x0010c1a0 0x00 0x01c>;
+		reg-names = "cfg", "ctrl_mmr";
+		clocks = <&k3_clks 237 7>;
+		power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
+		bootph-pre-ram;
+		ti,bist-under-test = <343>, <344>, <365>, <366>;
+	};
 };
 
 &scm_conf {
-- 
2.34.1