[agd5f:amd-staging-drm-next-queue-reset 60/60] drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2139:11: warning: operator '?:' has lower precedence than '|'; '|' will be evaluated first

[agd5f:amd-staging-drm-next-queue-reset 60/60] drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2139:11: warning: operator '?:' has lower precedence than '|'; '|' will be evaluated first

[kernel test robot]

tree:   https://gitlab.freedesktop.org/agd5f/linux.git amd-staging-drm-next-queue-reset
head:   a5bdae426e5b6593ac3ac0814950110bec1dda31
commit: a5bdae426e5b6593ac3ac0814950110bec1dda31 [60/60] drm/amdgpu/gfx7: add ring reset callback for gfx
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20240721/202407210134.PApSunS1-lkp@intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240721/202407210134.PApSunS1-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202407210134.PApSunS1-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2139:11: warning: operator '?:' has lower precedence than '|'; '|' will be evaluated first [-Wbitwise-conditional-parentheses]
    2135 |         amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |
         |                                  ~~~~~~~~~~~~~~~~~~~~
    2136 |                                  EOP_TC_ACTION_EN |
         |                                  ~~~~~~~~~~~~~~~~~~
    2137 |                                  EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) |
         |                                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    2138 |                                  EVENT_INDEX(5) |
         |                                  ~~~~~~~~~~~~~~~~
    2139 |                                  exec ? EOP_EXEC : 0));
         |                                  ~~~~ ^
   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2139:11: note: place parentheses around the '|' expression to silence this warning
    2135 |         amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |
         |                                  ~~~~~~~~~~~~~~~~~~~~
    2136 |                                  EOP_TC_ACTION_EN |
         |                                  ~~~~~~~~~~~~~~~~~~
    2137 |                                  EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) |
         |                                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    2138 |                                  EVENT_INDEX(5) |
         |                                  ~~~~~~~~~~~~~~~~
    2139 |                                  exec ? EOP_EXEC : 0));
         |                                  ~~~~ ^
   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2139:11: note: place parentheses around the '?:' expression to evaluate it first
    2139 |                                  exec ? EOP_EXEC : 0));
         |                                       ^             
         |                                  (                  )
   1 warning generated.


vim +2139 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

  2100	
  2101	/**
  2102	 * gfx_v7_0_ring_emit_fence_gfx - emit a fence on the gfx ring
  2103	 *
  2104	 * @ring: amdgpu_ring structure holding ring information
  2105	 * @addr: address
  2106	 * @seq: sequence number
  2107	 * @flags: fence related flags
  2108	 *
  2109	 * Emits a fence sequence number on the gfx ring and flushes
  2110	 * GPU caches.
  2111	 */
  2112	static void gfx_v7_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
  2113						 u64 seq, unsigned flags)
  2114	{
  2115		bool write64bit = flags & AMDGPU_FENCE_FLAG_64BIT;
  2116		bool int_sel = flags & AMDGPU_FENCE_FLAG_INT;
  2117		bool exec = flags & AMDGPU_FENCE_FLAG_EXEC;
  2118	
  2119		/* Workaround for cache flush problems. First send a dummy EOP
  2120		 * event down the pipe with seq one below.
  2121		 */
  2122		amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));
  2123		amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |
  2124					 EOP_TC_ACTION_EN |
  2125					 EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) |
  2126					 EVENT_INDEX(5)));
  2127		amdgpu_ring_write(ring, addr & 0xfffffffc);
  2128		amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |
  2129					DATA_SEL(1) | INT_SEL(0));
  2130		amdgpu_ring_write(ring, lower_32_bits(seq - 1));
  2131		amdgpu_ring_write(ring, upper_32_bits(seq - 1));
  2132	
  2133		/* Then send the real EOP event down the pipe. */
  2134		amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));
  2135		amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |
  2136					 EOP_TC_ACTION_EN |
  2137					 EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) |
  2138					 EVENT_INDEX(5) |
> 2139					 exec ? EOP_EXEC : 0));
  2140		amdgpu_ring_write(ring, addr & 0xfffffffc);
  2141		amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |
  2142					DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));
  2143		amdgpu_ring_write(ring, lower_32_bits(seq));
  2144		amdgpu_ring_write(ring, upper_32_bits(seq));
  2145	}
  2146	

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