[geert-renesas-devel:renesas-drivers-for-v6.15 4/6] drivers/soc/renesas/r9a09g047-sys.c:51:6: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations

[geert-renesas-devel:renesas-drivers-for-v6.15 4/6] drivers/soc/renesas/r9a09g047-sys.c:51:6: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations

[kernel test robot]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git renesas-drivers-for-v6.15
head:   106b182b2d7f05703d27e37cbcf23a6fb652872f
commit: 1e5827262bc7f29b3735889919009b744ea8f55d [4/6] soc: renesas: rz-sysc: Add support for RZ/G3E family
config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20250130/202501301435.kjJVK6kR-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 19306351a2c45e266fa11b41eb1362b20b6ca56d)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250130/202501301435.kjJVK6kR-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501301435.kjJVK6kR-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/soc/renesas/r9a09g047-sys.c:51:6: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
      51 |         if (FIELD_GET(SYS_LSI_MODE_STAT_BOOTPLLCA55, mode_val) != SYS_LSI_MODE_CA55_1_7GHZ)
         |             ^
   1 error generated.


vim +/FIELD_GET +51 drivers/soc/renesas/r9a09g047-sys.c

    30	
    31	static void rzg3e_sys_print_id(struct device *dev,
    32					void __iomem *sysc_base,
    33					struct soc_device_attribute *soc_dev_attr)
    34	{
    35		bool is_quad_core, npu_enabled;
    36		u32 prr_val, mode_val;
    37	
    38		prr_val = readl(sysc_base + SYS_LSI_PRR);
    39		mode_val = readl(sysc_base + SYS_LSI_MODE);
    40	
    41		/* Check CPU and NPU configuration */
    42		is_quad_core = !(prr_val & SYS_LSI_PRR_CA55_DIS);
    43		npu_enabled = !(prr_val & SYS_LSI_PRR_NPU_DIS);
    44	
    45		dev_info(dev, "Detected Renesas %s Core %s %s Rev %s%s\n",
    46			 is_quad_core ? "Quad" : "Dual", soc_dev_attr->family,
    47			 soc_dev_attr->soc_id, soc_dev_attr->revision,
    48			 npu_enabled ? " with Ethos-U55" : "");
    49	
    50		/* Check CA55 PLL configuration */
  > 51		if (FIELD_GET(SYS_LSI_MODE_STAT_BOOTPLLCA55, mode_val) != SYS_LSI_MODE_CA55_1_7GHZ)
    52			dev_warn(dev, "CA55 PLL is not set to 1.7GHz\n");
    53	}
    54	

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