Re: [PATCH 2/4] clk: ingenic: Add Ingenic X1600 CGU clock driver support

Re: [PATCH 2/4] clk: ingenic: Add Ingenic X1600 CGU clock driver support

[kernel test robot]

Hi Nikolaus,

kernel test robot noticed the following build warnings:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on robh/for-next linus/master v7.3 next-20261023]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/H-Nikolaus-Schaller/dt-bindings-clock-Add-Ingenic-X1600-CGU-bindings/20261025-201824
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link:    https://lore.kernel.org/r/50983be55e467076e83e3ffc37b30fc4e5648e15.1792955907.git.hns%40goldelico.com
patch subject: [PATCH 2/4] clk: ingenic: Add Ingenic X1600 CGU clock driver support
config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20261026/202610261821.QhaEUvEU-lkp@intel.com/config)
compiler: clang version 24.0.0git (https://github.com/llvm/llvm-project 186e70f4e6a1521991d2340d3d49b23b1beff11f)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20261026/202610261821.QhaEUvEU-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202610261821.QhaEUvEU-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/clk/ingenic/x1600-cgu.c:129:38: warning: variable 'm' is used uninitialized whenever 'for' loop exits because its condition is false [-Wsometimes-uninitialized]
     129 |         for (od_combined = od_combined_min; od_combined <= od_combined_max; od_combined++) {
         |                                             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/ingenic/x1600-cgu.c:141:8: note: uninitialized use occurs here
     141 |         *pm = m;
         |               ^
   drivers/clk/ingenic/x1600-cgu.c:129:38: note: remove the condition if it is always true
     129 |         for (od_combined = od_combined_min; od_combined <= od_combined_max; od_combined++) {
         |                                             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/ingenic/x1600-cgu.c:115:17: note: initialize the variable 'm' to silence this warning
     115 |         unsigned long m, n;
         |                        ^
         |                         = 0
>> drivers/clk/ingenic/x1600-cgu.c:129:38: warning: variable 'n' is used uninitialized whenever 'for' loop exits because its condition is false [-Wsometimes-uninitialized]
     129 |         for (od_combined = od_combined_min; od_combined <= od_combined_max; od_combined++) {
         |                                             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/ingenic/x1600-cgu.c:142:8: note: uninitialized use occurs here
     142 |         *pn = n;
         |               ^
   drivers/clk/ingenic/x1600-cgu.c:129:38: note: remove the condition if it is always true
     129 |         for (od_combined = od_combined_min; od_combined <= od_combined_max; od_combined++) {
         |                                             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/ingenic/x1600-cgu.c:115:20: note: initialize the variable 'n' to silence this warning
     115 |         unsigned long m, n;
         |                           ^
         |                            = 0
   2 warnings generated.


vim +129 drivers/clk/ingenic/x1600-cgu.c

   104	
   105	static void
   106	x1600_pll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info,
   107			      unsigned long rate, unsigned long parent_rate,
   108			      unsigned int *pm, unsigned int *pn, unsigned int *pod,
   109			      unsigned int *pod1)
   110	{
   111		const unsigned int od_max = pll_info->od_max - 1;
   112		const unsigned int od1_max = pll_info->od1_max - 1;
   113		const unsigned int m_max = GENMASK(pll_info->m_bits - 1, 0);
   114		const unsigned int n_max = GENMASK(pll_info->n_bits - 1, 0);
   115		unsigned long m, n;
   116		unsigned int od = 1, od1 = 1;
   117		const unsigned long fvco_min = 600000000, fvco_max = 2400000000;
   118		unsigned long fvco;
   119	
   120		/*
   121		 * Combined output divider range:
   122		 *
   123		 * ceil(fvco_min / rate) - fvco_max / rate
   124		 */
   125		unsigned int od_combined_min = (fvco_min + rate) / rate;
   126		unsigned int od_combined_max = fvco_max / rate;
   127		unsigned int od_combined;
   128	
 > 129		for (od_combined = od_combined_min; od_combined <= od_combined_max; od_combined++) {
   130			od = int_sqrt(od_combined);
   131			od1 = od_combined / od;
   132	
   133			/* od == floor(sqrt(od_combined)); od1 >= od */
   134			if ((od * od1 == od_combined) && od <= od_max && od1 <= od1_max) {
   135				fvco = rate * od_combined;
   136				rational_best_approximation(fvco, parent_rate, m_max, n_max, &m, &n);
   137				break;
   138			}
   139		}
   140	
   141		*pm = m;
   142		*pn = n;
   143		*pod = od;
   144		*pod1 = od1;
   145	}
   146	

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