* [PATCH RESEND v3 0/4] Add Loongson HD Audio support
@ 2023-06-07 9:21 Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support Yanteng Si
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Yanteng Si @ 2023-06-07 9:21 UTC (permalink / raw)
To: tiwai; +Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel
v3:
* Adding some comments.
* Seting polling_mode flag.
v2:
* Handling with two new flags added to struct hdac_bus.
v1:
* The Loongson HDA controller is compatible with High Definition Audio
Specification Revision 1.0a.
See <https://loongson.github.io/LoongArch-Documentation/Loongson-
7A1000-usermanual-EN.html#hda-controller>
Yanteng Si (4):
ALSA: hda: Add Loongson LS7A HD-Audio support
ALSA: hda: Using polling mode for loongson controller by default
ALSA: hda: Workaround for SDnCTL register on loongson
ALSA: hda/intel: Workaround for WALLCLK register for loongson
controller
include/linux/pci_ids.h | 3 +++
include/sound/hdaudio.h | 2 ++
sound/hda/hdac_controller.c | 5 ++++-
sound/hda/hdac_device.c | 1 +
sound/hda/hdac_stream.c | 6 +++++-
sound/pci/hda/hda_intel.c | 20 ++++++++++++++++++++
sound/pci/hda/patch_hdmi.c | 1 +
7 files changed, 36 insertions(+), 2 deletions(-)
--
2.31.4
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH RESEND v3 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support
2023-06-07 9:21 [PATCH RESEND v3 0/4] Add Loongson HD Audio support Yanteng Si
@ 2023-06-07 9:21 ` Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 2/4] ALSA: hda: Using polling mode for loongson controller by default Yanteng Si
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Yanteng Si @ 2023-06-07 9:21 UTC (permalink / raw)
To: tiwai; +Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel
Add the new PCI ID 0x0014 0x7a07 and the new PCI ID 0x0014 0x7a37
Loongson HDA controller.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
---
include/linux/pci_ids.h | 3 +++
sound/hda/hdac_device.c | 1 +
sound/pci/hda/hda_intel.c | 7 +++++++
sound/pci/hda/patch_hdmi.c | 1 +
4 files changed, 12 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 22f4be95b3f1..543998b44e4c 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -158,6 +158,9 @@
#define PCI_VENDOR_ID_LOONGSON 0x0014
+#define PCI_DEVICE_ID_LOONGSON_HDA 0x7a07
+#define PCI_DEVICE_ID_LOONGSON_HDMI 0x7a37
+
#define PCI_VENDOR_ID_SOLIDIGM 0x025e
#define PCI_VENDOR_ID_TTTECH 0x0357
diff --git a/sound/hda/hdac_device.c b/sound/hda/hdac_device.c
index 6c043fbd606f..bbf7bcdb449a 100644
--- a/sound/hda/hdac_device.c
+++ b/sound/hda/hdac_device.c
@@ -645,6 +645,7 @@ struct hda_vendor_id {
};
static const struct hda_vendor_id hda_vendor_ids[] = {
+ { 0x0014, "Loongson" },
{ 0x1002, "ATI" },
{ 0x1013, "Cirrus Logic" },
{ 0x1057, "Motorola" },
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 3226691ac923..9c353dc7740c 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -237,6 +237,7 @@ enum {
AZX_DRIVER_CTHDA,
AZX_DRIVER_CMEDIA,
AZX_DRIVER_ZHAOXIN,
+ AZX_DRIVER_LOONGSON,
AZX_DRIVER_GENERIC,
AZX_NUM_DRIVERS, /* keep this as last entry */
};
@@ -360,6 +361,7 @@ static const char * const driver_short_names[] = {
[AZX_DRIVER_CTHDA] = "HDA Creative",
[AZX_DRIVER_CMEDIA] = "HDA C-Media",
[AZX_DRIVER_ZHAOXIN] = "HDA Zhaoxin",
+ [AZX_DRIVER_LOONGSON] = "HDA Loongson",
[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
};
@@ -2809,6 +2811,11 @@ static const struct pci_device_id azx_ids[] = {
.driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
/* Zhaoxin */
{ PCI_DEVICE(0x1d17, 0x3288), .driver_data = AZX_DRIVER_ZHAOXIN },
+ /* Loongson HDAudio*/
+ {PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_HDA),
+ .driver_data = AZX_DRIVER_LOONGSON },
+ {PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_HDMI),
+ .driver_data = AZX_DRIVER_LOONGSON },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 5c0b1a09fd57..260d3e64f658 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -4505,6 +4505,7 @@ static int patch_gf_hdmi(struct hda_codec *codec)
* patch entries
*/
static const struct hda_device_id snd_hda_id_hdmi[] = {
+HDA_CODEC_ENTRY(0x00147a47, "Loongson HDMI", patch_generic_hdmi),
HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
--
2.31.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH RESEND v3 2/4] ALSA: hda: Using polling mode for loongson controller by default
2023-06-07 9:21 [PATCH RESEND v3 0/4] Add Loongson HD Audio support Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support Yanteng Si
@ 2023-06-07 9:21 ` Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 3/4] ALSA: hda: Workaround for SDnCTL register on loongson Yanteng Si
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Yanteng Si @ 2023-06-07 9:21 UTC (permalink / raw)
To: tiwai
Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel, Yingkun Meng
On loongson controller, RIRBSTS.RINTFL cannot be cleared,
azx_interrupt() is called all the time. We disable RIRB
interrupt, and use polling mode by default.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
---
include/sound/hdaudio.h | 1 +
sound/hda/hdac_controller.c | 5 ++++-
sound/pci/hda/hda_intel.c | 5 +++++
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
index 97f09acae302..a0bb40a4b721 100644
--- a/include/sound/hdaudio.h
+++ b/include/sound/hdaudio.h
@@ -347,6 +347,7 @@ struct hdac_bus {
bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
bool polling_mode:1;
bool needs_damn_long_delay:1;
+ bool not_use_interrupts:1; /* prohibiting the RIRB IRQ */
int poll_count;
diff --git a/sound/hda/hdac_controller.c b/sound/hda/hdac_controller.c
index 3c7af6558249..7f3a000fab0c 100644
--- a/sound/hda/hdac_controller.c
+++ b/sound/hda/hdac_controller.c
@@ -79,7 +79,10 @@ void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)
/* set N=1, get RIRB response interrupt for new entry */
snd_hdac_chip_writew(bus, RINTCNT, 1);
/* enable rirb dma and response irq */
- snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
+ if (bus->not_use_interrupts)
+ snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN);
+ else
+ snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
/* Accept unsolicited responses */
snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL);
spin_unlock_irq(&bus->reg_lock);
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 9c353dc7740c..b7a7a92d03ef 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1875,6 +1875,11 @@ static int azx_first_init(struct azx *chip)
if (chip->driver_type == AZX_DRIVER_GFHDMI)
bus->polling_mode = 1;
+ if (chip->driver_type == AZX_DRIVER_LOONGSON) {
+ bus->polling_mode = 1;
+ bus->not_use_interrupts = 1;
+ }
+
err = pcim_iomap_regions(pci, 1 << 0, "ICH HD audio");
if (err < 0)
return err;
--
2.31.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH RESEND v3 3/4] ALSA: hda: Workaround for SDnCTL register on loongson
2023-06-07 9:21 [PATCH RESEND v3 0/4] Add Loongson HD Audio support Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 2/4] ALSA: hda: Using polling mode for loongson controller by default Yanteng Si
@ 2023-06-07 9:21 ` Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 4/4] ALSA: hda/intel: Workaround for WALLCLK register for loongson controller Yanteng Si
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Yanteng Si @ 2023-06-07 9:21 UTC (permalink / raw)
To: tiwai; +Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel
On loongson controller, after calling snd_hdac_stream_updateb()
to enable DMA engine, the SDnCTL.STRM will become to zero. We
need to access SDnCTL in dword to keep SDnCTL.STRM is not changed.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Yingkun Meng <mengyingkun@loongson.cn>
---
include/sound/hdaudio.h | 1 +
sound/hda/hdac_stream.c | 6 +++++-
sound/pci/hda/hda_intel.c | 1 +
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
index a0bb40a4b721..94efbbeaa531 100644
--- a/include/sound/hdaudio.h
+++ b/include/sound/hdaudio.h
@@ -348,6 +348,7 @@ struct hdac_bus {
bool polling_mode:1;
bool needs_damn_long_delay:1;
bool not_use_interrupts:1; /* prohibiting the RIRB IRQ */
+ bool access_sdnctl_in_dword:1; /* accessing the sdnctl register by dword */
int poll_count;
diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c
index 1f56fd33b9af..2633a4bb1d85 100644
--- a/sound/hda/hdac_stream.c
+++ b/sound/hda/hdac_stream.c
@@ -150,7 +150,11 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev)
stripe_ctl);
}
/* set DMA start and interrupt mask */
- snd_hdac_stream_updateb(azx_dev, SD_CTL,
+ if (bus->access_sdnctl_in_dword)
+ snd_hdac_stream_updatel(azx_dev, SD_CTL,
+ 0, SD_CTL_DMA_START | SD_INT_MASK);
+ else
+ snd_hdac_stream_updateb(azx_dev, SD_CTL,
0, SD_CTL_DMA_START | SD_INT_MASK);
azx_dev->running = true;
}
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index b7a7a92d03ef..fc4787c7782a 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1878,6 +1878,7 @@ static int azx_first_init(struct azx *chip)
if (chip->driver_type == AZX_DRIVER_LOONGSON) {
bus->polling_mode = 1;
bus->not_use_interrupts = 1;
+ bus->access_sdnctl_in_dword = 1;
}
err = pcim_iomap_regions(pci, 1 << 0, "ICH HD audio");
--
2.31.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH RESEND v3 4/4] ALSA: hda/intel: Workaround for WALLCLK register for loongson controller
2023-06-07 9:21 [PATCH RESEND v3 0/4] Add Loongson HD Audio support Yanteng Si
` (2 preceding siblings ...)
2023-06-07 9:21 ` [PATCH RESEND v3 3/4] ALSA: hda: Workaround for SDnCTL register on loongson Yanteng Si
@ 2023-06-07 9:21 ` Yanteng Si
2023-06-07 9:27 ` [PATCH RESEND v3 0/4] Add Loongson HD Audio support Huacai Chen
2023-06-07 10:44 ` Takashi Iwai
5 siblings, 0 replies; 7+ messages in thread
From: Yanteng Si @ 2023-06-07 9:21 UTC (permalink / raw)
To: tiwai
Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel, Yingkun Meng
On loongson controller, the value of WALLCLK register
is always 0, which is meaningless, so we return directly.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
---
sound/pci/hda/hda_intel.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index fc4787c7782a..ef831770ca7d 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -655,6 +655,13 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
unsigned int pos;
snd_pcm_uframes_t hwptr, target;
+ /*
+ * The value of the WALLCLK register is always 0
+ * on the Loongson controller, so we return directly.
+ */
+ if (chip->driver_type == AZX_DRIVER_LOONGSON)
+ return 1;
+
wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
return -1; /* bogus (too early) interrupt */
--
2.31.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH RESEND v3 0/4] Add Loongson HD Audio support
2023-06-07 9:21 [PATCH RESEND v3 0/4] Add Loongson HD Audio support Yanteng Si
` (3 preceding siblings ...)
2023-06-07 9:21 ` [PATCH RESEND v3 4/4] ALSA: hda/intel: Workaround for WALLCLK register for loongson controller Yanteng Si
@ 2023-06-07 9:27 ` Huacai Chen
2023-06-07 10:44 ` Takashi Iwai
5 siblings, 0 replies; 7+ messages in thread
From: Huacai Chen @ 2023-06-07 9:27 UTC (permalink / raw)
To: Yanteng Si
Cc: tiwai, perex, chenhuacai, alsa-devel, loongarch, loongson-kernel
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
On Wed, Jun 7, 2023 at 5:22 PM Yanteng Si <siyanteng@loongson.cn> wrote:
>
> v3:
> * Adding some comments.
> * Seting polling_mode flag.
>
> v2:
> * Handling with two new flags added to struct hdac_bus.
>
> v1:
> * The Loongson HDA controller is compatible with High Definition Audio
> Specification Revision 1.0a.
> See <https://loongson.github.io/LoongArch-Documentation/Loongson-
> 7A1000-usermanual-EN.html#hda-controller>
>
> Yanteng Si (4):
> ALSA: hda: Add Loongson LS7A HD-Audio support
> ALSA: hda: Using polling mode for loongson controller by default
> ALSA: hda: Workaround for SDnCTL register on loongson
> ALSA: hda/intel: Workaround for WALLCLK register for loongson
> controller
>
> include/linux/pci_ids.h | 3 +++
> include/sound/hdaudio.h | 2 ++
> sound/hda/hdac_controller.c | 5 ++++-
> sound/hda/hdac_device.c | 1 +
> sound/hda/hdac_stream.c | 6 +++++-
> sound/pci/hda/hda_intel.c | 20 ++++++++++++++++++++
> sound/pci/hda/patch_hdmi.c | 1 +
> 7 files changed, 36 insertions(+), 2 deletions(-)
>
> --
> 2.31.4
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH RESEND v3 0/4] Add Loongson HD Audio support
2023-06-07 9:21 [PATCH RESEND v3 0/4] Add Loongson HD Audio support Yanteng Si
` (4 preceding siblings ...)
2023-06-07 9:27 ` [PATCH RESEND v3 0/4] Add Loongson HD Audio support Huacai Chen
@ 2023-06-07 10:44 ` Takashi Iwai
5 siblings, 0 replies; 7+ messages in thread
From: Takashi Iwai @ 2023-06-07 10:44 UTC (permalink / raw)
To: Yanteng Si
Cc: tiwai, perex, chenhuacai, alsa-devel, loongarch, loongson-kernel
On Wed, 07 Jun 2023 11:21:48 +0200,
Yanteng Si wrote:
>
> v3:
> * Adding some comments.
> * Seting polling_mode flag.
>
> v2:
> * Handling with two new flags added to struct hdac_bus.
>
> v1:
> * The Loongson HDA controller is compatible with High Definition Audio
> Specification Revision 1.0a.
> See <https://loongson.github.io/LoongArch-Documentation/Loongson-
> 7A1000-usermanual-EN.html#hda-controller>
>
> Yanteng Si (4):
> ALSA: hda: Add Loongson LS7A HD-Audio support
> ALSA: hda: Using polling mode for loongson controller by default
> ALSA: hda: Workaround for SDnCTL register on loongson
> ALSA: hda/intel: Workaround for WALLCLK register for loongson
> controller
Applied all four patches now.
The patch 3 had a typo (missing Signed-off-by: for Yingkun, so I
corrected it manually.
thanks,
Takashi
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-06-07 10:44 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2023-06-07 9:21 [PATCH RESEND v3 0/4] Add Loongson HD Audio support Yanteng Si
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2023-06-07 9:21 ` [PATCH RESEND v3 2/4] ALSA: hda: Using polling mode for loongson controller by default Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 3/4] ALSA: hda: Workaround for SDnCTL register on loongson Yanteng Si
2023-06-07 9:21 ` [PATCH RESEND v3 4/4] ALSA: hda/intel: Workaround for WALLCLK register for loongson controller Yanteng Si
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