From: Andrew Lunn <andrew@lunn.ch>
To: Yanteng Si <siyanteng@loongson.cn>
Cc: hkallweit1@gmail.com, peppe.cavallaro@st.com,
alexandre.torgue@foss.st.com, joabreu@synopsys.com,
fancer.lancer@gmail.com, Jose.Abreu@synopsys.com,
chenhuacai@loongson.cn, linux@armlinux.org.uk,
guyinggang@loongson.cn, netdev@vger.kernel.org,
loongarch@lists.linux.dev, chris.chenfeiyang@gmail.com
Subject: Re: [PATCH v6 5/9] net: stmmac: Add Loongson-specific register definitions
Date: Sat, 16 Dec 2023 16:47:06 +0100 [thread overview]
Message-ID: <8a7d2d11-a299-42e0-960f-a6916e9b54fe@lunn.ch> (raw)
In-Reply-To: <40eff8db93b02599f00a156b07a0dcdacfc0fbf3.1702458672.git.siyanteng@loongson.cn>
On Wed, Dec 13, 2023 at 06:14:23PM +0800, Yanteng Si wrote:
> There are two types of Loongson DWGMAC. The first type shares the same
> register definitions and has similar logic as dwmac1000. The second type
> uses several different register definitions.
>
> Simply put, we split some single bit fields into double bits fileds:
>
> DMA_INTR_ENA_NIE = 0x00040000 + 0x00020000
> DMA_INTR_ENA_AIE = 0x00010000 + 0x00008000
> DMA_STATUS_NIS = 0x00040000 + 0x00020000
> DMA_STATUS_AIS = 0x00010000 + 0x00008000
> DMA_STATUS_FBI = 0x00002000 + 0x00001000
What is missing here is why? What are the second bits used for? And
why does the driver not care which bit is set when handing interrupts?
Andrew
next prev parent reply other threads:[~2023-12-16 15:47 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-13 10:12 [PATCH v6 0/9] stmmac: Add Loongson platform support Yanteng Si
2023-12-13 10:12 ` [PATCH v6 1/9] net: stmmac: Pass stmmac_priv and chan in some callbacks Yanteng Si
2023-12-16 13:01 ` Andrew Lunn
2023-12-18 10:09 ` Yanteng Si
2023-12-13 10:12 ` [PATCH v6 2/9] net: stmmac: dwmac-loongson: Refactor code for loongson_dwmac_probe() Yanteng Si
2023-12-13 10:12 ` [PATCH v6 3/9] net: stmmac: dwmac-loongson: Add full PCI support Yanteng Si
2023-12-13 10:14 ` [PATCH v6 4/9] net: stmmac: Add multi-channel supports Yanteng Si
2023-12-13 10:14 ` [PATCH v6 5/9] net: stmmac: Add Loongson-specific register definitions Yanteng Si
2023-12-16 15:47 ` Andrew Lunn [this message]
2023-12-18 10:22 ` Yanteng Si
2023-12-18 15:28 ` Andrew Lunn
2023-12-19 12:30 ` Yanteng Si
2023-12-13 10:14 ` [PATCH v6 6/9] net: stmmac: dwmac-loongson: Add MSI support Yanteng Si
2023-12-13 10:15 ` [PATCH v6 7/9] net: stmmac: dwmac-loongson: Add GNET support Yanteng Si
2023-12-13 10:15 ` [PATCH v6 8/9] net: stmmac: dwmac-loongson: Disable flow control for GMAC Yanteng Si
2023-12-13 10:15 ` [PATCH v6 9/9] net: stmmac: Disable coe for some Loongson GNET Yanteng Si
2023-12-14 15:15 ` [PATCH v6 0/9] stmmac: Add Loongson platform support Serge Semin
2023-12-19 12:35 ` Yanteng Si
2023-12-19 12:55 ` Serge Semin
2023-12-14 19:09 ` Jakub Kicinski
2023-12-14 19:09 ` Jakub Kicinski
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