+ drivers-hwmon-f75375sc-shift-control-mode-to-the-correct-bit-position.patch added to -mm tree

+ drivers-hwmon-f75375sc-shift-control-mode-to-the-correct-bit-position.patch added to -mm tree

[akpm]

The patch titled
     drivers/hwmon/f75375s.c: shift control mode to the correct bit position
has been added to the -mm tree.  Its filename is
     drivers-hwmon-f75375sc-shift-control-mode-to-the-correct-bit-position.patch

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------------------------------------------------------
Subject: drivers/hwmon/f75375s.c: shift control mode to the correct bit position
From: Guillem Jover <guillem@hadrons.org>

The spec notes that fan0 and fan1 control mode bits are located in bits
7-6 and 5-4 respectively, but the FAN_CTRL_MODE macro was making the bits
shift by 5 instead of by 4.

Signed-off-by: Guillem Jover <guillem@hadrons.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
---

 drivers/hwmon/f75375s.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff -puN drivers/hwmon/f75375s.c~drivers-hwmon-f75375sc-shift-control-mode-to-the-correct-bit-position drivers/hwmon/f75375s.c
--- a/drivers/hwmon/f75375s.c~drivers-hwmon-f75375sc-shift-control-mode-to-the-correct-bit-position
+++ a/drivers/hwmon/f75375s.c
@@ -79,7 +79,7 @@ enum chips { f75373, f75375 };
 #define F75375_REG_PWM2_DROP_DUTY	0x6C
 
 #define FAN_CTRL_LINEAR(nr)		(4 + nr)
-#define FAN_CTRL_MODE(nr)		(5 + ((nr) * 2))
+#define FAN_CTRL_MODE(nr)		(4 + ((nr) * 2))
 
 /*
  * Data structures and manipulation thereof
_

Patches currently in -mm which might be from guillem@hadrons.org are

drivers-hwmon-f75375sc-shift-control-mode-to-the-correct-bit-position.patch
drivers-hwmon-f75375sc-do-not-overwrite-values-read-from-registers.patch