[PATCH net-next v2] octeontx2-pf: Add NIXLF error and poison interrupt handlers

[PATCH net-next v2] octeontx2-pf: Add NIXLF error and poison interrupt handlers

[nshettyj]

From: Naveen Mamindlapalli <naveenm@marvell.com>

Register and handle the NIX LF error (NIX_LF_ERR_INT) and poison/RAS
(NIX_LF_RAS) interrupt vectors, The handlers acknowledge the interrupt
and log the status (ratelimited) to help debug NIX LF faults.

Signed-off-by: Nitin Shetty J <nshettyj@marvell.com>
Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
---
Changes in v2:
- Clamp VF qcount to OTX2_MAX_CQ_CNT to fix MSIX vector budget underflow on >64 CPU systems.
- Skip ERR/POISON vector allocation for representors that don't register those handlers.
- Fix stale comment and typo in otx2_realloc_msix_vectors().
---
 .../ethernet/marvell/octeontx2/nic/otx2_pf.c  | 88 ++++++++++++++++++-
 .../ethernet/marvell/octeontx2/nic/otx2_reg.h |  2 +
 .../ethernet/marvell/octeontx2/nic/otx2_vf.c  |  4 +-
 3 files changed, 89 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
index c995f2900859..1f8cb78c1919 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
@@ -1524,6 +1524,34 @@ irqreturn_t otx2_cq_intr_handler(int irq, void *cq_irq)
 }
 EXPORT_SYMBOL(otx2_cq_intr_handler);
 
+static irqreturn_t otx2_nixlf_err_intr_handler(int irq, void *data)
+{
+	struct otx2_nic *pf = data;
+	u64 regval;
+
+	/* Clear interrupt */
+	regval = otx2_read64(pf, NIX_LF_ERR_INT);
+	otx2_write64(pf, NIX_LF_ERR_INT, regval);
+
+	dev_err_ratelimited(pf->dev, "NIXLF Error Interrupt: 0x%llx\n", regval);
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t otx2_nixlf_poison_intr_handler(int irq, void *data)
+{
+	struct otx2_nic *pf = data;
+	u64 regval;
+
+	/* Clear interrupt */
+	regval = otx2_read64(pf, NIX_LF_RAS);
+	otx2_write64(pf, NIX_LF_RAS, regval);
+
+	dev_err_ratelimited(pf->dev, "NIXLF Poison Interrupt: 0x%llx\n", regval);
+
+	return IRQ_HANDLED;
+}
+
 void otx2_disable_napi(struct otx2_nic *pf)
 {
 	struct otx2_qset *qset = &pf->qset;
@@ -2080,6 +2108,34 @@ int otx2_open(struct net_device *netdev)
 
 	otx2_set_cints_affinity(pf);
 
+	/* Register NIXLF error IRQ handler */
+	vec = pf->hw.nix_msixoff + NIX_LF_ERR_VEC;
+	irq_name = &pf->hw.irq_name[vec * NAME_SIZE];
+	snprintf(irq_name, NAME_SIZE, "%s-nixlf-err", pf->netdev->name);
+	err = request_irq(pci_irq_vector(pf->pdev, vec),
+			  otx2_nixlf_err_intr_handler, 0, irq_name, pf);
+	if (err) {
+		dev_err(pf->dev,
+			"RVUPF%d: IRQ registration failed for NIXLF ERR vector\n",
+			rvu_get_pf(pf->pdev, pf->pcifunc));
+		goto err_free_cints;
+	}
+	otx2_write64(pf, NIX_LF_ERR_INT_ENA_W1S, NIX_LF_ERR_INT_MASK);
+
+	/* Register NIXLF POISON interrupt handler */
+	vec = pf->hw.nix_msixoff + NIX_LF_POISON_VEC;
+	irq_name = &pf->hw.irq_name[vec * NAME_SIZE];
+	snprintf(irq_name, NAME_SIZE, "%s-nixlf-poison", pf->netdev->name);
+	err = request_irq(pci_irq_vector(pf->pdev, vec),
+			  otx2_nixlf_poison_intr_handler, 0, irq_name, pf);
+	if (err) {
+		dev_err(pf->dev,
+			"RVUPF%d: IRQ registration failed for NIXLF POISON vector\n",
+			rvu_get_pf(pf->pdev, pf->pcifunc));
+		goto err_free_errint;
+	}
+	otx2_write64(pf, NIX_LF_RAS_ENA_W1S, NIX_LF_RAS_MASK);
+
 	if (pf->flags & OTX2_FLAG_RX_VLAN_SUPPORT)
 		otx2_enable_rxvlan(pf, true);
 
@@ -2132,6 +2188,16 @@ int otx2_open(struct net_device *netdev)
 	netif_tx_stop_all_queues(netdev);
 	netif_carrier_off(netdev);
 	pf->flags |= OTX2_FLAG_INTF_DOWN;
+	/* free NIXLF POISON irq */
+	vec = pci_irq_vector(pf->pdev,
+			     pf->hw.nix_msixoff + NIX_LF_POISON_VEC);
+	otx2_write64(pf, NIX_LF_RAS_ENA_W1C, NIX_LF_RAS_MASK);
+	free_irq(vec, pf);
+err_free_errint:
+	vec = pci_irq_vector(pf->pdev,
+			     pf->hw.nix_msixoff + NIX_LF_ERR_VEC);
+	otx2_write64(pf, NIX_LF_ERR_INT_ENA_W1C, NIX_LF_ERR_INT_MASK);
+	free_irq(vec, pf);
 err_free_cints:
 	otx2_free_cints(pf, qidx);
 	vec = pci_irq_vector(pf->pdev,
@@ -2171,6 +2237,18 @@ int otx2_stop(struct net_device *netdev)
 	/* Clear RSS enable flag */
 	pf->hw.rss_info.enable = false;
 
+	/* Cleanup NIXLF Poison IRQ */
+	vec = pci_irq_vector(pf->pdev,
+			     pf->hw.nix_msixoff + NIX_LF_POISON_VEC);
+	otx2_write64(pf, NIX_LF_RAS_ENA_W1C, NIX_LF_RAS_MASK);
+	free_irq(vec, pf);
+
+	/* Cleanup NIXLF Error IRQ */
+	vec = pci_irq_vector(pf->pdev,
+			     pf->hw.nix_msixoff + NIX_LF_ERR_VEC);
+	otx2_write64(pf, NIX_LF_ERR_INT_ENA_W1C, NIX_LF_ERR_INT_MASK);
+	free_irq(vec, pf);
+
 	/* Cleanup Queue IRQ */
 	vec = pci_irq_vector(pf->pdev,
 			     pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START);
@@ -3006,11 +3084,15 @@ int otx2_realloc_msix_vectors(struct otx2_nic *pf)
 	struct otx2_hw *hw = &pf->hw;
 	int num_vec, err;
 
-	/* NPA interrupts are inot registered, so alloc only
-	 * upto NIX vector offset.
+	/* Skip NPA vectors. Representors only use CINT vectors, so limit
+	 * the budget to that range. For PF/VF, allocate the full NIX LF
+	 * interrupt range (QINT, CINT, GINT, ERR and POISON vectors).
 	 */
 	num_vec = hw->nix_msixoff;
-	num_vec += NIX_LF_CINT_VEC_START + hw->max_queues;
+	if (pf->flags & OTX2_FLAG_REP_MODE_ENABLED)
+		num_vec += NIX_LF_CINT_VEC_START + hw->max_queues;
+	else
+		num_vec += NIX_LF_POISON_VEC + 1;
 
 	otx2_disable_mbox_intr(pf);
 	pci_free_irq_vectors(hw->pdev);
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h
index 1cd576fd09c5..c144fd2bbe51 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h
@@ -121,10 +121,12 @@
 #define	NIX_LF_ERR_INT_W1S		(NIX_LFBASE | 0x228)
 #define	NIX_LF_ERR_INT_ENA_W1C		(NIX_LFBASE | 0x230)
 #define	NIX_LF_ERR_INT_ENA_W1S		(NIX_LFBASE | 0x238)
+#define	NIX_LF_ERR_INT_MASK		GENMASK_ULL(31, 0)
 #define	NIX_LF_RAS			(NIX_LFBASE | 0x240)
 #define	NIX_LF_RAS_W1S			(NIX_LFBASE | 0x248)
 #define	NIX_LF_RAS_ENA_W1C		(NIX_LFBASE | 0x250)
 #define	NIX_LF_RAS_ENA_W1S		(NIX_LFBASE | 0x258)
+#define	NIX_LF_RAS_MASK			GENMASK_ULL(10, 0)
 #define	NIX_LF_SQ_OP_ERR_DBG		(NIX_LFBASE | 0x260)
 #define	NIX_LF_MNQ_ERR_DBG		(NIX_LFBASE | 0x270)
 #define	NIX_LF_SEND_ERR_DBG		(NIX_LFBASE | 0x280)
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
index b022f52c6845..eda4ed52a8d8 100644
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
@@ -554,7 +554,7 @@ static int otx2vf_realloc_msix_vectors(struct otx2_nic *vf)
 	int num_vec, err;
 
 	num_vec = hw->nix_msixoff;
-	num_vec += NIX_LF_CINT_VEC_START + hw->max_queues;
+	num_vec += NIX_LF_POISON_VEC + 1;
 
 	otx2vf_disable_mbox_intr(vf);
 	pci_free_irq_vectors(hw->pdev);
@@ -597,7 +597,7 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
 	pci_set_master(pdev);
 
-	qcount = num_online_cpus();
+	qcount = min_t(int, num_online_cpus(), OTX2_MAX_CQ_CNT);
 	qos_txqs = min_t(int, qcount, OTX2_QOS_MAX_LEAF_NODES);
 	netdev = alloc_etherdev_mqs(sizeof(*vf), qcount + qos_txqs, qcount);
 	if (!netdev)
-- 
2.48.1

Re: [net-next,v2] octeontx2-pf: Add NIXLF error and poison interrupt handlers

[netdev-bot+sashiko]

Thank you for your contribution! Sashiko AI review found 2 potential
issue(s) to consider:

Critical: 0 · High: 0 · Medium: 1 · Low: 1

- [Medium] The patch bundles undisclosed VF-side changes that the commit
  message (subject "octeontx2-pf: Add NIXLF error and poison interrupt…
- [Low] The rewritten comment in otx2_realloc_msix_vectors()
  (otx2_pf.c:3086-3090) claims the code "Skip[s] NPA vectors", but the…

--

octeontx2-pf: Add NIXLF error and poison interrupt handlers

This registers handlers for the NIX LF error (NIX_LF_ERR_INT) and poison/RAS
(NIX_LF_RAS) MSI-X vectors in otx2_open(), frees them in otx2_stop(), and
widens the MSI-X reservation in otx2_realloc_msix_vectors() and
otx2vf_realloc_msix_vectors() to cover the new vectors.

A couple of questions about the changes below.

> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> index c995f29008590..1f8cb78c19195 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

[ ... ]

> @@ -3006,11 +3084,15 @@ int otx2_realloc_msix_vectors(struct otx2_nic *pf)
>  	struct otx2_hw *hw = &pf->hw;
>  	int num_vec, err;
>  
> -	/* NPA interrupts are inot registered, so alloc only
> -	 * upto NIX vector offset.
> +	/* Skip NPA vectors. Representors only use CINT vectors, so limit
> +	 * the budget to that range. For PF/VF, allocate the full NIX LF
> +	 * interrupt range (QINT, CINT, GINT, ERR and POISON vectors).
>  	 */

[Severity: Low]
Does the new comment in otx2_realloc_msix_vectors() describe what the code
does?  The count starts at hw->nix_msixoff and the allocation is:

	num_vec = hw->nix_msixoff;
	...
	err = pci_alloc_irq_vectors(hw->pdev, num_vec, num_vec, PCI_IRQ_MSIX);

pci_alloc_irq_vectors() enables the contiguous range starting at vector 0,
which includes everything below hw->nix_msixoff, and that is where the NPA
LF's vectors live.  rvu_mbox_handler_attach_resources() attaches BLKTYPE_NPA
before BLKTYPE_NIX, and rvu_set_msix_offset() hands out each LF's vectors
with rvu_alloc_rsrc_contig() from the function's MSI-X bitmap, so
npa_msixoff < nix_msixoff.

The NPA vectors are therefore still allocated, just left without handlers,
which is what the replaced comment said ("NPA interrupts are [not]
registered, so alloc only upto NIX vector offset").  Would it be clearer to
keep the original wording rather than saying the vectors are skipped?

>  	num_vec = hw->nix_msixoff;
> -	num_vec += NIX_LF_CINT_VEC_START + hw->max_queues;
> +	if (pf->flags & OTX2_FLAG_REP_MODE_ENABLED)
> +		num_vec += NIX_LF_CINT_VEC_START + hw->max_queues;
> +	else
> +		num_vec += NIX_LF_POISON_VEC + 1;
>  
>  	otx2_disable_mbox_intr(pf);
>  	pci_free_irq_vectors(hw->pdev);

[ ... ]

> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
> index fcdf891f90b58..3b06da52d37e5 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
> @@ -554,7 +554,7 @@ static int otx2vf_realloc_msix_vectors(struct otx2_nic *vf)
>  	int num_vec, err;
>  
>  	num_vec = hw->nix_msixoff;
> -	num_vec += NIX_LF_CINT_VEC_START + hw->max_queues;
> +	num_vec += NIX_LF_POISON_VEC + 1;
>  
>  	otx2vf_disable_mbox_intr(vf);
>  	pci_free_irq_vectors(hw->pdev);
> @@ -597,7 +597,7 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>  
>  	pci_set_master(pdev);
>  
> -	qcount = num_online_cpus();
> +	qcount = min_t(int, num_online_cpus(), OTX2_MAX_CQ_CNT);

[Severity: Medium]
Should this queue count clamp in otx2vf_probe() be a separate patch, or at
least be described in the commit message?

The subject and body only talk about registering the two new NIX LF handlers,
but this line changes the VF datapath configuration: on a system with more
than 64 online CPUs every octeontx2 VF drops from num_online_cpus() rx/tx
queues to 64, since hw->rx_queues, hw->tx_queues, hw->max_queues,
hw->non_qos_queues and the alloc_etherdev_mqs() queue counts are all derived
from qcount.

It also looks like a fix for a pre-existing asymmetry rather than a
requirement of the new handlers.  otx2_probe() already had the same clamp:

	qcount = min_t(int, num_online_cpus(), OTX2_MAX_CQ_CNT);

while the VF did not, so with more than 64 CPUs the VF's cint_cnt (max3 of
rx_queues, tx_queues and tc_tx_queues) exceeded the 64 CINT slots available
between NIX_LF_CINT_VEC_START (0x40) and NIX_LF_GINT_VEC (0x80) in
otx2_common.h, and the CINT vector indices ran into GINT/ERR/POISON or past
the LF's vector count.

Would a standalone patch carrying

	Fixes: 3184fb5ba96e ("octeontx2-vf: Virtual function driver support")

be more appropriate for the clamp?  The "Changes in v2:" note that mentions
it sits below the --- separator and is dropped when the patch is applied, so
the recorded history contains no trace of this change.

The same applies to the otx2vf_realloc_msix_vectors() hunk above: the VF
reservation moves from the queue-count-scaled NIX_LF_CINT_VEC_START +
hw->max_queues to the fixed NIX_LF_POISON_VEC + 1, and VFs pick up the new
handlers only because otx2vf_open()/otx2vf_stop() call into the shared
otx2_open()/otx2_stop().  Should the commit message mention that this touches
VFs too, given the "octeontx2-pf:" subject prefix?

>  	qos_txqs = min_t(int, qcount, OTX2_QOS_MAX_LEAF_NODES);
>  	netdev = alloc_etherdev_mqs(sizeof(*vf), qcount + qos_txqs, qcount);
>  	if (!netdev)

-- 
Sashiko AI review · https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20260831062600.839203-1-nshettyj%40marvell.com

Re: [net-next,v2] octeontx2-pf: Add NIXLF error and poison interrupt handlers

[Paolo Abeni]

On 9/3/26 11:28 AM, netdev-bot+sashiko@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential
> issue(s) to consider:
> 
> Critical: 0 · High: 0 · Medium: 1 · Low: 1
> 
> - [Medium] The patch bundles undisclosed VF-side changes that the commit
>   message (subject "octeontx2-pf: Add NIXLF error and poison interrupt…

IMHO this comment is borderline relevant, but addressing it requires a
level of effort that would offset the benefit, as this is only for code
archeology's sake and we already have the lore link in the changelog.

/P

Re: [PATCH net-next v2] octeontx2-pf: Add NIXLF error and poison interrupt handlers

[patchwork-bot+netdevbpf]

Hello:

This patch was applied to netdev/net-next.git (main)
by Paolo Abeni <pabeni@redhat.com>:

On Mon, 31 Aug 2026 11:56:00 +0530 you wrote:
> From: Naveen Mamindlapalli <naveenm@marvell.com>
> 
> Register and handle the NIX LF error (NIX_LF_ERR_INT) and poison/RAS
> (NIX_LF_RAS) interrupt vectors, The handlers acknowledge the interrupt
> and log the status (ratelimited) to help debug NIX LF faults.
> 
> Signed-off-by: Nitin Shetty J <nshettyj@marvell.com>
> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
> 
> [...]

Here is the summary with links:
  - [net-next,v2] octeontx2-pf: Add NIXLF error and poison interrupt handlers
    https://git.kernel.org/netdev/net-next/c/60c1bcdeeb8e

You are awesome, thank you!
-- 
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