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* Re: Attempting Yocto Scarthgap prototype using 0001-net-dsa-microchip-ksz9477-add-E2E-support.patch
       [not found]   ` <BN1P110MB057898FE6C49EDDB74498DD3C334A@BN1P110MB0578.NAMP110.PROD.OUTLOOK.COM>
@ 2026-04-30  7:58     ` Christian Eggers
  2026-08-10 18:12       ` matt.becker
  0 siblings, 1 reply; 2+ messages in thread
From: Christian Eggers @ 2026-04-30  7:58 UTC (permalink / raw)
  To: matt.becker, Brian.Hutchinson; +Cc: arun.ramadoss, netdev, UNGLinuxDriver

[-- Attachment #1: Type: text/plain, Size: 3801 bytes --]

CC: UNGLinuxDriver@microchip.com
CC: netdev@vger.kernel.org

Hi Matt, hi Brian,

although I did the initial development of the KSZ PTP patches, this never went
into our final products.  Because of this, I am quite happy that Arun from 
Microchip took over this and made several improvements.

The E2E patch was originally rejected (AFAIR), because the KSZ applies
(unwanted) filtering on the PTP messages.  For E2E this means, that the
KSZ hardware filter needs to "know" whether this node is currently master or
slave clock.  As there is no (and probably never will be) interface between
ptp4l and the kernel for communicating the current master/slave state, there
was no interest in merging this.

As we do not use PTP in our current software, I have only forward ported
the patch(es) for being compile clean (see attachment).  But I haven't done
any real tests with newer kernels / ptp4l versions.

Unfortunately I will not be able to spent any time on this for the next
3 weeks.  If the problem still persists then, I can try to have a look on
this.  If you find the solution yourself, I would be happy getting an
update on this.

regards,
Christian

On Wednesday, 29 April 2026, 21:27:12 CEST, matt.becker@L3Harris.com wrote:
> Christian/Arun,
> 
> My name is Matt Becker. I work with Brian Hutchinson at L3Harris.
> 
> A few years back we received & applied patches (net-dsa-microchip-ptp*) from Christian for our embedded board (imx8mm Arm processor + KSZ Microchip part). At the time these patches were developed for Yocto Dunfell (3.1) + Linux Kernel 5.10.69 + linuxptp-2.0 .
> 
> We followed up and reapplied these patches with success on the same board when we upgraded to Yocto Kirkstone (4.0.x) + Linux Kernel 6.1.38 + linuxptp-3.1.1.
> 
> We’re now attempting to bring this same board up to the most recent Yocto LTS release (Scarthgap 5.0.16) + Linux Kernel 6.6.50 + linuxptp-4.1 . This is where we’re running into some difficulty.
> 
> It looks like most of the patches from a few years back were already merged back to the 6.6 kernel level. I only had to re-apply the patch  0001-net-dsa-microchip-ksz9477-add-E2E-support.patch as this was not merged back. It seems this change alone might not be sufficient. Our Scarthgap board is now able to select a grandmaster clock and it is able to receive adjustments. However, the master_offset values are very large, and PTP never converges.
> 
> My suspicion is that I may need other changes to make this work on this new OS/kernel/PTP configuration.
> 
> I was wondering if you might be able to offer any guidance:
> 
>   *   Have you ever tried bringing this functionality (net-dsa-microchip-ksz9477-add-E2E-support) forward to a newer Linux kernel and/or PTP?
>   *   If so, do you have any unofficial patches we might be able to try?
>   *   If not, do you have any other advice on a path forward (e.g. changes that might be necessary outside of the original patches)?
> 
> I attached an email thread with myself & Brian that has a little bit more detail.
> 
> If you have any ideas or help you can offer it would be greatly appreciated!
> 
> Sincerely,
> 
> -Matt Becker
> 
> matt.becker@L3Harris.com<mailto:matt.becker@L3Harris.com>
> (585) 369-1184
> 
>   
> 
> CONFIDENTIALITY NOTICE: This email and any attachments are for the sole use of the intended recipient and may contain material that is proprietary, confidential, privileged or otherwise legally protected or restricted under applicable government laws. Any review, disclosure, distributing or other use without expressed permission of the sender is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies without reading, printing, or saving.
> 
> 


[-- Attachment #2: 0a4fdb38cfe8eec90a2149cf529da4da7a1f6d25.patch --]
[-- Type: text/x-patch, Size: 6253 bytes --]

From 0a4fdb38cfe8eec90a2149cf529da4da7a1f6d25 Mon Sep 17 00:00:00 2001
From: Christian Eggers <ceggers@arri.de>
Date: Tue, 12 Sep 2023 18:39:54 +0200
Subject: [PATCH] net: dsa: microchip: ksz9477: add E2E support

Requires manual switching between master and slave mode via sysfs
attribute.

Signed-off-by: Christian Eggers <ceggers@arri.de>
---
 drivers/net/dsa/microchip/ksz_ptp.c | 164 ++++++++++++++++++++++++++++
 1 file changed, 164 insertions(+)

diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchip/ksz_ptp.c
index 7ef5fac69657f..81b386b8ebece 100644
--- a/drivers/net/dsa/microchip/ksz_ptp.c
+++ b/drivers/net/dsa/microchip/ksz_ptp.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/ptp_classify.h>
 #include <linux/ptp_clock_kernel.h>
+#include <linux/sysfs.h>
 
 #include "ksz_common.h"
 #include "ksz_ptp.h"
@@ -383,16 +384,19 @@ static int ksz_set_hwtstamp_config(struct ksz_device *dev,
 		break;
 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
 		prt->hwts_rx_en = true;
 		break;
 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
 		prt->hwts_rx_en = true;
 		break;
 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 		prt->hwts_rx_en = true;
 		break;
@@ -526,6 +530,7 @@ void ksz_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)
 		if (prt->tstamp_config.tx_type == HWTSTAMP_TX_ONESTEP_P2P)
 			return;
 		break;
+	case PTP_MSGTYPE_DELAY_REQ:
 	case PTP_MSGTYPE_PDELAY_REQ:
 		break;
 	case PTP_MSGTYPE_PDELAY_RESP:
@@ -900,6 +905,155 @@ static int ksz_ptp_start_clock(struct ksz_device *dev)
 	return 0;
 }
 
+
+/* device attributes */
+
+enum ksz9477_ptp_tcmode {
+	KSZ9477_PTP_TCMODE_E2E,
+	KSZ9477_PTP_TCMODE_P2P,
+};
+
+static int ksz9477_ptp_tcmode_get(struct ksz_device *dev, enum ksz9477_ptp_tcmode *tcmode)
+{
+	u16 data;
+	int ret;
+
+	ret = ksz_read16(dev, REG_PTP_MSG_CONF1, &data);
+	if (ret)
+		return ret;
+
+	*tcmode = (data & PTP_TC_P2P) ? KSZ9477_PTP_TCMODE_P2P : KSZ9477_PTP_TCMODE_E2E;
+
+	return 0;
+}
+
+static int ksz9477_ptp_tcmode_set(struct ksz_device *dev,
+				  enum ksz9477_ptp_tcmode tcmode)
+{
+	u16 data;
+	int ret;
+
+	ret = ksz_read16(dev, REG_PTP_MSG_CONF1, &data);
+	if (ret)
+		return ret;
+
+	if (tcmode == KSZ9477_PTP_TCMODE_P2P)
+		data |= PTP_TC_P2P;
+	else
+		data &= ~PTP_TC_P2P;
+
+	return ksz_write16(dev, REG_PTP_MSG_CONF1, data);
+}
+
+static ssize_t tcmode_show(struct device *dev, struct device_attribute *attr __always_unused,
+			   char *buf)
+{
+	struct ksz_device *ksz = dev_get_drvdata(dev);
+	enum ksz9477_ptp_tcmode tcmode;
+	int ret = ksz9477_ptp_tcmode_get(ksz, &tcmode);
+
+	if (ret)
+		return ret;
+
+	return sprintf(buf, "%s\n", tcmode == KSZ9477_PTP_TCMODE_P2P ? "P2P" : "E2E");
+}
+
+static ssize_t tcmode_store(struct device *dev, struct device_attribute *attr __always_unused,
+			    char const *buf, size_t count)
+{
+	struct ksz_device *ksz = dev_get_drvdata(dev);
+	int ret;
+
+	if (strcasecmp(buf, "E2E") == 0)
+		ret = ksz9477_ptp_tcmode_set(ksz, KSZ9477_PTP_TCMODE_E2E);
+	else if (strcasecmp(buf, "P2P") == 0)
+		ret = ksz9477_ptp_tcmode_set(ksz, KSZ9477_PTP_TCMODE_P2P);
+	else
+		return -EINVAL;
+
+	return ret ? ret : (ssize_t)count;
+}
+
+static DEVICE_ATTR_RW(tcmode);
+
+enum ksz9477_ptp_ocmode {
+	KSZ9477_PTP_OCMODE_SLAVE,
+	KSZ9477_PTP_OCMODE_MASTER,
+};
+
+static int ksz9477_ptp_ocmode_get(struct ksz_device *dev, enum ksz9477_ptp_ocmode *ocmode)
+{
+	u16 data;
+	int ret;
+
+	ret = ksz_read16(dev, REG_PTP_MSG_CONF1, &data);
+	if (ret)
+		return ret;
+
+	*ocmode = (data & PTP_MASTER) ? KSZ9477_PTP_OCMODE_MASTER : KSZ9477_PTP_OCMODE_SLAVE;
+
+	return 0;
+}
+
+static int ksz9477_ptp_ocmode_set(struct ksz_device *dev,
+				  enum ksz9477_ptp_ocmode ocmode)
+{
+	u16 data;
+	int ret;
+
+	ret = ksz_read16(dev, REG_PTP_MSG_CONF1, &data);
+	if (ret)
+		return ret;
+
+	if (ocmode == KSZ9477_PTP_OCMODE_MASTER)
+		data |= PTP_MASTER;
+	else
+		data &= ~PTP_MASTER;
+
+	return ksz_write16(dev, REG_PTP_MSG_CONF1, data);
+}
+
+static ssize_t ocmode_show(struct device *dev, struct device_attribute *attr __always_unused,
+			   char *buf)
+{
+	struct ksz_device *ksz = dev_get_drvdata(dev);
+	enum ksz9477_ptp_ocmode ocmode;
+	int ret = ksz9477_ptp_ocmode_get(ksz, &ocmode);
+
+	if (ret)
+		return ret;
+
+	return sprintf(buf, "%s\n", ocmode == KSZ9477_PTP_OCMODE_MASTER ? "master" : "slave");
+}
+
+static ssize_t ocmode_store(struct device *dev, struct device_attribute *attr __always_unused,
+			    char const *buf, size_t count)
+{
+	struct ksz_device *ksz = dev_get_drvdata(dev);
+	int ret;
+
+	if (strcasecmp(buf, "master") == 0)
+		ret = ksz9477_ptp_ocmode_set(ksz, KSZ9477_PTP_OCMODE_MASTER);
+	else if (strcasecmp(buf, "slave") == 0)
+		ret = ksz9477_ptp_ocmode_set(ksz, KSZ9477_PTP_OCMODE_SLAVE);
+	else
+		return -EINVAL;
+
+	return ret ? ret : (ssize_t)count;
+}
+
+static DEVICE_ATTR_RW(ocmode);
+
+static struct attribute *ksz9477_ptp_attrs[] = {
+	&dev_attr_tcmode.attr,
+	&dev_attr_ocmode.attr,
+	NULL,
+};
+
+static struct attribute_group ksz9477_ptp_attrgrp = {
+	.attrs = ksz9477_ptp_attrs,
+};
+
 int ksz_ptp_clock_register(struct dsa_switch *ds)
 {
 	struct ksz_device *dev = ds->priv;
@@ -951,7 +1105,16 @@ int ksz_ptp_clock_register(struct dsa_switch *ds)
 	if (IS_ERR_OR_NULL(ptp_data->clock))
 		return PTR_ERR(ptp_data->clock);
 
+	/* Init attributes */
+	ret = sysfs_create_group(&dev->dev->kobj, &ksz9477_ptp_attrgrp);
+	if (ret)
+		goto error_unregister_clock;
+
 	return 0;
+
+error_unregister_clock:
+	ptp_clock_unregister(ptp_data->clock);
+	return ret;
 }
 
 void ksz_ptp_clock_unregister(struct dsa_switch *ds)
@@ -959,6 +1122,7 @@ void ksz_ptp_clock_unregister(struct dsa_switch *ds)
 	struct ksz_device *dev = ds->priv;
 	struct ksz_ptp_data *ptp_data;
 
+	sysfs_remove_group(&dev->dev->kobj, &ksz9477_ptp_attrgrp);
 	ptp_data = &dev->ptp_data;
 
 	if (ptp_data->clock)
-- 
GitLab


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* RE: Re: Attempting Yocto Scarthgap prototype using 0001-net-dsa-microchip-ksz9477-add-E2E-support.patch
  2026-04-30  7:58     ` Attempting Yocto Scarthgap prototype using 0001-net-dsa-microchip-ksz9477-add-E2E-support.patch Christian Eggers
@ 2026-08-10 18:12       ` matt.becker
  0 siblings, 0 replies; 2+ messages in thread
From: matt.becker @ 2026-08-10 18:12 UTC (permalink / raw)
  To: ceggers
  Cc: matt.becker, Brian.Hutchinson, mikhail.mikhaylov, arun.ramadoss,
	netdev, UNGLinuxDriver


[-- Attachment #1.1.1: Type: text/plain, Size: 7849 bytes --]

Christian,

I owe you an update on our progress. It took a bit of experimentation, but we were eventually able to figure out the source of our wildly divergent master_offset values.

One of my co-workers (Mikhail) discovered what was missing. Here is the summary:

  *   Config of DSA / KSZ switch from 6.1 -> 6.6 moved a bunch of important (errata) configs from DSA driver -> Micrel driver.
  *   This change occurred in the common DSA driver code - had nothing to do with our out-of-tree E2E patch.
  *   Difficult to identify because chip config defaults DO NOT fail in obvious ways (working bonding, dhcp, ssh, ldap, http, even PTP on simpler networks).
  *   Enabling Micrel driver required one other change for our chip.
  *   Ultimately small 1 config + 1 kernel change needed. This is in addition to applying the E2E patch we had to ultimately

Commit comment from our local Linux kernel repo. This has some extra references & info.

    Enable micrel driver to handle ksz9477 logic being moved from dsa path to phy driver path.

      - Enabled Micrel PHY driver in defconfig
        - Allows KSZ9477/KSZ9567 PHY-specific init and EEE handling paths become available at runtime
        - https://github.com/Freescale/linux-fslc/commit/6068e6d7ba5001dfb96bb8b7b92e2ed2a5877786#diff-554dbe14174afbc1aad9f969287dadbff13f6a20e00067c6d9f4f936f316b52b
        - The KSZ9477 PHY errata handling code has now been moved into the Micrel PHY driver, so it is no longer needed inside the DSA switch driver.
      - Ensure MICREL_NO_EEE is enabled for KSZ9567_CHIP_ID
        - https://github.com/Freescale/linux-fslc/blob/6.6.x%2Bfslc/drivers/net/dsa/microchip/ksz_common.c#L2348
        - Found that KSZ9567 also requires EEE to be disabled as well
        - https://lkml.rescloud.iu.edu/2505.0/03000.html

arch/arm64/configs/two47_scarthgap_5.0.16_defconfig | 2 +-
drivers/net/dsa/microchip/ksz_common.c              | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)

I attached a copy of the .patch file that reflects our local changes for this fix which were applied in addition to the E2E .patch.

We still have some testing to do, but we now have PTP + E2E converging on Scarthap (currently 5.0.16 + kernel 6.6.50 + linuxptp4.1). Our offsets look very similar to our prior Dunfell/Kirkstone results .

-Matt

matt.becker@L3Harris.com<mailto:matt.becker@L3Harris.com>
(585) 369-1184

From: Christian Eggers <ceggers@arri.de>
Sent: Thursday, April 30, 2026 3:59 AM
To: Becker, Matt (US) - MCC <matt.becker@L3Harris.com>; Hutchinson, Brian (US) - MCC <Brian.Hutchinson@L3Harris.com>
Cc: arun.ramadoss@microchip.com; netdev@vger.kernel.org; UNGLinuxDriver@microchip.com
Subject: [EXTERNAL] Re: Attempting Yocto Scarthgap prototype using 0001-net-dsa-microchip-ksz9477-add-E2E-support.patch

WARNING: Email originated from an EXTERNAL source. Do NOT click links, open attachments or reply unless you recognize sender and know the content is safe.
CC: UNGLinuxDriver@microchip.com<mailto:UNGLinuxDriver@microchip.com>
CC: netdev@vger.kernel.org<mailto:netdev@vger.kernel.org>

Hi Matt, hi Brian,

although I did the initial development of the KSZ PTP patches, this never went
into our final products. Because of this, I am quite happy that Arun from
Microchip took over this and made several improvements.

The E2E patch was originally rejected (AFAIR), because the KSZ applies
(unwanted) filtering on the PTP messages. For E2E this means, that the
KSZ hardware filter needs to "know" whether this node is currently master or
slave clock. As there is no (and probably never will be) interface between
ptp4l and the kernel for communicating the current master/slave state, there
was no interest in merging this.

As we do not use PTP in our current software, I have only forward ported
the patch(es) for being compile clean (see attachment). But I haven't done
any real tests with newer kernels / ptp4l versions.

Unfortunately I will not be able to spent any time on this for the next
3 weeks. If the problem still persists then, I can try to have a look on
this. If you find the solution yourself, I would be happy getting an
update on this.

regards,
Christian

On Wednesday, 29 April 2026, 21:27:12 CEST, matt.becker@L3Harris.com<mailto:matt.becker@L3Harris.com> wrote:
> Christian/Arun,
>
> My name is Matt Becker. I work with Brian Hutchinson at L3Harris.
>
> A few years back we received & applied patches (net-dsa-microchip-ptp*) from Christian for our embedded board (imx8mm Arm processor + KSZ Microchip part). At the time these patches were developed for Yocto Dunfell (3.1) + Linux Kernel 5.10.69 + linuxptp-2.0 .
>
> We followed up and reapplied these patches with success on the same board when we upgraded to Yocto Kirkstone (4.0.x) + Linux Kernel 6.1.38 + linuxptp-3.1.1.
>
> We’re now attempting to bring this same board up to the most recent Yocto LTS release (Scarthgap 5.0.16) + Linux Kernel 6.6.50 + linuxptp-4.1 . This is where we’re running into some difficulty.
>
> It looks like most of the patches from a few years back were already merged back to the 6.6 kernel level. I only had to re-apply the patch 0001-net-dsa-microchip-ksz9477-add-E2E-support.patch as this was not merged back. It seems this change alone might not be sufficient. Our Scarthgap board is now able to select a grandmaster clock and it is able to receive adjustments. However, the master_offset values are very large, and PTP never converges.
>
> My suspicion is that I may need other changes to make this work on this new OS/kernel/PTP configuration.
>
> I was wondering if you might be able to offer any guidance:
>
> * Have you ever tried bringing this functionality (net-dsa-microchip-ksz9477-add-E2E-support) forward to a newer Linux kernel and/or PTP?
> * If so, do you have any unofficial patches we might be able to try?
> * If not, do you have any other advice on a path forward (e.g. changes that might be necessary outside of the original patches)?
>
> I attached an email thread with myself & Brian that has a little bit more detail.
>
> If you have any ideas or help you can offer it would be greatly appreciated!
>
> Sincerely,
>
> -Matt Becker
>
> matt.becker@L3Harris.com<mailto:matt.becker@L3Harris.com<mailto:matt.becker@L3Harris.com%3cmailto:matt.becker@L3Harris.com>>
> (585) 369-1184
>
>
>
> CONFIDENTIALITY NOTICE: This email and any attachments are for the sole use of the intended recipient and may contain material that is proprietary, confidential, privileged or otherwise legally protected or restricted under applicable government laws. Any review, disclosure, distributing or other use without expressed permission of the sender is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies without reading, printing, or saving.
>
>
_______________________________________________________
​​​​
Christian

Eggers
Software Engineer
​
ARRI
Arnold & Richter Cine Technik GmbH & Co. Betriebs KG
Herbert‑Bayer‑Str. 10
,
80807

München
www.arri.com

<http://www.arri.com/>
[cid:image001.png@01DD28D0.4A0CBBC0]
+49 89 3809-1321<tel:+49%2089%203809-1321>
[cid:image002.png@01DD28D0.4A0CBBC0]
CEggers@arri.de<mailto:CEggers@arri.de>

​
[The cinematography of “Frankenstein” | shot on ALEXA 65]<https://youtu.be/Oka0A8RspUc?si=4NHJ78cNY_h5YQJx>
Arnold & Richter Cine Technik GmbH & Co. Betriebs KG
Sitz: München ‑ Registergericht: Amtsgericht München ‑ Handelsregisternummer: HRA 57918
Persönlich haftender Gesellschafter: Arnold & Richter Cine Technik GmbH
Sitz: München ‑ Registergericht: Amtsgericht München ‑ Handelsregisternummer: HRB 54477
Geschäftsführer: David Bermbach, Christian Richter

​


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From 6e836bda5304943cdf93fa6c3f8d7cfccee0c28e Mon Sep 17 00:00:00 2001
From: Mikhail Mikhaylov <mikhail.mikhaylov@l3harris.com>
Date: Thu, 30 Jul 2026 13:11:20 -0400
Subject: [PATCH 1/2] Enable micrel driver to handle ksz9477 logic being moved
 from dsa path to phy driver path.

  - Enabled Micrel PHY driver in defconfig
    - Allows KSZ9477/KSZ9567 PHY-specific init and EEE handling paths become available at runtime
    - https://github.com/Freescale/linux-fslc/commit/6068e6d7ba5001dfb96bb8b7b92e2ed2a5877786#diff-554dbe14174afbc1aad9f969287dadbff13f6a20e00067c6d9f4f936f316b52b
    - The KSZ9477 PHY errata handling code has now been moved into the Micrel PHY driver, so it is no longer needed inside the DSA switch driver.
  - Ensure MICREL_NO_EEE is enabled for KSZ9567_CHIP_ID
    - https://github.com/Freescale/linux-fslc/blob/6.6.x%2Bfslc/drivers/net/dsa/microchip/ksz_common.c#L2348
    - Found that KSZ9567 also requires EEE to be disabled as well
    - https://lkml.rescloud.iu.edu/2505.0/03000.html
---
 arch/arm64/configs/two47_scarthgap_5.0.16_defconfig | 2 +-
 drivers/net/dsa/microchip/ksz_common.c              | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/configs/two47_scarthgap_5.0.16_defconfig b/arch/arm64/configs/two47_scarthgap_5.0.16_defconfig
index d6ad4f3508..c625aa4e25 100644
--- a/arch/arm64/configs/two47_scarthgap_5.0.16_defconfig
+++ b/arch/arm64/configs/two47_scarthgap_5.0.16_defconfig
@@ -1941,7 +1941,7 @@ CONFIG_FIXED_PHY=y
 # CONFIG_MARVELL_88X2222_PHY is not set
 # CONFIG_MAXLINEAR_GPHY is not set
 # CONFIG_MEDIATEK_GE_PHY is not set
-# CONFIG_MICREL_PHY is not set
+CONFIG_MICREL_PHY=y
 CONFIG_MICROCHIP_PHY=y
 # CONFIG_MICROCHIP_T1_PHY is not set
 # CONFIG_MICROSEMI_PHY is not set
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index 1c3f186499..2ba5a989e6 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -2344,6 +2344,7 @@ static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port)
 		if (!port)
 			return MICREL_KSZ8_P1_ERRATA;
 		break;
+	case KSZ9567_CHIP_ID:
 	case KSZ9477_CHIP_ID:
 		/* KSZ9477 Errata DS80000754C
 		 *
-- 
2.43.0


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