[net-next 0/2] Intel Wired LAN Driver Updates

[net-next 0/2] Intel Wired LAN Driver Updates

[Aaron Brown]

This series contains several updates from Alex to ixgbe.

To avoid head of line blocking in the event a VF stops cleaning Rx descriptors
he makes sure QDE bits are set for a VF before the Rx queues are enabled.

To avoid a situation where the head write-back registers can remain set ofter 
the driver is unloaded he clears them on a VF reset.

Alexander Duyck (2):
  ixgbe: Force QDE via PFQDE for VFs during reset
  ixgbe: Clear head write-back registers on VF reset

 drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c | 23 +++++++++++++++++++++++
 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h  | 15 ++++++++++++---
 2 files changed, 35 insertions(+), 3 deletions(-)

-- 
1.8.5.GIT

[net-next 1/2] ixgbe: Force QDE via PFQDE for VFs during reset

[Aaron Brown]

From: Alexander Duyck <alexander.h.duyck@intel.com>

This change makes it so that the QDE bits are set for a VF before the Rx
queues are enabled.  As such we avoid head of line blocking in the event
that the VF stops cleaning Rx descriptors for whatever reason.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>

 drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c |   14 ++++++++++++++
 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h  |    7 ++++---
 2 files changed, 18 insertions(+), 3 deletions(-)
Signed-off-by: Aaron Brown <aaron.f.brown@intel.com>
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c | 14 ++++++++++++++
 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h  |  7 ++++---
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
index 359f6e6..43e10c6 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
@@ -631,11 +631,14 @@ int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask)
 
 static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf)
 {
+	struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
 	struct ixgbe_hw *hw = &adapter->hw;
 	unsigned char *vf_mac = adapter->vfinfo[vf].vf_mac_addresses;
 	u32 reg, reg_offset, vf_shift;
 	u32 msgbuf[4] = {0, 0, 0, 0};
 	u8 *addr = (u8 *)(&msgbuf[1]);
+	u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
+	int i;
 
 	e_info(probe, "VF Reset msg received from vf %d\n", vf);
 
@@ -654,6 +657,17 @@ static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf)
 	reg |= 1 << vf_shift;
 	IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), reg);
 
+	/* force drop enable for all VF Rx queues */
+	for (i = vf * q_per_pool; i < ((vf + 1) * q_per_pool); i++) {
+		/* flush previous write */
+		IXGBE_WRITE_FLUSH(hw);
+
+		/* indicate to hardware that we want to set drop enable */
+		reg = IXGBE_QDE_WRITE | IXGBE_QDE_ENABLE;
+		reg |= i <<  IXGBE_QDE_IDX_SHIFT;
+		IXGBE_WRITE_REG(hw, IXGBE_QDE, reg);
+	}
+
 	/* enable receive for vf */
 	reg = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset));
 	reg |= 1 << vf_shift;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index 7c19e96..d8e59f4 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -1980,9 +1980,10 @@ enum {
 #define IXGBE_FWSM_TS_ENABLED	0x1
 
 /* Queue Drop Enable */
-#define IXGBE_QDE_ENABLE     0x00000001
-#define IXGBE_QDE_IDX_MASK   0x00007F00
-#define IXGBE_QDE_IDX_SHIFT           8
+#define IXGBE_QDE_ENABLE	0x00000001
+#define IXGBE_QDE_IDX_MASK	0x00007F00
+#define IXGBE_QDE_IDX_SHIFT	8
+#define IXGBE_QDE_WRITE		0x00010000
 
 #define IXGBE_TXD_POPTS_IXSM 0x01       /* Insert IP checksum */
 #define IXGBE_TXD_POPTS_TXSM 0x02       /* Insert TCP/UDP checksum */
-- 
1.8.5.GIT

[net-next 2/2] ixgbe: Clear head write-back registers on VF reset

[Aaron Brown]

From: Alexander Duyck <alexander.h.duyck@intel.com>

The Tx head write-back registers are not cleared during an FLR or VF reset.
As a result a configuration that had head write-back enabled can leave the
registers set after the driver is unloaded.  If the next driver loaded doesn't
use the write-back registers this can lead to a bad configuration where
head write-back is enabled, but the driver didn't request it.

To avoid this situation the PF should be resetting the Tx head write-back
registers when the VF requests a reset.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Aaron Brown <aaron.f.brown@intel.com>
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c | 9 +++++++++
 drivers/net/ethernet/intel/ixgbe/ixgbe_type.h  | 8 ++++++++
 2 files changed, 17 insertions(+)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
index 43e10c6..0558c71 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
@@ -698,6 +698,15 @@ static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf)
 	reg |= (1 << vf_shift);
 	IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg);
 
+	/*
+	 * Reset the VFs TDWBAL and TDWBAH registers
+	 * which are not cleared by an FLR
+	 */
+	for (i = 0; i < q_per_pool; i++) {
+		IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0);
+		IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0);
+	}
+
 	/* reply to reset with ack and vf mac address */
 	msgbuf[0] = IXGBE_VF_RESET;
 	if (!is_zero_ether_addr(vf_mac)) {
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index d8e59f4..0d39cfc 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -2174,6 +2174,14 @@ enum {
 #define IXGBE_MBVFICR(_i)		(0x00710 + ((_i) * 4))
 #define IXGBE_VFLRE(_i)		((((_i) & 1) ? 0x001C0 : 0x00600))
 #define IXGBE_VFLREC(_i)		(0x00700 + ((_i) * 4))
+/* Translated register #defines */
+#define IXGBE_PVFTDWBAL(P)	(0x06038 + (0x40 * (P)))
+#define IXGBE_PVFTDWBAH(P)	(0x0603C + (0x40 * (P)))
+
+#define IXGBE_PVFTDWBALn(q_per_pool, vf_number, vf_q_index) \
+		(IXGBE_PVFTDWBAL((q_per_pool)*(vf_number) + (vf_q_index)))
+#define IXGBE_PVFTDWBAHn(q_per_pool, vf_number, vf_q_index) \
+		(IXGBE_PVFTDWBAH((q_per_pool)*(vf_number) + (vf_q_index)))
 
 enum ixgbe_fdir_pballoc_type {
 	IXGBE_FDIR_PBALLOC_NONE = 0,
-- 
1.8.5.GIT

Re: [net-next 0/2] Intel Wired LAN Driver Updates

[David Miller]

From: Aaron Brown <aaron.f.brown@intel.com>
Date: Wed, 15 Jan 2014 17:38:39 -0800

> This series contains several updates from Alex to ixgbe.
> 
> To avoid head of line blocking in the event a VF stops cleaning Rx descriptors
> he makes sure QDE bits are set for a VF before the Rx queues are enabled.
> 
> To avoid a situation where the head write-back registers can remain set ofter 
> the driver is unloaded he clears them on a VF reset.

Series applied, thanks Aaron.

[net-next 0/2] Intel Wired LAN Driver Updates

[Aaron Brown]

This series contains updates to i40e from Greg Rose for VLAN filtering.

Greg Rose (2):
  i40e: Warn admin to reload VF driver on port VLAN configuration.  
    When an administrator sets a port VLAN filters for the virtual
    function (VF) after the VF has already set its own VLAN filters a 
    conflict requiring the VF be reloaded can occur.  This patch logs a
    message indicating to the system administrator that the VF driver 
    must be reloaded for the new port VLAN settings to take effect

  i40e: Retain MAC filters on port VLAN deletion
    On port VLAN deletion the list of MAC filters for the virtual function
    (VF) VSI were all deleted.  Let's keep them around, they come in
    handy for keeping the VF functional.

 drivers/net/ethernet/intel/i40e/i40e_main.c        |  3 +++
 drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | 18 ++++++++++++++++++
 2 files changed, 21 insertions(+)

-- 
1.8.5.GIT

Re: [net-next 0/2] Intel Wired LAN Driver Updates

[David Miller]

From: Aaron Brown <aaron.f.brown@intel.com>
Date: Mon, 13 Jan 2014 16:13:02 -0800

> This series contains updates to i40e from Greg Rose for VLAN filtering.

Series applied, thanks Aaron.