* [PATCH 1/1] ixgbe: write flush vfta registers
@ 2016-11-16 12:40 zyjzyj2000
2016-11-16 14:05 ` Aw: " Lino Sanfilippo
0 siblings, 1 reply; 5+ messages in thread
From: zyjzyj2000 @ 2016-11-16 12:40 UTC (permalink / raw)
To: e1000-devel, netdev, jeffrey.t.kirsher, intel-wired-lan; +Cc: Zhu Yanjun
From: Zhu Yanjun <zyjzyj2000@gmail.com>
Sometimes vfta registers can not be written successfully in dcb mode.
This is very occassional. When the ixgbe nic runs for a very long time,
sometimes this bug occurs. But after IXGBE_WRITE_FLUSH is executed,
this bug never occurs.
Signed-off-by: Zhu Yanjun <zyjzyj2000@gmail.com>
---
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index bd93d82..1221cfb 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -4138,8 +4138,10 @@ static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
}
/* Set all bits in the VLAN filter table array */
- for (i = hw->mac.vft_size; i--;)
+ for (i = hw->mac.vft_size; i--;) {
IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
+ IXGBE_WRITE_FLUSH(hw);
+ }
}
#define VFTA_BLOCK_SIZE 8
@@ -4186,6 +4188,7 @@ static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
vfta[i] |= adapter->active_vlans[word] >> bits;
IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
+ IXGBE_WRITE_FLUSH(hw);
}
}
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* Aw: [PATCH 1/1] ixgbe: write flush vfta registers
2016-11-16 12:40 [PATCH 1/1] ixgbe: write flush vfta registers zyjzyj2000
@ 2016-11-16 14:05 ` Lino Sanfilippo
2016-11-17 9:33 ` zhuyj
0 siblings, 1 reply; 5+ messages in thread
From: Lino Sanfilippo @ 2016-11-16 14:05 UTC (permalink / raw)
To: zyjzyj2000
Cc: e1000-devel, netdev, jeffrey.t.kirsher, intel-wired-lan,
Zhu Yanjun
Hi,
>
> Sometimes vfta registers can not be written successfully in dcb mode.
> This is very occassional. When the ixgbe nic runs for a very long time,
> sometimes this bug occurs. But after IXGBE_WRITE_FLUSH is executed,
> this bug never occurs.
>
> Signed-off-by: Zhu Yanjun <zyjzyj2000@gmail.com>
> ---
> drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
> index bd93d82..1221cfb 100644
> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
> @@ -4138,8 +4138,10 @@ static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
> }
>
> /* Set all bits in the VLAN filter table array */
> - for (i = hw->mac.vft_size; i--;)
> + for (i = hw->mac.vft_size; i--;) {
> IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
> + IXGBE_WRITE_FLUSH(hw);
> + }
Should it not be sufficient to do the flush only once, at the end of the function?
Regards,
Lino
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/1] ixgbe: write flush vfta registers
2016-11-16 14:05 ` Aw: " Lino Sanfilippo
@ 2016-11-17 9:33 ` zhuyj
2016-12-07 3:05 ` zhuyj
0 siblings, 1 reply; 5+ messages in thread
From: zhuyj @ 2016-11-17 9:33 UTC (permalink / raw)
To: Lino Sanfilippo
Cc: e1000-devel@lists.sourceforge.net, netdev, intel-wired-lan
Sure. From the following.
"
VLAN Filter. Each bit ‘i’ in register ‘n’ affects packets with VLAN
tags equal to 32*n+i.
128 VLAN Filter registers compose a table of 4096 bits that cover all
possible VLAN
tags.
Each bit when set, enables packets with the associated VLAN tags to
pass. Each bit
when cleared, blocks packets with this VLAN tag.
"
Your suggestions seems reasonable. Please wait. I will make tests to
vefiry your suggestions.
I will keep you update.
On Wed, Nov 16, 2016 at 10:05 PM, Lino Sanfilippo <LinoSanfilippo@gmx.de> wrote:
>
>
> Hi,
>
>>
>> Sometimes vfta registers can not be written successfully in dcb mode.
>> This is very occassional. When the ixgbe nic runs for a very long time,
>> sometimes this bug occurs. But after IXGBE_WRITE_FLUSH is executed,
>> this bug never occurs.
>>
>> Signed-off-by: Zhu Yanjun <zyjzyj2000@gmail.com>
>> ---
>> drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>> index bd93d82..1221cfb 100644
>> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>> @@ -4138,8 +4138,10 @@ static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
>> }
>>
>> /* Set all bits in the VLAN filter table array */
>> - for (i = hw->mac.vft_size; i--;)
>> + for (i = hw->mac.vft_size; i--;) {
>> IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
>> + IXGBE_WRITE_FLUSH(hw);
>> + }
>
> Should it not be sufficient to do the flush only once, at the end of the function?
>
> Regards,
> Lino
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/1] ixgbe: write flush vfta registers
2016-11-17 9:33 ` zhuyj
@ 2016-12-07 3:05 ` zhuyj
2016-12-07 19:24 ` Lino Sanfilippo
0 siblings, 1 reply; 5+ messages in thread
From: zhuyj @ 2016-12-07 3:05 UTC (permalink / raw)
To: Lino Sanfilippo
Cc: e1000-devel@lists.sourceforge.net, netdev, intel-wired-lan
After several week tests, your advice still make this bug appear. But
my patch make this bug disappear.
Zhu Yanjun
On Thu, Nov 17, 2016 at 5:33 PM, zhuyj <zyjzyj2000@gmail.com> wrote:
> Sure. From the following.
> "
> VLAN Filter. Each bit ‘i’ in register ‘n’ affects packets with VLAN
> tags equal to 32*n+i.
> 128 VLAN Filter registers compose a table of 4096 bits that cover all
> possible VLAN
> tags.
> Each bit when set, enables packets with the associated VLAN tags to
> pass. Each bit
> when cleared, blocks packets with this VLAN tag.
> "
> Your suggestions seems reasonable. Please wait. I will make tests to
> vefiry your suggestions.
>
> I will keep you update.
>
> On Wed, Nov 16, 2016 at 10:05 PM, Lino Sanfilippo <LinoSanfilippo@gmx.de> wrote:
>>
>>
>> Hi,
>>
>>>
>>> Sometimes vfta registers can not be written successfully in dcb mode.
>>> This is very occassional. When the ixgbe nic runs for a very long time,
>>> sometimes this bug occurs. But after IXGBE_WRITE_FLUSH is executed,
>>> this bug never occurs.
>>>
>>> Signed-off-by: Zhu Yanjun <zyjzyj2000@gmail.com>
>>> ---
>>> drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 5 ++++-
>>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>>> index bd93d82..1221cfb 100644
>>> --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>>> +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
>>> @@ -4138,8 +4138,10 @@ static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
>>> }
>>>
>>> /* Set all bits in the VLAN filter table array */
>>> - for (i = hw->mac.vft_size; i--;)
>>> + for (i = hw->mac.vft_size; i--;) {
>>> IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
>>> + IXGBE_WRITE_FLUSH(hw);
>>> + }
>>
>> Should it not be sufficient to do the flush only once, at the end of the function?
>>
>> Regards,
>> Lino
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/1] ixgbe: write flush vfta registers
2016-12-07 3:05 ` zhuyj
@ 2016-12-07 19:24 ` Lino Sanfilippo
0 siblings, 0 replies; 5+ messages in thread
From: Lino Sanfilippo @ 2016-12-07 19:24 UTC (permalink / raw)
To: zhuyj; +Cc: e1000-devel@lists.sourceforge.net, netdev, intel-wired-lan
Hi Zhu,
On 07.12.2016 04:05, zhuyj wrote:
> After several week tests, your advice still make this bug appear. But
> my patch make this bug disappear.
>
> Zhu Yanjun
>
In your commit message you wrote
"Sometimes vfta registers can not be written successfully in dcb mode."
Do you mean that the writes to the registers dont seem to have any effect at all? Or is the
effect only delayed? What exactly is your test case?
(BTW: please dont top-post).
Regards,
Lino
------------------------------------------------------------------------------
Developer Access Program for Intel Xeon Phi Processors
Access to Intel Xeon Phi processor-based developer platforms.
With one year of Intel Parallel Studio XE.
Training and support from Colfax.
Order your platform today.http://sdm.link/xeonphi
_______________________________________________
E1000-devel mailing list
E1000-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/e1000-devel
To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
^ permalink raw reply [flat|nested] 5+ messages in thread
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2016-11-16 12:40 [PATCH 1/1] ixgbe: write flush vfta registers zyjzyj2000
2016-11-16 14:05 ` Aw: " Lino Sanfilippo
2016-11-17 9:33 ` zhuyj
2016-12-07 3:05 ` zhuyj
2016-12-07 19:24 ` Lino Sanfilippo
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