From: Stephen Boyd <sboyd@kernel.org>
To: Laura Nao <laura.nao@collabora.com>,
angelogioacchino.delregno@collabora.com, conor+dt@kernel.org,
krzk+dt@kernel.org, matthias.bgg@gmail.com,
mturquette@baylibre.com, p.zabel@pengutronix.de,
richardcochran@gmail.com, robh@kernel.org
Cc: guangjie.song@mediatek.com, wenst@chromium.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, netdev@vger.kernel.org,
kernel@collabora.com, "Laura Nao" <laura.nao@collabora.com>,
"Nícolas F . R . A . Prado" <nfraprado@collabora.com>
Subject: Re: [PATCH v6 25/27] clk: mediatek: Add MT8196 ovl1 clock support
Date: Sun, 21 Sep 2025 09:55:04 -0700 [thread overview]
Message-ID: <175847370443.4354.544247349627203501@lazor> (raw)
In-Reply-To: <20250915151947.277983-26-laura.nao@collabora.com>
Quoting Laura Nao (2025-09-15 08:19:45)
> Add support for the MT8196 ovl1 clock controller, which provides clock
> gate control for the display system. It is integrated with the mtk-mmsys
> driver, which registers the ovl1 clock driver via
> platform_device_register_data().
>
> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: Laura Nao <laura.nao@collabora.com>
> ---
Applied to clk-next
next prev parent reply other threads:[~2025-09-21 16:55 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-15 15:19 [PATCH v6 00/27] Add support for MT8196 clock controllers Laura Nao
2025-09-15 15:19 ` [PATCH v6 01/27] clk: mediatek: clk-pll: Add set/clr regs for shared PLL enable control Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 02/27] clk: mediatek: clk-pll: Add ops for PLLs using set/clr regs and FENC Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 03/27] clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd " Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 04/27] clk: mediatek: clk-mtk: Introduce mtk_clk_get_hwv_regmap() Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 05/27] clk: mediatek: clk-mux: Add ops for mux gates with HW voter and FENC Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 06/27] clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-10-12 17:50 ` issue with " Frank Wunderlich
2025-10-23 11:09 ` Laura Nao
2025-10-23 17:34 ` Aw: " frank-w
2025-10-24 11:21 ` Laura Nao
2025-09-15 15:19 ` [PATCH v6 07/27] clk: mediatek: clk-gate: Add ops for gates with HW voter Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 08/27] clk: mediatek: clk-mtk: Add MUX_DIV_GATE macro Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 09/27] dt-bindings: clock: mediatek: Describe MT8196 clock controllers Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 10/27] clk: mediatek: Add MT8196 apmixedsys clock support Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 11/27] clk: mediatek: Add MT8196 topckgen " Laura Nao
2025-09-21 16:53 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 12/27] clk: mediatek: Add MT8196 topckgen2 " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 13/27] clk: mediatek: Add MT8196 vlpckgen " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 14/27] clk: mediatek: Add MT8196 peripheral " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 15/27] clk: mediatek: Add MT8196 ufssys " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 16/27] clk: mediatek: Add MT8196 pextpsys " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 17/27] clk: mediatek: Add MT8196 I2C " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 18/27] clk: mediatek: Add MT8196 mcu " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 19/27] clk: mediatek: Add MT8196 mdpsys " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 20/27] clk: mediatek: Add MT8196 mfg " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 21/27] clk: mediatek: Add MT8196 disp0 " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 22/27] clk: mediatek: Add MT8196 disp1 " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 23/27] clk: mediatek: Add MT8196 disp-ao " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 24/27] clk: mediatek: Add MT8196 ovl0 " Laura Nao
2025-09-21 16:54 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 25/27] clk: mediatek: Add MT8196 ovl1 " Laura Nao
2025-09-21 16:55 ` Stephen Boyd [this message]
2025-09-15 15:19 ` [PATCH v6 26/27] clk: mediatek: Add MT8196 vdecsys " Laura Nao
2025-09-21 16:55 ` Stephen Boyd
2025-09-15 15:19 ` [PATCH v6 27/27] clk: mediatek: Add MT8196 vencsys " Laura Nao
2025-09-21 16:55 ` Stephen Boyd
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