* RE: [EXTERNAL] [PATCH net] octeontx2: use arch_extension to enable LSE
2026-10-05 16:21 [PATCH net] octeontx2: use arch_extension to enable LSE Emanuele Rocca
@ 2026-10-05 17:01 ` Geethasowjanya Akula
2026-10-06 8:42 ` Geethasowjanya Akula
2026-10-08 23:50 ` patchwork-bot+netdevbpf
2 siblings, 0 replies; 4+ messages in thread
From: Geethasowjanya Akula @ 2026-10-05 17:01 UTC (permalink / raw)
To: Emanuele Rocca, Sunil Kovvuri Goutham
Cc: Ratheesh Kannoth, Subbaraya Sundeep Bhatta, Bharat Bhushan,
Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Srujana Challa, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Tamar Christina,
Jeremy Linton
>-----Original Message-----
>From: Emanuele Rocca <emanuele.rocca@arm.com>
>Sent: Monday, October 5, 2026 9:52 PM
>To: Sunil Kovvuri Goutham <sgoutham@marvell.com>
>Cc: Geethasowjanya Akula <gakula@marvell.com>; Ratheesh Kannoth
><rkannoth@marvell.com>; Subbaraya Sundeep Bhatta
><sbhatta@marvell.com>; Bharat Bhushan <bbhushan2@marvell.com>;
>Andrew Lunn <andrew+netdev@lunn.ch>; David S. Miller
><davem@davemloft.net>; Eric Dumazet <edumazet@kernel.org>; Jakub
>Kicinski <kuba@kernel.org>; Paolo Abeni <pabeni@redhat.com>; Srujana
>Challa <schalla@marvell.com>; netdev@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-crypto@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; Tamar Christina <Tamar.Christina@arm.com>;
>Jeremy Linton <Jeremy.Linton@arm.com>; Emanuele Rocca
><emanuele.rocca@arm.com>
>Subject: [EXTERNAL] [PATCH net] octeontx2: use arch_extension to enable LSE
>
>Instead of using ".cpu generic+lse", use ".arch_extension lse" to enable LSE.
>
>The ".cpu generic+lse" directive replaces the assembler's current feature set
>with generic+lse, dropping other previously enabled features. In contrast,
>".arch_extension lse" enables LSE while preserving the current feature set.
>
>For example, the following code is rejected with "selected processor does not
>support retaa", because ".cpu generic+lse" drops PAuth even though it was
>enabled by armv9-a:
>
> .arch armv9-a
> .text
> .cpu generic+lse
> retaa
>
>We encountered this issue while building the kernel with GCC configured using
>--with-arch=armv9-a. Since Armv9-A includes pointer authentication, GCC can
>assume that PAuth instructions are available and may use retaa when
>generating PAuth-protected returns.
>
>Fixes: caa2da34fd25a ("octeontx2-pf: Initialize and config queues")
>Signed-off-by: Emanuele Rocca <emanuele.rocca@arm.com>
>---
> drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h | 2 +-
> include/linux/soc/marvell/octeontx2/asm.h | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>index eecee612b7b2..c525c557b38e 100644
>--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>@@ -786,7 +786,7 @@ static inline u64 otx2_atomic64_add(u64 incr, void
>__iomem *addr)
> u64 __iomem *ptr = addr;
> u64 result;
>
>- __asm__ volatile(".cpu generic+lse\n"
>+ __asm__ volatile(".arch_extension lse\n"
> "ldadd %x[i], %x[r], [%[b]]"
> : [r]"=r"(result), "+m"(*ptr)
> : [i]"r"(incr), [b]"r"(ptr)
>diff --git a/include/linux/soc/marvell/octeontx2/asm.h
>b/include/linux/soc/marvell/octeontx2/asm.h
>index d683251a0b40..a9d29f5d6eeb 100644
>--- a/include/linux/soc/marvell/octeontx2/asm.h
>+++ b/include/linux/soc/marvell/octeontx2/asm.h
>@@ -17,7 +17,7 @@
> #define otx2_lmt_flush(ioaddr) \
> ({ \
> u64 result = 0; \
>- __asm__ volatile(".cpu generic+lse\n" \
>+ __asm__ volatile(".arch_extension lse\n" \
> "ldeor xzr, %x[rf], [%[rs]]" \
> : [rf]"=r" (result) \
> : [rs]"r" (ioaddr)); \
>@@ -30,7 +30,7 @@
> */
> #define cn10k_lmt_flush(val, addr) \
> ({ \
>- __asm__ volatile(".cpu generic+lse\n" \
>+ __asm__ volatile(".arch_extension lse\n" \
> "steorl %x[rf],[%[rs]]" \
> : [rf] "+r"(val) \
> : [rs] "r"(addr)); \
>@@ -40,7 +40,7 @@ static inline u64 otx2_atomic64_fetch_add(u64 incr, u64
>*ptr) {
> u64 result;
>
>- asm volatile (".cpu generic+lse\n"
>+ asm volatile (".arch_extension lse\n"
> "ldadda %x[i], %x[r], [%[b]]"
> : [r] "=r" (result), "+m" (*ptr)
> : [i] "r" (incr), [b] "r" (ptr)
>--
>2.47.3
Thanks for the patch.
We will verify these changes on our hardware and provide our feedback by tomorrow.
Geetha.
^ permalink raw reply [flat|nested] 4+ messages in thread* RE: [EXTERNAL] [PATCH net] octeontx2: use arch_extension to enable LSE
2026-10-05 16:21 [PATCH net] octeontx2: use arch_extension to enable LSE Emanuele Rocca
2026-10-05 17:01 ` [EXTERNAL] " Geethasowjanya Akula
@ 2026-10-06 8:42 ` Geethasowjanya Akula
2026-10-08 23:50 ` patchwork-bot+netdevbpf
2 siblings, 0 replies; 4+ messages in thread
From: Geethasowjanya Akula @ 2026-10-06 8:42 UTC (permalink / raw)
To: Emanuele Rocca, Sunil Kovvuri Goutham
Cc: Ratheesh Kannoth, Subbaraya Sundeep Bhatta, Bharat Bhushan,
Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Srujana Challa, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Tamar Christina,
Jeremy Linton
>-----Original Message-----
>From: Emanuele Rocca <emanuele.rocca@arm.com>
>Sent: Monday, October 5, 2026 9:52 PM
>To: Sunil Kovvuri Goutham <sgoutham@marvell.com>
>Cc: Geethasowjanya Akula <gakula@marvell.com>; Ratheesh Kannoth
><rkannoth@marvell.com>; Subbaraya Sundeep Bhatta
><sbhatta@marvell.com>; Bharat Bhushan <bbhushan2@marvell.com>;
>Andrew Lunn <andrew+netdev@lunn.ch>; David S. Miller
><davem@davemloft.net>; Eric Dumazet <edumazet@kernel.org>; Jakub
>Kicinski <kuba@kernel.org>; Paolo Abeni <pabeni@redhat.com>; Srujana
>Challa <schalla@marvell.com>; netdev@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-crypto@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; Tamar Christina <Tamar.Christina@arm.com>;
>Jeremy Linton <Jeremy.Linton@arm.com>; Emanuele Rocca
><emanuele.rocca@arm.com>
>Subject: [EXTERNAL] [PATCH net] octeontx2: use arch_extension to enable LSE
>
>Instead of using ".cpu generic+lse", use ".arch_extension lse" to enable LSE.
>
>The ".cpu generic+lse" directive replaces the assembler's current feature set
>with generic+lse, dropping other previously enabled features. In contrast,
>".arch_extension lse" enables LSE while preserving the current feature set.
>
>For example, the following code is rejected with "selected processor does not
>support retaa", because ".cpu generic+lse" drops PAuth even though it was
>enabled by armv9-a:
>
> .arch armv9-a
> .text
> .cpu generic+lse
> retaa
>
>We encountered this issue while building the kernel with GCC configured using
>--with-arch=armv9-a. Since Armv9-A includes pointer authentication, GCC can
>assume that PAuth instructions are available and may use retaa when
>generating PAuth-protected returns.
>
>Fixes: caa2da34fd25a ("octeontx2-pf: Initialize and config queues")
>Signed-off-by: Emanuele Rocca <emanuele.rocca@arm.com>
>---
> drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h | 2 +-
> include/linux/soc/marvell/octeontx2/asm.h | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>index eecee612b7b2..c525c557b38e 100644
>--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
>@@ -786,7 +786,7 @@ static inline u64 otx2_atomic64_add(u64 incr, void
>__iomem *addr)
> u64 __iomem *ptr = addr;
> u64 result;
>
>- __asm__ volatile(".cpu generic+lse\n"
>+ __asm__ volatile(".arch_extension lse\n"
> "ldadd %x[i], %x[r], [%[b]]"
> : [r]"=r"(result), "+m"(*ptr)
> : [i]"r"(incr), [b]"r"(ptr)
>diff --git a/include/linux/soc/marvell/octeontx2/asm.h
>b/include/linux/soc/marvell/octeontx2/asm.h
>index d683251a0b40..a9d29f5d6eeb 100644
>--- a/include/linux/soc/marvell/octeontx2/asm.h
>+++ b/include/linux/soc/marvell/octeontx2/asm.h
>@@ -17,7 +17,7 @@
> #define otx2_lmt_flush(ioaddr) \
> ({ \
> u64 result = 0; \
>- __asm__ volatile(".cpu generic+lse\n" \
>+ __asm__ volatile(".arch_extension lse\n" \
> "ldeor xzr, %x[rf], [%[rs]]" \
> : [rf]"=r" (result) \
> : [rs]"r" (ioaddr)); \
>@@ -30,7 +30,7 @@
> */
> #define cn10k_lmt_flush(val, addr) \
> ({ \
>- __asm__ volatile(".cpu generic+lse\n" \
>+ __asm__ volatile(".arch_extension lse\n" \
> "steorl %x[rf],[%[rs]]" \
> : [rf] "+r"(val) \
> : [rs] "r"(addr)); \
>@@ -40,7 +40,7 @@ static inline u64 otx2_atomic64_fetch_add(u64 incr, u64
>*ptr) {
> u64 result;
>
>- asm volatile (".cpu generic+lse\n"
>+ asm volatile (".arch_extension lse\n"
> "ldadda %x[i], %x[r], [%[b]]"
> : [r] "=r" (result), "+m" (*ptr)
> : [i] "r" (incr), [b] "r" (ptr)
>--
>2.47.3
Tested-by: Geetha sowjanya <gakula@marvell.com>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH net] octeontx2: use arch_extension to enable LSE
2026-10-05 16:21 [PATCH net] octeontx2: use arch_extension to enable LSE Emanuele Rocca
2026-10-05 17:01 ` [EXTERNAL] " Geethasowjanya Akula
2026-10-06 8:42 ` Geethasowjanya Akula
@ 2026-10-08 23:50 ` patchwork-bot+netdevbpf
2 siblings, 0 replies; 4+ messages in thread
From: patchwork-bot+netdevbpf @ 2026-10-08 23:50 UTC (permalink / raw)
To: Emanuele Rocca
Cc: sgoutham, gakula, rkannoth, sbhatta, bbhushan2, andrew+netdev,
davem, edumazet, kuba, pabeni, schalla, netdev, linux-kernel,
linux-crypto, linux-arm-kernel, Tamar.Christina, Jeremy.Linton
Hello:
This patch was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@kernel.org>:
On Mon, 5 Oct 2026 18:21:37 +0200 you wrote:
> Instead of using ".cpu generic+lse", use ".arch_extension lse" to
> enable LSE.
>
> The ".cpu generic+lse" directive replaces the assembler's current feature
> set with generic+lse, dropping other previously enabled features. In
> contrast, ".arch_extension lse" enables LSE while preserving the current
> feature set.
>
> [...]
Here is the summary with links:
- [net] octeontx2: use arch_extension to enable LSE
https://git.kernel.org/netdev/net-next/c/9142c2f8f84b
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 4+ messages in thread