[PATCH net] octeontx2-af: Fix CQ enable state tracking after AQ writes

[PATCH net] octeontx2-af: Fix CQ enable state tracking after AQ writes

[Alok Tiwari]

Use the CQ context's ena field when updating the CQ enable bitmap.
The current code reads rq.ena, which overlaps bit 0 of the CQ base address
and can leave the bitmap out of sync with the hardware context. This can
cause enabled CQs to be skipped during teardown.

Use sq.ena for the SQ bitmap update as well, so each queue type reads
its own context.

Fixes: 557dd485eaeb ("octeontx2-af: Support for disabling NIX RQ/SQ/CQ contexts")
Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
---
 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 964bcaae098e..69c49adaaec2 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -1231,7 +1231,7 @@ static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu, struct nix_hw *nix_hw,
 				__clear_bit(req->qidx, pfvf->rq_bmap);
 		}
 		if (req->ctype == NIX_AQ_CTYPE_SQ) {
-			ena = (req->rq.ena & req->sq_mask.ena) |
+			ena = (req->sq.ena & req->sq_mask.ena) |
 				(test_bit(req->qidx, pfvf->sq_bmap) &
 				~req->sq_mask.ena);
 			if (ena)
@@ -1240,7 +1240,7 @@ static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu, struct nix_hw *nix_hw,
 				__clear_bit(req->qidx, pfvf->sq_bmap);
 		}
 		if (req->ctype == NIX_AQ_CTYPE_CQ) {
-			ena = (req->rq.ena & req->cq_mask.ena) |
+			ena = (req->cq.ena & req->cq_mask.ena) |
 				(test_bit(req->qidx, pfvf->cq_bmap) &
 				~req->cq_mask.ena);
 			if (ena)
-- 
2.52.0

Re: [PATCH net] octeontx2-af: Fix CQ enable state tracking after AQ writes

[netdev-bot+sinfo]

Hi!

This is an automated message. This series looks like a fix, but its
commit messages seem to be missing some information:

 - How the issue was discovered, e.g. hit in production, hit during
   development, syzbot report, manual code inspection, LLM or static
   analysis tool scan.

 - Whether the issue was actually triggered, or is only theoretical
   (e.g. found by code inspection). If it was triggered please include
   the symptoms, like the stack trace or error messages.

 - What hardware the change was tested on. For driver fixes please
   mention the device (and if relevant firmware version) used for
   testing, or say that the change was not tested on real hardware.

Please do not repost the series just to address the above. Instead,
reply to this email with the missing information, so that reviewers
can take it into account. If the series needs another revision for
other reasons, please include the information in the commit messages
then.

The evaluation is done by an LLM so it may be wrong, if you think
that is the case please reply and explain.

Re: [PATCH net] octeontx2-af: Fix CQ enable state tracking after AQ writes

[Ratheesh Kannoth]

On 2026-10-11 at 18:24:59, Alok Tiwari (alok.a.tiwari@oracle.com) wrote:
> Use the CQ context's ena field when updating the CQ enable bitmap.
> The current code reads rq.ena, which overlaps bit 0 of the CQ base address
> and can leave the bitmap out of sync with the hardware context. This can
> cause enabled CQs to be skipped during teardown.
>
> Use sq.ena for the SQ bitmap update as well, so each queue type reads
> its own context.
>
> Fixes: 557dd485eaeb ("octeontx2-af: Support for disabling NIX RQ/SQ/CQ contexts")
> Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>

Thanks.

Reviewed-by: Ratheesh Kannoth <rkannoth@marvell.com>

RE: [EXTERNAL] [PATCH net] octeontx2-af: Fix CQ enable state tracking after AQ writes

[Sunil Kovvuri Goutham]

>-----Original Message-----
>From: Alok Tiwari <alok.a.tiwari@oracle.com>
>Sent: Sunday, October 11, 2026 6:25 PM
>To: Subbaraya Sundeep Bhatta <sbhatta@marvell.com>; Geethasowjanya Akula
><gakula@marvell.com>; Sunil Kovvuri Goutham <sgoutham@marvell.com>;
>Ratheesh Kannoth <rkannoth@marvell.com>; Stanislaw Kardach [C]
><skardach@marvell.com>; andrew+netdev@lunn.ch; davem@davemloft.net;
>edumazet@google.com; kuba@kernel.org; pabeni@redhat.com;
>netdev@vger.kernel.org
>Cc: alok.a.tiwarilinux@gmail.com; alok.a.tiwari@oracle.com
>Subject: [EXTERNAL] [PATCH net] octeontx2-af: Fix CQ enable state tracking after
>AQ writes
>
>Use the CQ context's ena field when updating the CQ enable bitmap. The current
>code reads rq. ena, which overlaps bit 0 of the CQ base address and can leave the
>bitmap out of sync with the hardware context. This can cause enabled CQs to be
>skipped ZjQcmQRYFpfptBannerStart Prioritize security for external emails:
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>Use the CQ context's ena field when updating the CQ enable bitmap.
>The current code reads rq.ena, which overlaps bit 0 of the CQ base address and can
>leave the bitmap out of sync with the hardware context. This can cause enabled
>CQs to be skipped during teardown.
>
>Use sq.ena for the SQ bitmap update as well, so each queue type reads its own
>context.
>
>Fixes: 557dd485eaeb ("octeontx2-af: Support for disabling NIX RQ/SQ/CQ
>contexts")
>Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
>---
> drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
>b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
>index 964bcaae098e..69c49adaaec2 100644
>--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
>+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
>@@ -1231,7 +1231,7 @@ static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu,
>struct nix_hw *nix_hw,
> 				__clear_bit(req->qidx, pfvf->rq_bmap);
> 		}
> 		if (req->ctype == NIX_AQ_CTYPE_SQ) {
>-			ena = (req->rq.ena & req->sq_mask.ena) |
>+			ena = (req->sq.ena & req->sq_mask.ena) |
> 				(test_bit(req->qidx, pfvf->sq_bmap) &
> 				~req->sq_mask.ena);
> 			if (ena)
>@@ -1240,7 +1240,7 @@ static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu,
>struct nix_hw *nix_hw,
> 				__clear_bit(req->qidx, pfvf->sq_bmap);
> 		}
> 		if (req->ctype == NIX_AQ_CTYPE_CQ) {
>-			ena = (req->rq.ena & req->cq_mask.ena) |
>+			ena = (req->cq.ena & req->cq_mask.ena) |
> 				(test_bit(req->qidx, pfvf->cq_bmap) &
> 				~req->cq_mask.ena);
> 			if (ena)
>--
>2.52.0

Thanks for the patch.

Reviewed-by: Sunil Goutham <sgoutham@marvell.com>