Re: [PATCH net-next v2 04/11] docs: networking: Document IPQ5424 as a supported SoC

[netdev-bot+sashiko@kernel.org]

Thank you for your contribution! Sashiko AI review found more severe
issue(s) in other patches of this series. This mail is only an FYI, in case
you want to address the nit picks below when you respin.

Low priority / nit picks for your consideration:

- [Low] This finding is not valid; I'm keeping it here only because it is
  marked requires_validation=true.

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docs: networking: Document IPQ5424 as a supported SoC

This commit adds IPQ5424 to the list of supported SoCs in the Qualcomm PPE
driver documentation. It also describes how the two SoCs differ: IPQ9574
runs at 353 MHz with 6 front panel ports plus the EDMA and EIP FIFOs, and
IPQ5424 runs at 375 MHz with 3 front panel ports and only the EDMA FIFO.

> diff --git a/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst b/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst
> index 4ab299a28969..04c48cec66d5 100644
> --- a/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst
> +++ b/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst
> @@ -167,6 +167,14 @@ PPE Driver Supported SoCs
>  The PPE driver supports the following IPQ SoC:
>  
>  - IPQ9574
> +    The PPE runs at a clock rate of 353 MHz. The switch core has 6 front panel
> +    ports (port1 to port6) and two FIFO interfaces: the EDMA FIFO (port0) for
> +    the host CPU communication and the EIP FIFO (port7) for the EIP engine.
> +- IPQ5424
> +    The PPE reuses the same switch core as IPQ9574 and runs at a clock rate of
> +    375 MHz. It supports 3 front panel ports (port1 to port3) with MAC0 to MAC2,

[Severity: Low]
This isn't a bug, but this patch documents IPQ5424 one patch before the
driver supports it.

At this commit, qcom_ppe_of_match in drivers/net/ethernet/qualcomm/ppe/ppe.c
only matches "qcom,ipq9574-ppe". The clock rate and port count are still the
fixed IPQ9574 values (353 MHz, 8 ports), and ppe_icc_data covers only
IPQ9574.

The next patch, "net: ethernet: qualcomm: ppe: Add platform support for
IPQ5424", adds the missing pieces:

    #define IPQ5424_PPE_CLK_RATE	375000000
    ...
    .ppe_rate = IPQ5424_PPE_CLK_RATE,
    .num_ports = IPQ5424_PPE_PORT_MAX,
    .icc_paths = ipq5424_ppe_icc_data,
    ...
    { .compatible = "qcom,ipq5424-ppe", .data = &ipq5424_data },

By the end of the series, the driver matches this documentation. There is
no effect on build or runtime.

Would it make sense to move this docs patch after the platform support
patch, so the supported SoC list is accurate at every commit?

> +    and only the EDMA FIFO interface (port0) for the host CPU communication. The
> +    EIP FIFO and port4 to port6 are not available.

[ ... ]

-- 
Sashiko AI review · https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20261011-qcom_ipq5424_ppe-v2-0-8c7b057e2c43%40oss.qualcomm.com