From: "Rob Herring (Arm)" <robh@kernel.org>
To: Ali Rouhi <arouhi@sitime.com>
Cc: vadim.fedorenko@linux.dev, ivecera@redhat.com, jiri@resnulli.us,
arkadiusz.kubalewski@intel.com, pabeni@redhat.com,
conor+dt@kernel.org, kuba@kernel.org,
prabhakar.mahadev-lad.rj@bp.renesas.com,
Oleg.Zadorozhnyi@devoxsoftware.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, krzk+dt@kernel.org,
cjubran@nvidia.com, devicetree@vger.kernel.org
Subject: Re: [PATCH net-next v14 02/12] dt-bindings: dpll: add SiTime SiT95316 clock generator
Date: Fri, 16 Oct 2026 08:53:18 -0500 [thread overview]
Message-ID: <179215879728.1780041.16503599921080906388.robh@kernel.org> (raw)
In-Reply-To: <20261016005823.13690-3-arouhi@sitime.com>
On Fri, 16 Oct 2026 00:58:25 +0000, Ali Rouhi wrote:
> Add a binding for the SiTime SiT9531x family of clock generators: an
> I2C-controlled device with four independent PLLs, up to eight input
> clocks and up to twelve outputs, described as a DPLL provider.
>
> The XO is given either as a clock or, for firmware that describes the
> oscillator as a property rather than as a clock provider, such as ACPI,
> as clock-frequency.
>
> The supplies are described by their pin names: the core and input rails,
> the GPIO rail the SiT95317 has, and one per output-driver pin -- VDDO0 to
> VDDO7 on the SiT95317, VDDO0_1, VDDO2 to VDDO9 and VDDO10_11 on the
> SiT95316. The driver does not enable them, since the boards so far
> power the part permanently; describing them gives a board with
> switchable rails a way to say so.
>
> Signed-off-by: Ali Rouhi <arouhi@sitime.com>
> ---
> .../bindings/dpll/sitime,sit95316.yaml | 214 ++++++++++++++++++
> MAINTAINERS | 6 +
> 2 files changed, 220 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dpll/sitime,sit95316.yaml
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2026-10-16 13:53 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 0:58 [PATCH net-next v14 00/12] dpll: add SiTime SiT9531x DPLL clock driver Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 01/12] dt-bindings: vendor-prefixes: add SiTime Corporation Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 03/12] dpll: add basic SiTime SiT9531x support Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 02/12] dt-bindings: dpll: add SiTime SiT95316 clock generator Ali Rouhi
2026-10-16 13:53 ` Rob Herring (Arm) [this message]
2026-10-16 0:58 ` [PATCH net-next v14 04/12] dpll: sit9531x: read DPLL types and pin properties from system firmware Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 05/12] dpll: sit9531x: register DPLL devices and pins Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 06/12] dpll: sit9531x: implement input pin state on a DPLL Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 07/12] dpll: sit9531x: add support to get and set priority on input pins Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 08/12] dpll: sit9531x: add support to get and set frequency on pins Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 09/12] dpll: sit9531x: implement output pin state on a DPLL Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 10/12] dpll: sit9531x: add support to adjust output phase Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 11/12] dpll: sit9531x: add support to get phase offset on the connected input pin Ali Rouhi
2026-10-16 0:58 ` [PATCH net-next v14 12/12] dpll: sit9531x: model the inter-PLL sync net as a pair of pins Ali Rouhi
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