From: Stephen Hemminger <shemminger@osdl.org>
To: "Felix Marti" <felix@chelsio.com>
Cc: <netdev@vger.kernel.org>
Subject: Re: [PATCH] chelsio 10G (T1/T2)
Date: Tue, 5 Dec 2006 11:58:30 -0800 [thread overview]
Message-ID: <20061205115830.2d55a54e@freekitty> (raw)
In-Reply-To: <8A71B368A89016469F72CD08050AD334DA55F1@maui.asicdesigners.com>
On Tue, 5 Dec 2006 10:53:10 -0800
"Felix Marti" <felix@chelsio.com> wrote:
> T1's and T2's implementation of MSI has a bug. I believe to remember
> that it
>
> works with some chipsets but we should disable MSI by default.
Is this really the platform bug, if so it should be handled by the pci quirks
already. Or is this a Chelsio hardware bug?
next parent reply other threads:[~2006-12-05 19:59 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <8A71B368A89016469F72CD08050AD334DA55F1@maui.asicdesigners.com>
2006-12-05 19:58 ` Stephen Hemminger [this message]
2006-12-05 20:01 [PATCH] chelsio 10G (T1/T2) Felix Marti
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