* [PATCH net-next 2/8] net/wan/fsl_ucc_hdlc: fix unitialized variable warnings
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
@ 2017-05-17 15:24 ` Holger Brunck
2017-05-18 14:29 ` David Miller
2017-05-17 15:24 ` [PATCH net-next 3/8] net/wan/fsl_ucc_hdlc: fix wrong indentation Holger Brunck
` (6 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Holger Brunck @ 2017-05-17 15:24 UTC (permalink / raw)
To: netdev; +Cc: Holger Brunck, Zhao Qiang
This fixes the following compiler warnings:
drivers/net/wan/fsl_ucc_hdlc.c: In function 'ucc_hdlc_poll':
warning: 'skb' may be used uninitialized in this function
[-Wmaybe-uninitialized]
skb->mac_header = skb->data - skb->head;
and
drivers/net/wan/fsl_ucc_hdlc.c: In function 'ucc_hdlc_probe':
drivers/net/wan/fsl_ucc_hdlc.c:1127:3: warning: 'utdm' may be used
uninitialized in this function [-Wmaybe-uninitialized]
kfree(utdm);
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/net/wan/fsl_ucc_hdlc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 0ae10a58ffca..6ef6d719545d 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -440,7 +440,7 @@ static int hdlc_tx_done(struct ucc_hdlc_private *priv)
static int hdlc_rx_done(struct ucc_hdlc_private *priv, int rx_work_limit)
{
struct net_device *dev = priv->ndev;
- struct sk_buff *skb;
+ struct sk_buff *skb = NULL;
hdlc_device *hdlc = dev_to_hdlc(dev);
struct qe_bd *bd;
u16 bd_status;
@@ -968,7 +968,7 @@ static int ucc_hdlc_probe(struct platform_device *pdev)
struct device_node *np = pdev->dev.of_node;
struct ucc_hdlc_private *uhdlc_priv = NULL;
struct ucc_tdm_info *ut_info;
- struct ucc_tdm *utdm;
+ struct ucc_tdm *utdm = NULL;
struct resource res;
struct net_device *dev;
hdlc_device *hdlc;
--
2.12.0.rc1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH net-next 2/8] net/wan/fsl_ucc_hdlc: fix unitialized variable warnings
2017-05-17 15:24 ` [PATCH net-next 2/8] net/wan/fsl_ucc_hdlc: fix unitialized variable warnings Holger Brunck
@ 2017-05-18 14:29 ` David Miller
0 siblings, 0 replies; 16+ messages in thread
From: David Miller @ 2017-05-18 14:29 UTC (permalink / raw)
To: holger.brunck; +Cc: netdev, qiang.zhao
From: Holger Brunck <holger.brunck@keymile.com>
Date: Wed, 17 May 2017 17:24:33 +0200
> This fixes the following compiler warnings:
> drivers/net/wan/fsl_ucc_hdlc.c: In function 'ucc_hdlc_poll':
> warning: 'skb' may be used uninitialized in this function
> [-Wmaybe-uninitialized]
> skb->mac_header = skb->data - skb->head;
>
> and
>
> drivers/net/wan/fsl_ucc_hdlc.c: In function 'ucc_hdlc_probe':
> drivers/net/wan/fsl_ucc_hdlc.c:1127:3: warning: 'utdm' may be used
> uninitialized in this function [-Wmaybe-uninitialized]
> kfree(utdm);
>
> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Applied.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH net-next 3/8] net/wan/fsl_ucc_hdlc: fix wrong indentation
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
2017-05-17 15:24 ` [PATCH net-next 2/8] net/wan/fsl_ucc_hdlc: fix unitialized variable warnings Holger Brunck
@ 2017-05-17 15:24 ` Holger Brunck
2017-05-18 14:29 ` David Miller
2017-05-17 15:24 ` [PATCH net-next 4/8] net/wan/fsl_ucc_hdlc: fix incorrect memory allocation Holger Brunck
` (5 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Holger Brunck @ 2017-05-17 15:24 UTC (permalink / raw)
To: netdev; +Cc: Holger Brunck, Zhao Qiang
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 6ef6d719545d..1a60897767d9 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -535,7 +535,7 @@ static int ucc_hdlc_poll(struct napi_struct *napi, int budget)
/* Tx event processing */
spin_lock(&priv->lock);
- hdlc_tx_done(priv);
+ hdlc_tx_done(priv);
spin_unlock(&priv->lock);
howmany = 0;
--
2.12.0.rc1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH net-next 4/8] net/wan/fsl_ucc_hdlc: fix incorrect memory allocation
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
2017-05-17 15:24 ` [PATCH net-next 2/8] net/wan/fsl_ucc_hdlc: fix unitialized variable warnings Holger Brunck
2017-05-17 15:24 ` [PATCH net-next 3/8] net/wan/fsl_ucc_hdlc: fix wrong indentation Holger Brunck
@ 2017-05-17 15:24 ` Holger Brunck
2017-05-18 14:29 ` David Miller
2017-05-17 15:24 ` [PATCH net-next 5/8] net/wan/fsl_ucc_hdlc: call qe_setbrg only for loopback mode Holger Brunck
` (4 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Holger Brunck @ 2017-05-17 15:24 UTC (permalink / raw)
To: netdev; +Cc: Holger Brunck, Zhao Qiang
We need space for the struct qe_bd and not for a pointer to this struct.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/net/wan/fsl_ucc_hdlc.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 1a60897767d9..49b91b2c113c 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -136,7 +136,7 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)
priv->tx_ring_size = TX_BD_RING_LEN;
/* Alloc Rx BD */
priv->rx_bd_base = dma_alloc_coherent(priv->dev,
- RX_BD_RING_LEN * sizeof(struct qe_bd *),
+ RX_BD_RING_LEN * sizeof(struct qe_bd),
&priv->dma_rx_bd, GFP_KERNEL);
if (!priv->rx_bd_base) {
@@ -147,7 +147,7 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)
/* Alloc Tx BD */
priv->tx_bd_base = dma_alloc_coherent(priv->dev,
- TX_BD_RING_LEN * sizeof(struct qe_bd *),
+ TX_BD_RING_LEN * sizeof(struct qe_bd),
&priv->dma_tx_bd, GFP_KERNEL);
if (!priv->tx_bd_base) {
@@ -294,11 +294,11 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)
qe_muram_free(priv->ucc_pram_offset);
free_tx_bd:
dma_free_coherent(priv->dev,
- TX_BD_RING_LEN * sizeof(struct qe_bd *),
+ TX_BD_RING_LEN * sizeof(struct qe_bd),
priv->tx_bd_base, priv->dma_tx_bd);
free_rx_bd:
dma_free_coherent(priv->dev,
- RX_BD_RING_LEN * sizeof(struct qe_bd *),
+ RX_BD_RING_LEN * sizeof(struct qe_bd),
priv->rx_bd_base, priv->dma_rx_bd);
free_uccf:
ucc_fast_free(priv->uccf);
@@ -656,7 +656,7 @@ static void uhdlc_memclean(struct ucc_hdlc_private *priv)
if (priv->rx_bd_base) {
dma_free_coherent(priv->dev,
- RX_BD_RING_LEN * sizeof(struct qe_bd *),
+ RX_BD_RING_LEN * sizeof(struct qe_bd),
priv->rx_bd_base, priv->dma_rx_bd);
priv->rx_bd_base = NULL;
@@ -665,7 +665,7 @@ static void uhdlc_memclean(struct ucc_hdlc_private *priv)
if (priv->tx_bd_base) {
dma_free_coherent(priv->dev,
- TX_BD_RING_LEN * sizeof(struct qe_bd *),
+ TX_BD_RING_LEN * sizeof(struct qe_bd),
priv->tx_bd_base, priv->dma_tx_bd);
priv->tx_bd_base = NULL;
--
2.12.0.rc1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH net-next 5/8] net/wan/fsl_ucc_hdlc: call qe_setbrg only for loopback mode
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
` (2 preceding siblings ...)
2017-05-17 15:24 ` [PATCH net-next 4/8] net/wan/fsl_ucc_hdlc: fix incorrect memory allocation Holger Brunck
@ 2017-05-17 15:24 ` Holger Brunck
2017-05-18 14:29 ` David Miller
2017-05-17 15:24 ` [PATCH net-next 6/8] fsl/qe: add bit description for SYNL register for GUMR Holger Brunck
` (3 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Holger Brunck @ 2017-05-17 15:24 UTC (permalink / raw)
To: netdev; +Cc: Holger Brunck, Zhao Qiang
We can't assume that we are always in loopback mode if rx and tx clock
have the same clock source. If we want to use HDLC busmode we also have
the same clock source but we are not in loopback mode. So move the
setting of the baudrate generator after the check for property for the
loopback mode.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/net/wan/fsl_ucc_hdlc.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 49b91b2c113c..4c93d561b18a 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -113,6 +113,9 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)
/* Loopback mode */
if (priv->loopback) {
dev_info(priv->dev, "Loopback Mode\n");
+ /* use the same clock when work in loopback */
+ qe_setbrg(ut_info->uf_info.rx_clock, 20000000, 1);
+
gumr = ioread32be(&priv->uf_regs->gumr);
gumr |= (UCC_FAST_GUMR_LOOPBACK | UCC_FAST_GUMR_CDS |
UCC_FAST_GUMR_TCI);
@@ -1021,10 +1024,6 @@ static int ucc_hdlc_probe(struct platform_device *pdev)
return -EINVAL;
}
- /* use the same clock when work in loopback */
- if (ut_info->uf_info.rx_clock == ut_info->uf_info.tx_clock)
- qe_setbrg(ut_info->uf_info.rx_clock, 20000000, 1);
-
ret = of_address_to_resource(np, 0, &res);
if (ret)
return -EINVAL;
--
2.12.0.rc1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH net-next 6/8] fsl/qe: add bit description for SYNL register for GUMR
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
` (3 preceding siblings ...)
2017-05-17 15:24 ` [PATCH net-next 5/8] net/wan/fsl_ucc_hdlc: call qe_setbrg only for loopback mode Holger Brunck
@ 2017-05-17 15:24 ` Holger Brunck
2017-05-18 14:29 ` David Miller
2017-05-17 15:24 ` [PATCH net-next 7/8] net/wan/fsl_ucc_hdlc: add hdlc-bus support Holger Brunck
` (2 subsequent siblings)
7 siblings, 1 reply; 16+ messages in thread
From: Holger Brunck @ 2017-05-17 15:24 UTC (permalink / raw)
To: netdev; +Cc: Holger Brunck, Zhao Qiang
Add the bitmask for the two bit SYNL register according to the QUICK
Engine Reference Manual.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
---
include/soc/fsl/qe/qe.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h
index 0cd4c11479b1..226f915a68c2 100644
--- a/include/soc/fsl/qe/qe.h
+++ b/include/soc/fsl/qe/qe.h
@@ -668,6 +668,10 @@ struct ucc_slow_pram {
#define UCC_FAST_GUMR_CTSS 0x00800000
#define UCC_FAST_GUMR_TXSY 0x00020000
#define UCC_FAST_GUMR_RSYN 0x00010000
+#define UCC_FAST_GUMR_SYNL_MASK 0x0000C000
+#define UCC_FAST_GUMR_SYNL_16 0x0000C000
+#define UCC_FAST_GUMR_SYNL_8 0x00008000
+#define UCC_FAST_GUMR_SYNL_AUTO 0x00004000
#define UCC_FAST_GUMR_RTSM 0x00002000
#define UCC_FAST_GUMR_REVD 0x00000400
#define UCC_FAST_GUMR_ENR 0x00000020
--
2.12.0.rc1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH net-next 7/8] net/wan/fsl_ucc_hdlc: add hdlc-bus support
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
` (4 preceding siblings ...)
2017-05-17 15:24 ` [PATCH net-next 6/8] fsl/qe: add bit description for SYNL register for GUMR Holger Brunck
@ 2017-05-17 15:24 ` Holger Brunck
2017-05-18 14:29 ` David Miller
2017-05-17 15:24 ` [PATCH net-next 8/8] powerpc/85xx/kmcent2: use hdlc busmode for UCC1 Holger Brunck
2017-05-18 14:29 ` [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces David Miller
7 siblings, 1 reply; 16+ messages in thread
From: Holger Brunck @ 2017-05-17 15:24 UTC (permalink / raw)
To: netdev; +Cc: Holger Brunck, Zhao Qiang
This adds support for hdlc-bus mode to the fsl_ucc_hdlc driver. This can
be enabled with the "fsl,hdlc-bus" property in the DTS node of the
corresponding ucc.
This aligns the configuration of the UPSMR and GUMR registers to what is
done in our ucc_hdlc driver (that only support hdlc-bus mode) and with
the QuickEngine's documentation for hdlc-bus mode.
GUMR/SYNL is set to AUTO for the busmode as in this case the CD signal
is ignored. The brkpt_support is enabled to set the HBM1 bit in the
CMXUCR register to configure an open-drain connected HDLC bus.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
---
drivers/net/wan/fsl_ucc_hdlc.c | 32 ++++++++++++++++++++++++++++++++
drivers/net/wan/fsl_ucc_hdlc.h | 1 +
include/soc/fsl/qe/qe.h | 5 +++++
3 files changed, 38 insertions(+)
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 4c93d561b18a..e9b2d687f150 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -98,6 +98,13 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)
uf_info->tsa = 1;
uf_info->ctsp = 1;
}
+
+ /* This sets HPM register in CMXUCR register which configures a
+ * open drain connected HDLC bus
+ */
+ if (priv->hdlc_bus)
+ uf_info->brkpt_support = 1;
+
uf_info->uccm_mask = ((UCC_HDLC_UCCE_RXB | UCC_HDLC_UCCE_RXF |
UCC_HDLC_UCCE_TXB) << 16);
@@ -135,6 +142,28 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)
/* Set UPSMR normal mode (need fixed)*/
iowrite32be(0, &priv->uf_regs->upsmr);
+ /* hdlc_bus mode */
+ if (priv->hdlc_bus) {
+ u32 upsmr;
+
+ dev_info(priv->dev, "HDLC bus Mode\n");
+ upsmr = ioread32be(&priv->uf_regs->upsmr);
+
+ /* bus mode and retransmit enable, with collision window
+ * set to 8 bytes
+ */
+ upsmr |= UCC_HDLC_UPSMR_RTE | UCC_HDLC_UPSMR_BUS |
+ UCC_HDLC_UPSMR_CW8;
+ iowrite32be(upsmr, &priv->uf_regs->upsmr);
+
+ /* explicitly disable CDS & CTSP */
+ gumr = ioread32be(&priv->uf_regs->gumr);
+ gumr &= ~(UCC_FAST_GUMR_CDS | UCC_FAST_GUMR_CTSP);
+ /* set automatic sync to explicitly ignore CD signal */
+ gumr |= UCC_FAST_GUMR_SYNL_AUTO;
+ iowrite32be(gumr, &priv->uf_regs->gumr);
+ }
+
priv->rx_ring_size = RX_BD_RING_LEN;
priv->tx_ring_size = TX_BD_RING_LEN;
/* Alloc Rx BD */
@@ -1046,6 +1075,9 @@ static int ucc_hdlc_probe(struct platform_device *pdev)
if (of_get_property(np, "fsl,ucc-internal-loopback", NULL))
uhdlc_priv->loopback = 1;
+ if (of_get_property(np, "fsl,hdlc-bus", NULL))
+ uhdlc_priv->hdlc_bus = 1;
+
if (uhdlc_priv->tsa == 1) {
utdm = kzalloc(sizeof(*utdm), GFP_KERNEL);
if (!utdm) {
diff --git a/drivers/net/wan/fsl_ucc_hdlc.h b/drivers/net/wan/fsl_ucc_hdlc.h
index 881ecdeef076..c21134c1f180 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.h
+++ b/drivers/net/wan/fsl_ucc_hdlc.h
@@ -78,6 +78,7 @@ struct ucc_hdlc_private {
u16 tsa;
bool hdlc_busy;
bool loopback;
+ bool hdlc_bus;
u8 *tx_buffer;
u8 *rx_buffer;
diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h
index 226f915a68c2..b3d1aff5e8ad 100644
--- a/include/soc/fsl/qe/qe.h
+++ b/include/soc/fsl/qe/qe.h
@@ -789,6 +789,11 @@ struct ucc_slow_pram {
#define UCC_GETH_UPSMR_SMM 0x00000080
#define UCC_GETH_UPSMR_SGMM 0x00000020
+/* UCC Protocol Specific Mode Register (UPSMR), when used for HDLC */
+#define UCC_HDLC_UPSMR_RTE 0x02000000
+#define UCC_HDLC_UPSMR_BUS 0x00200000
+#define UCC_HDLC_UPSMR_CW8 0x00007000
+
/* UCC Transmit On Demand Register (UTODR) */
#define UCC_SLOW_TOD 0x8000
#define UCC_FAST_TOD 0x8000
--
2.12.0.rc1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH net-next 7/8] net/wan/fsl_ucc_hdlc: add hdlc-bus support
2017-05-17 15:24 ` [PATCH net-next 7/8] net/wan/fsl_ucc_hdlc: add hdlc-bus support Holger Brunck
@ 2017-05-18 14:29 ` David Miller
0 siblings, 0 replies; 16+ messages in thread
From: David Miller @ 2017-05-18 14:29 UTC (permalink / raw)
To: holger.brunck; +Cc: netdev, qiang.zhao
From: Holger Brunck <holger.brunck@keymile.com>
Date: Wed, 17 May 2017 17:24:38 +0200
> This adds support for hdlc-bus mode to the fsl_ucc_hdlc driver. This can
> be enabled with the "fsl,hdlc-bus" property in the DTS node of the
> corresponding ucc.
>
> This aligns the configuration of the UPSMR and GUMR registers to what is
> done in our ucc_hdlc driver (that only support hdlc-bus mode) and with
> the QuickEngine's documentation for hdlc-bus mode.
>
> GUMR/SYNL is set to AUTO for the busmode as in this case the CD signal
> is ignored. The brkpt_support is enabled to set the HBM1 bit in the
> CMXUCR register to configure an open-drain connected HDLC bus.
>
> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Applied.
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH net-next 8/8] powerpc/85xx/kmcent2: use hdlc busmode for UCC1
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
` (5 preceding siblings ...)
2017-05-17 15:24 ` [PATCH net-next 7/8] net/wan/fsl_ucc_hdlc: add hdlc-bus support Holger Brunck
@ 2017-05-17 15:24 ` Holger Brunck
2017-05-18 14:29 ` David Miller
2017-05-18 14:29 ` [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces David Miller
7 siblings, 1 reply; 16+ messages in thread
From: Holger Brunck @ 2017-05-17 15:24 UTC (permalink / raw)
To: netdev; +Cc: Holger Brunck
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
---
arch/powerpc/boot/dts/fsl/kmcent2.dts | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts b/arch/powerpc/boot/dts/fsl/kmcent2.dts
index 47afa438602e..5922c1ea0e96 100644
--- a/arch/powerpc/boot/dts/fsl/kmcent2.dts
+++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts
@@ -293,9 +293,7 @@
compatible = "fsl,ucc-hdlc";
rx-clock-name = "clk9";
tx-clock-name = "clk9";
- fsl,tx-timeslot-mask = <0xfffffffe>;
- fsl,rx-timeslot-mask = <0xfffffffe>;
- fsl,siram-entry-id = <0>;
+ fsl,hdlc-bus;
};
};
};
--
2.12.0.rc1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces
2017-05-17 15:24 [PATCH net-next 1/8] net/wan/fsl_ucc_hdlc: cleanup debug traces Holger Brunck
` (6 preceding siblings ...)
2017-05-17 15:24 ` [PATCH net-next 8/8] powerpc/85xx/kmcent2: use hdlc busmode for UCC1 Holger Brunck
@ 2017-05-18 14:29 ` David Miller
7 siblings, 0 replies; 16+ messages in thread
From: David Miller @ 2017-05-18 14:29 UTC (permalink / raw)
To: holger.brunck; +Cc: netdev, qiang.zhao
From: Holger Brunck <holger.brunck@keymile.com>
Date: Wed, 17 May 2017 17:24:32 +0200
> Some of the tracing seems to be remaining traces for basic driver
> development. They can be removed now, as they cause noisy printouts.
>
> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
> Cc: Zhao Qiang <qiang.zhao@nxp.com>
Applied.
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