From: David Miller <davem@davemloft.net>
To: fahad.kunnathadi@dexceldesigns.com
Cc: f.fainelli@gmail.com, michal.simek@xilinx.com, andrew@lunn.ch,
appanad@xilinx.com, soren.brinkmann@xilinx.com,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register
Date: Mon, 18 Sep 2017 16:34:08 -0700 (PDT) [thread overview]
Message-ID: <20170918.163408.207952584990169576.davem@davemloft.net> (raw)
In-Reply-To: <1505457118-3933-1-git-send-email-fahad.kunnathadi@dexceldesigns.com>
From: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Date: Fri, 15 Sep 2017 12:01:58 +0530
> To clear Speed Selection in MDIO control register(0x10),
> ie, clear bits 6 and 13 to zero while keeping other bits same.
> Before AND operation,The Mask value has to be perform with bitwise NOT
> operation (ie, ~ operator)
>
> This patch clears current speed selection before writing the
> new speed settings to gmii2rgmii converter
>
> Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
>
> Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Applied and queued up for -stable, thanks.
prev parent reply other threads:[~2017-09-18 23:34 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-15 6:31 [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register Fahad Kunnathadi
2017-09-18 23:34 ` David Miller [this message]
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