* [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register
@ 2017-09-15 6:31 Fahad Kunnathadi
2017-09-18 23:34 ` David Miller
0 siblings, 1 reply; 2+ messages in thread
From: Fahad Kunnathadi @ 2017-09-15 6:31 UTC (permalink / raw)
To: f.fainelli
Cc: michal.simek, davem, andrew, appanad, soren.brinkmann, netdev,
linux-kernel, Fahad Kunnathadi
To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)
This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter
Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/phy/xilinx_gmii2rgmii.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c
index d15dd39..2e5150b 100644
--- a/drivers/net/phy/xilinx_gmii2rgmii.c
+++ b/drivers/net/phy/xilinx_gmii2rgmii.c
@@ -44,7 +44,7 @@ static int xgmiitorgmii_read_status(struct phy_device *phydev)
priv->phy_drv->read_status(phydev);
val = mdiobus_read(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG);
- val &= XILINX_GMII2RGMII_SPEED_MASK;
+ val &= ~XILINX_GMII2RGMII_SPEED_MASK;
if (phydev->speed == SPEED_1000)
val |= BMCR_SPEED1000;
--
1.9.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register
2017-09-15 6:31 [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register Fahad Kunnathadi
@ 2017-09-18 23:34 ` David Miller
0 siblings, 0 replies; 2+ messages in thread
From: David Miller @ 2017-09-18 23:34 UTC (permalink / raw)
To: fahad.kunnathadi
Cc: f.fainelli, michal.simek, andrew, appanad, soren.brinkmann,
netdev, linux-kernel
From: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Date: Fri, 15 Sep 2017 12:01:58 +0530
> To clear Speed Selection in MDIO control register(0x10),
> ie, clear bits 6 and 13 to zero while keeping other bits same.
> Before AND operation,The Mask value has to be perform with bitwise NOT
> operation (ie, ~ operator)
>
> This patch clears current speed selection before writing the
> new speed settings to gmii2rgmii converter
>
> Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
>
> Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Applied and queued up for -stable, thanks.
^ permalink raw reply [flat|nested] 2+ messages in thread
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2017-09-15 6:31 [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register Fahad Kunnathadi
2017-09-18 23:34 ` David Miller
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