From: Quentin Schulz <quentin.schulz@bootlin.com>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: andrew@lunn.ch, davem@davemloft.net, netdev@vger.kernel.org,
alexandre.belloni@bootlin.com, linux-kernel@vger.kernel.org,
thomas.petazzoni@bootlin.com
Subject: Re: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
Date: Tue, 31 Jul 2018 08:43:33 +0200 [thread overview]
Message-ID: <20180731064333.fkkbgnat3gdn3fhs@qschulz> (raw)
In-Reply-To: <4dd7d451-a1e3-cab8-dc5a-6666c5d29089@gmail.com>
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Hi Florian,
On Mon, Jul 30, 2018 at 09:53:31AM -0700, Florian Fainelli wrote:
> On 07/30/2018 05:53 AM, Quentin Schulz wrote:
> > The Extended Page Access is a 16-bit register, so change the page
> > parameter of vsc85xx_phy_page_set to a u16.
> >
> > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
>
> Since you targeted net-next for this patch, I am assuming this is not
> yet a problem, but would soon be one with the changes you plan on
> introducing?
>
Yes indeed. When I get the quad-port PHY things to go as planned, then
I'll need sometimes to change to a page that is above the size of a u16.
For now, all the pages are accessed with a number that is lower than the
size of a u16, so it isn't a problem.
Quentin
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prev parent reply other threads:[~2018-07-31 6:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-30 12:53 [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits Quentin Schulz
2018-07-30 14:01 ` Andrew Lunn
2018-07-30 14:13 ` Alexandre Belloni
2018-07-30 16:43 ` David Miller
2018-07-30 16:53 ` Florian Fainelli
2018-07-31 6:43 ` Quentin Schulz [this message]
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