From: Vladimir Oltean <olteanv@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
"Vivien Didelot" <vivien.didelot@gmail.com>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"David S . Miller" <davem@davemloft.net>,
"Jakub Kicinski" <kuba@kernel.org>,
netdev@vger.kernel.org, "Alvin Šipraga" <alsi@bang-olufsen.dk>,
"Mauri Sandberg" <sandberg@mailfence.com>,
"DENG Qingfang" <dqfext@gmail.com>
Subject: Re: [PATCH net-next 3/5 v2] net: dsa: rtl8366rb: Support disabling learning
Date: Tue, 31 Aug 2021 01:40:19 +0300 [thread overview]
Message-ID: <20210830224019.d7lzral6zejdfl5t@skbuf> (raw)
In-Reply-To: <20210830214859.403100-4-linus.walleij@linaro.org>
On Mon, Aug 30, 2021 at 11:48:57PM +0200, Linus Walleij wrote:
> The RTL8366RB hardware supports disabling learning per-port
> so let's make use of this feature. Rename some unfortunately
> named registers in the process.
>
> Suggested-by: Vladimir Oltean <olteanv@gmail.com>
> Cc: Alvin Šipraga <alsi@bang-olufsen.dk>
> Cc: Mauri Sandberg <sandberg@mailfence.com>
> Cc: DENG Qingfang <dqfext@gmail.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - New patch suggested by Vladimir.
> ---
> drivers/net/dsa/rtl8366rb.c | 47 +++++++++++++++++++++++++++++++++----
> 1 file changed, 42 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c
> index 8b040440d2d4..2cadd3e57e8b 100644
> --- a/drivers/net/dsa/rtl8366rb.c
> +++ b/drivers/net/dsa/rtl8366rb.c
> @@ -14,6 +14,7 @@
>
> #include <linux/bitops.h>
> #include <linux/etherdevice.h>
> +#include <linux/if_bridge.h>
> #include <linux/interrupt.h>
> #include <linux/irqdomain.h>
> #include <linux/irqchip/chained_irq.h>
> @@ -42,9 +43,12 @@
> /* Port Enable Control register */
> #define RTL8366RB_PECR 0x0001
>
> -/* Switch Security Control registers */
> -#define RTL8366RB_SSCR0 0x0002
> -#define RTL8366RB_SSCR1 0x0003
> +/* Switch per-port learning disablement register */
> +#define RTL8366RB_PORT_LEARNDIS_CTRL 0x0002
> +
> +/* Security control, actually aging register */
> +#define RTL8366RB_SECURITY_CTRL 0x0003
> +
> #define RTL8366RB_SSCR2 0x0004
> #define RTL8366RB_SSCR2_DROP_UNKNOWN_DA BIT(0)
>
> @@ -912,12 +916,12 @@ static int rtl8366rb_setup(struct dsa_switch *ds)
> rb->max_mtu[i] = 1532;
>
> /* Enable learning for all ports */
> - ret = regmap_write(smi->map, RTL8366RB_SSCR0, 0);
> + ret = regmap_write(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL, 0);
So the expected behavior for standalone ports would be to _disable_
learning. In rtl8366rb_setup, they are standalone.
> if (ret)
> return ret;
>
> /* Enable auto ageing for all ports */
> - ret = regmap_write(smi->map, RTL8366RB_SSCR1, 0);
> + ret = regmap_write(smi->map, RTL8366RB_SECURITY_CTRL, 0);
> if (ret)
> return ret;
>
> @@ -1148,6 +1152,37 @@ rtl8366rb_port_disable(struct dsa_switch *ds, int port)
> rb8366rb_set_port_led(smi, port, false);
> }
>
> +static int
> +rtl8366rb_port_pre_bridge_flags(struct dsa_switch *ds, int port,
> + struct switchdev_brport_flags flags,
> + struct netlink_ext_ack *extack)
> +{
> + /* We support enabling/disabling learning */
> + if (flags.mask & ~(BR_LEARNING))
> + return -EINVAL;
> +
> + return 0;
> +}
> +
> +static int
> +rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port,
> + struct switchdev_brport_flags flags,
> + struct netlink_ext_ack *extack)
> +{
> + struct realtek_smi *smi = ds->priv;
> + int ret;
> +
> + if (flags.mask & BR_LEARNING) {
> + ret = regmap_update_bits(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL,
> + BIT(port),
> + (flags.val & BR_LEARNING) ? 0 : BIT(port));
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int
> rtl8366rb_port_bridge_join(struct dsa_switch *ds, int port,
> struct net_device *bridge)
> @@ -1600,6 +1635,8 @@ static const struct dsa_switch_ops rtl8366rb_switch_ops = {
> .port_vlan_del = rtl8366_vlan_del,
> .port_enable = rtl8366rb_port_enable,
> .port_disable = rtl8366rb_port_disable,
> + .port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags,
> + .port_bridge_flags = rtl8366rb_port_bridge_flags,
> .port_change_mtu = rtl8366rb_change_mtu,
> .port_max_mtu = rtl8366rb_max_mtu,
> };
> --
> 2.31.1
>
next prev parent reply other threads:[~2021-08-30 22:40 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-30 21:48 [PATCH net-next 0/5 v2] RTL8366RB improvements Linus Walleij
2021-08-30 21:48 ` [PATCH net-next 1/5 v2] net: dsa: rtl8366rb: support bridge offloading Linus Walleij
2021-08-30 22:33 ` Vladimir Oltean
2021-08-30 23:24 ` Alvin Šipraga
2021-08-31 1:01 ` Florian Fainelli
2021-08-30 21:48 ` [PATCH net-next 2/5 v2] net: dsa: rtl8366: Drop custom VLAN set-up Linus Walleij
2021-08-30 22:35 ` Vladimir Oltean
2021-08-30 23:27 ` Alvin Šipraga
2021-08-31 1:02 ` Florian Fainelli
2021-08-30 21:48 ` [PATCH net-next 3/5 v2] net: dsa: rtl8366rb: Support disabling learning Linus Walleij
2021-08-30 22:40 ` Vladimir Oltean [this message]
2021-09-07 15:52 ` Linus Walleij
2021-09-08 21:09 ` Vladimir Oltean
2021-08-30 21:48 ` [PATCH net-next 4/5 v2] net: dsa: rtl8366rb: Support flood control Linus Walleij
2021-08-30 22:43 ` Vladimir Oltean
2021-08-30 23:42 ` Alvin Šipraga
2021-08-30 23:35 ` Alvin Šipraga
2021-08-31 1:04 ` Florian Fainelli
2021-08-30 21:48 ` [PATCH net-next 5/5 v2] net: dsa: rtl8366rb: Support fast aging Linus Walleij
2021-08-30 22:46 ` Vladimir Oltean
2021-09-07 17:48 ` Linus Walleij
2021-09-08 20:10 ` Vladimir Oltean
2021-09-10 13:59 ` Linus Walleij
2021-09-10 17:57 ` Vladimir Oltean
2021-08-31 0:24 ` Alvin Šipraga
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