From: Luo Jie <quic_luoj@quicinc.com>
To: <andrew@lunn.ch>, <davem@davemloft.net>, <edumazet@google.com>,
<kuba@kernel.org>, <pabeni@redhat.com>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<hkallweit1@gmail.com>, <linux@armlinux.org.uk>, <corbet@lwn.net>
Cc: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>
Subject: [PATCH v4 6/6] net: phy: qca8084: add qca8084_link_change_notify
Date: Thu, 16 Nov 2023 19:24:37 +0800 [thread overview]
Message-ID: <20231116112437.10578-7-quic_luoj@quicinc.com> (raw)
In-Reply-To: <20231116112437.10578-1-quic_luoj@quicinc.com>
When the link is changed, qca8084 needs to do the fifo reset and
adjust the IPG level for the qusgmii link speed 1000M.
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
---
drivers/net/phy/at803x.c | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index 06a068ca5539..7267ce858937 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -289,6 +289,13 @@
#define QCA8084_MSE_THRESHOLD 0x800a
#define QCA8084_MSE_THRESHOLD_2P5G_VAL 0x51c6
+#define QCA8084_FIFO_CONTROL 0x19
+#define QCA8084_FIFO_MAC_2_PHY BIT(1)
+#define QCA8084_FIFO_PHY_2_MAC BIT(0)
+
+#define QCA8084_MMD7_IPG_OP 0x901d
+#define QCA8084_IPG_10_TO_11_EN BIT(0)
+
MODULE_DESCRIPTION("Qualcomm Atheros AR803x and QCA808X PHY driver");
MODULE_AUTHOR("Matus Ujhelyi");
MODULE_LICENSE("GPL");
@@ -2109,6 +2116,35 @@ static int qca8084_config_init(struct phy_device *phydev)
QCA8084_MSE_THRESHOLD, QCA8084_MSE_THRESHOLD_2P5G_VAL);
}
+static void qca8084_link_change_notify(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = phy_modify(phydev, QCA8084_FIFO_CONTROL,
+ QCA8084_FIFO_MAC_2_PHY | QCA8084_FIFO_PHY_2_MAC,
+ 0);
+ if (ret)
+ return;
+
+ /* If the PHY works on PHY_INTERFACE_MODE_10G_QXGMII mode, the fifo needs to
+ * be kept as reset state in link down status.
+ */
+ if (phydev->interface != PHY_INTERFACE_MODE_10G_QXGMII || phydev->link) {
+ msleep(50);
+ ret = phy_modify(phydev, QCA8084_FIFO_CONTROL,
+ QCA8084_FIFO_MAC_2_PHY | QCA8084_FIFO_PHY_2_MAC,
+ QCA8084_FIFO_MAC_2_PHY | QCA8084_FIFO_PHY_2_MAC);
+ if (ret)
+ return;
+ }
+
+ /* Enable IPG 10 to 11 tuning on link speed 1000M of QUSGMII mode. */
+ if (phydev->interface == PHY_INTERFACE_MODE_10G_QXGMII)
+ phy_modify_mmd(phydev, MDIO_MMD_AN, QCA8084_MMD7_IPG_OP,
+ QCA8084_IPG_10_TO_11_EN,
+ phydev->speed == SPEED_1000 ? QCA8084_IPG_10_TO_11_EN : 0);
+}
+
static struct phy_driver at803x_driver[] = {
{
/* Qualcomm Atheros AR8035 */
@@ -2307,6 +2343,7 @@ static struct phy_driver at803x_driver[] = {
.cable_test_start = qca808x_cable_test_start,
.cable_test_get_status = qca808x_cable_test_get_status,
.config_init = qca8084_config_init,
+ .link_change_notify = qca8084_link_change_notify,
}, };
module_phy_driver(at803x_driver);
--
2.42.0
prev parent reply other threads:[~2023-11-16 11:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-16 11:24 [PATCH v4 0/6] add qca8084 ethernet phy driver Luo Jie
2023-11-16 11:24 ` [PATCH v4 1/6] net: phy: introduce core support for phy-mode = "10g-qxgmii" Luo Jie
2023-11-16 11:24 ` [PATCH v4 2/6] dt-bindings: net: ethernet-controller: add 10g-qxgmii mode Luo Jie
2023-11-16 14:22 ` Conor Dooley
2023-11-16 18:12 ` Andrew Lunn
2023-11-17 9:45 ` Jie Luo
2023-11-17 9:44 ` Jie Luo
2023-11-16 11:24 ` [PATCH v4 3/6] net: phy: at803x: add QCA8084 ethernet phy support Luo Jie
2023-11-16 11:24 ` [PATCH v4 4/6] net: phy: at803x: add the function phydev_id_is_qca808x Luo Jie
2023-11-16 11:24 ` [PATCH v4 5/6] net: phy: at803x: Add qca8084_config_init function Luo Jie
2023-11-16 11:24 ` Luo Jie [this message]
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