From: Luke Howard <lukeh@padl.com>
To: netdev@vger.kernel.org
Cc: andrew@lunn.ch, vladimir.oltean@nxp.com, kieran@sienda.com,
jcschroeder@gmail.com, max@huntershome.org,
Luke Howard <lukeh@padl.com>
Subject: [RFC net-next 2/5] net: dsa: mv88e6xxx: add MV88E6XXX_G1_ATU_CTL_MAC_AVB setter
Date: Sat, 27 Sep 2025 17:07:05 +1000 [thread overview]
Message-ID: <20250927070724.734933-3-lukeh@padl.com> (raw)
In-Reply-To: <20250927070724.734933-1-lukeh@padl.com>
Add accessors for the MACAVB bit, which controls whether certain ATU bits cause
the entry to be interpreted as AVB or NRL (non-rate-limiting) entries. This is
necessary on switches such as the 88E6352 and 88E6240 that support both AVB and
NRL ATU entries.
Signed-off-by: Luke Howard <lukeh@padl.com>
---
drivers/net/dsa/mv88e6xxx/global1.h | 2 ++
drivers/net/dsa/mv88e6xxx/global1_atu.c | 17 +++++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h
index 3dbb7a1b8fe11..74be4c485ab10 100644
--- a/drivers/net/dsa/mv88e6xxx/global1.h
+++ b/drivers/net/dsa/mv88e6xxx/global1.h
@@ -112,6 +112,7 @@
/* Offset 0x0A: ATU Control Register */
#define MV88E6XXX_G1_ATU_CTL 0x0a
#define MV88E6XXX_G1_ATU_CTL_LEARN2ALL 0x0008
+#define MV88E6XXX_G1_ATU_CTL_MAC_AVB 0x8000
#define MV88E6161_G1_ATU_CTL_HASH_MASK 0x0003
/* Offset 0x0B: ATU Operation Register */
@@ -322,6 +323,7 @@ int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip);
int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index);
int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all);
+int mv88e6xxx_g1_atu_set_mac_avb(struct mv88e6xxx_chip *chip, bool mac_avb);
int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
unsigned int msecs);
int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid,
diff --git a/drivers/net/dsa/mv88e6xxx/global1_atu.c b/drivers/net/dsa/mv88e6xxx/global1_atu.c
index c47f068f56b32..429a1ee44e47d 100644
--- a/drivers/net/dsa/mv88e6xxx/global1_atu.c
+++ b/drivers/net/dsa/mv88e6xxx/global1_atu.c
@@ -41,6 +41,23 @@ int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all)
return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);
}
+int mv88e6xxx_g1_atu_set_mac_avb(struct mv88e6xxx_chip *chip, bool mac_avb)
+{
+ u16 val;
+ int err;
+
+ err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val);
+ if (err)
+ return err;
+
+ if (mac_avb)
+ val |= MV88E6XXX_G1_ATU_CTL_MAC_AVB;
+ else
+ val &= ~MV88E6XXX_G1_ATU_CTL_MAC_AVB;
+
+ return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);
+}
+
int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
unsigned int msecs)
{
--
2.43.0
next prev parent reply other threads:[~2025-09-27 7:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-27 7:07 [RFC net-next 0/5] net: dsa: mv88e6xxx: support for 802.1Qav Luke Howard
2025-09-27 7:07 ` [RFC net-next 1/5] net: dsa: mv88e6xxx: add num_tx_queues to chip info structure Luke Howard
2025-09-27 7:07 ` Luke Howard [this message]
2025-09-27 14:29 ` [RFC net-next 2/5] net: dsa: mv88e6xxx: add MV88E6XXX_G1_ATU_CTL_MAC_AVB setter Andrew Lunn
2025-09-27 7:07 ` [RFC net-next 3/5] net: dsa: mv88e6xxx: MQPRIO support Luke Howard
2025-09-27 15:12 ` Andrew Lunn
2025-09-27 16:00 ` Luke Howard
2025-09-27 17:36 ` Andrew Lunn
2025-09-27 18:14 ` Luke Howard
2026-05-26 7:05 ` Luke Howard
2025-09-27 7:07 ` [RFC net-next 4/5] net: dsa: mv88e6xxx: CBS support Luke Howard
2025-09-27 7:07 ` [RFC net-next 5/5] dt-bindings: net: dsa: mv88e6xxx: add mv88e6xxx-avb-mode property Luke Howard
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