* [PATCH iproute2-next v3 0/2] dpll: phase unit display and frequency monitoring
@ 2026-05-04 16:30 Ivan Vecera
2026-05-04 16:30 ` [PATCH iproute2-next v3 1/2] dpll: add ps unit to phase-related pin attributes Ivan Vecera
2026-05-04 16:30 ` [PATCH iproute2-next v3 2/2] dpll: add frequency monitoring support Ivan Vecera
0 siblings, 2 replies; 3+ messages in thread
From: Ivan Vecera @ 2026-05-04 16:30 UTC (permalink / raw)
To: netdev; +Cc: Petr Oros, David Ahern, Stephen Hemminger
This series improves dpll pin output formatting and adds support for
the frequency monitoring feature.
Patch 1 adds picosecond unit to phase-adjust-min, phase-adjust-max
and phase-adjust attributes. It also introduces dpll_pr_phase_offset()
helper that properly formats phase-offset as fractional picoseconds by
dividing the raw kernel value by DPLL_PHASE_OFFSET_DIVIDER.
Patch 2 adds support for the new frequency monitoring feature including
the DPLL_A_FREQUENCY_MONITOR device attribute and
DPLL_A_PIN_MEASURED_FREQUENCY pin attribute. The measured frequency is
displayed as fractional Hz using dpll_pr_measured_frequency() helper
since the kernel reports the value in millihertz. It also refactors
phase-offset-monitor parsing into a shared helper.
Tested on EDS2 development board with zl3073x DPLL:
# dpll pin show package-label REF0P
pin id 196:
module-name: zl3073x
clock-id: 13709406750444215013
board-label: SyncE IN M1 CLK1
package-label: REF0P
type: synce-eth-port
frequency: 125000000 Hz
measured-frequency: 124999326.000 Hz
frequency-supported:
2500000 Hz
25000000 Hz
125000000 Hz
capabilities: 0x6 state-can-change priority-can-change
phase-adjust-min: -2147483648 ps
phase-adjust-max: 2147483647 ps
phase-adjust: 0 ps
parent-device:
id 14 direction input prio 10 state selectable phase-offset 0.000 ps
id 15 direction input prio 0 state connected phase-offset 323.000 ps
Changes:
v3:
- replaced DPLL_PR_PHASE_OFFSET and DPLL_PR_MEASURED_FREQUENCY macros
with dpll_pr_phase_offset() and dpll_pr_measured_frequency() functions
- added frequency monitor status to device show man page output list
- simplified device set synopsis in man page
- removed stray blank line in patch 1
v2:
- fixed very long line in the man page
Ivan Vecera (2):
dpll: add ps unit to phase-related pin attributes
dpll: add frequency monitoring support
bash-completion/dpll | 4 +-
dpll/dpll.c | 93 +++++++++++++++++++++++++++++++++++---------
man/man8/dpll.8 | 21 +++++++++-
3 files changed, 96 insertions(+), 22 deletions(-)
--
2.53.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH iproute2-next v3 1/2] dpll: add ps unit to phase-related pin attributes
2026-05-04 16:30 [PATCH iproute2-next v3 0/2] dpll: phase unit display and frequency monitoring Ivan Vecera
@ 2026-05-04 16:30 ` Ivan Vecera
2026-05-04 16:30 ` [PATCH iproute2-next v3 2/2] dpll: add frequency monitoring support Ivan Vecera
1 sibling, 0 replies; 3+ messages in thread
From: Ivan Vecera @ 2026-05-04 16:30 UTC (permalink / raw)
To: netdev; +Cc: Petr Oros, David Ahern, Stephen Hemminger
Display phase-adjust-min, phase-adjust-max and phase-adjust values
with ps unit. Add DPLL_PR_PHASE_OFFSET macro that properly formats
phase-offset as fractional picoseconds by dividing the raw kernel
value by DPLL_PHASE_OFFSET_DIVIDER.
Reviewed-by: Petr Oros <poros@redhat.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
Changes:
v3 - macro DPLL_PR_PHASE_OFFSET replaced by function
dpll_pr_phase_offset
---
dpll/dpll.c | 30 +++++++++++++++++++++++++-----
1 file changed, 25 insertions(+), 5 deletions(-)
diff --git a/dpll/dpll.c b/dpll/dpll.c
index b6ba3283e0ba..1c5d2b1b7f28 100644
--- a/dpll/dpll.c
+++ b/dpll/dpll.c
@@ -455,6 +455,24 @@ static void dpll_pr_multi_enum_str(const struct nlmsghdr *nlh, int attr_id,
print_nl();
}
+/* Phase offset - JSON prints raw sub-ps value, FP prints fractional ps */
+static void dpll_pr_phase_offset(struct nlattr *attr)
+{
+ __s64 val;
+ lldiv_t d;
+
+ if (!attr)
+ return;
+
+ val = mnl_attr_get_sint(attr);
+ d = lldiv(llabs(val), DPLL_PHASE_OFFSET_DIVIDER);
+ print_s64(PRINT_JSON, "phase-offset", NULL, val);
+ print_string(PRINT_FP, NULL, " phase-offset %s",
+ val < 0 ? "-" : "");
+ print_s64(PRINT_FP, NULL, "%lld.", d.quot);
+ print_s64(PRINT_FP, NULL, "%03lld ps", d.rem);
+}
+
/* Print frequency range (or single value if min==max) */
static void dpll_pr_freq_range(__u64 freq_min, __u64 freq_max)
{
@@ -1507,8 +1525,7 @@ static void dpll_pin_print_parent_devices(struct nlattr *attr)
" prio %u");
DPLL_PR_ENUM_STR_FMT(tb_parent, DPLL_A_PIN_STATE, "state",
" state %s", dpll_pin_state_name);
- DPLL_PR_SINT_FMT(tb_parent, DPLL_A_PIN_PHASE_OFFSET,
- "phase-offset", " phase-offset %" PRId64);
+ dpll_pr_phase_offset(tb_parent[DPLL_A_PIN_PHASE_OFFSET]);
print_nl();
close_json_object();
@@ -1592,10 +1609,13 @@ static void dpll_pin_print_attrs(struct nlattr **tb)
dpll_pin_print_capabilities(tb[DPLL_A_PIN_CAPABILITIES]);
- DPLL_PR_INT(tb, DPLL_A_PIN_PHASE_ADJUST_MIN, "phase-adjust-min");
- DPLL_PR_INT(tb, DPLL_A_PIN_PHASE_ADJUST_MAX, "phase-adjust-max");
+ DPLL_PR_INT_FMT(tb, DPLL_A_PIN_PHASE_ADJUST_MIN, "phase-adjust-min",
+ " phase-adjust-min: %d ps\n");
+ DPLL_PR_INT_FMT(tb, DPLL_A_PIN_PHASE_ADJUST_MAX, "phase-adjust-max",
+ " phase-adjust-max: %d ps\n");
DPLL_PR_UINT(tb, DPLL_A_PIN_PHASE_ADJUST_GRAN, "phase-adjust-gran");
- DPLL_PR_INT(tb, DPLL_A_PIN_PHASE_ADJUST, "phase-adjust");
+ DPLL_PR_INT_FMT(tb, DPLL_A_PIN_PHASE_ADJUST, "phase-adjust",
+ " phase-adjust: %d ps\n");
if (json || !tb[DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT])
DPLL_PR_SINT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET,
--
2.53.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH iproute2-next v3 2/2] dpll: add frequency monitoring support
2026-05-04 16:30 [PATCH iproute2-next v3 0/2] dpll: phase unit display and frequency monitoring Ivan Vecera
2026-05-04 16:30 ` [PATCH iproute2-next v3 1/2] dpll: add ps unit to phase-related pin attributes Ivan Vecera
@ 2026-05-04 16:30 ` Ivan Vecera
1 sibling, 0 replies; 3+ messages in thread
From: Ivan Vecera @ 2026-05-04 16:30 UTC (permalink / raw)
To: netdev; +Cc: Petr Oros, David Ahern, Stephen Hemminger
Add support for the new frequency monitoring feature from the kernel
patch series "dpll: add actual frequency monitoring feature". This
includes:
- DPLL_A_FREQUENCY_MONITOR device attribute (enable/disable)
- DPLL_A_PIN_MEASURED_FREQUENCY pin attribute displayed as fractional Hz
using DPLL_PR_MEASURED_FREQUENCY macro (kernel reports in mHz)
- device set: frequency-monitor { enable | disable }
- Refactor phase-offset-monitor to use new dpll_parse_attr_feature_state
helper shared with frequency-monitor
- Update man page and bash-completion
Reviewed-by: Petr Oros <poros@redhat.com>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
Changes:
v3 - macro DPLL_PR_MEASURED_FREQUENCY replaced by function
dpll_pr_measured_frequency
v2 - fixed very long line in the man page
---
bash-completion/dpll | 4 +--
dpll/dpll.c | 63 +++++++++++++++++++++++++++++++++++---------
man/man8/dpll.8 | 21 +++++++++++++--
3 files changed, 71 insertions(+), 17 deletions(-)
diff --git a/bash-completion/dpll b/bash-completion/dpll
index 542b99c2fce2..7ddcf529d429 100644
--- a/bash-completion/dpll
+++ b/bash-completion/dpll
@@ -100,7 +100,7 @@ _dpll_device()
COMPREPLY=( $( compgen -W "automatic manual" -- "$cur" ) )
return 0
;;
- phase-offset-monitor)
+ phase-offset-monitor|frequency-monitor)
COMPREPLY=( $( compgen -W "enable disable true false 0 1" -- "$cur" ) )
return 0
;;
@@ -110,7 +110,7 @@ _dpll_device()
;;
*)
COMPREPLY=( $( compgen -W "id mode phase-offset-monitor \
- phase-offset-avg-factor" -- "$cur" ) )
+ phase-offset-avg-factor frequency-monitor" -- "$cur" ) )
return 0
;;
esac
diff --git a/dpll/dpll.c b/dpll/dpll.c
index 1c5d2b1b7f28..febf2a5d1fbd 100644
--- a/dpll/dpll.c
+++ b/dpll/dpll.c
@@ -313,6 +313,26 @@ static int dpll_parse_attr_str(struct dpll *dpll, struct nlmsghdr *nlh,
return 0;
}
+static int dpll_parse_attr_feature_state(struct dpll *dpll,
+ struct nlmsghdr *nlh,
+ const char *arg_name, int attr_id)
+{
+ const char *str = dpll_argv_next(dpll);
+ bool val;
+
+ if (!str) {
+ pr_err("%s requires an argument\n", arg_name);
+ return -EINVAL;
+ }
+ if (str_to_bool(str, &val)) {
+ pr_err("invalid %s value: %s (use enable/disable)\n",
+ arg_name, str);
+ return -EINVAL;
+ }
+ mnl_attr_put_u32(nlh, attr_id, val ? 1 : 0);
+ return 0;
+}
+
static int dpll_parse_attr_enum(struct dpll *dpll, struct nlmsghdr *nlh,
const char *arg_name, int attr_id,
int (*parse_func)(struct dpll *, __u32 *))
@@ -473,6 +493,22 @@ static void dpll_pr_phase_offset(struct nlattr *attr)
print_s64(PRINT_FP, NULL, "%03lld ps", d.rem);
}
+/* Measured frequency - JSON prints raw mHz value, FP prints fractional Hz */
+static void dpll_pr_measured_frequency(struct nlattr *attr)
+{
+ __u64 val;
+ lldiv_t d;
+
+ if (!attr)
+ return;
+
+ val = mnl_attr_get_u64(attr);
+ d = lldiv(val, DPLL_PIN_MEASURED_FREQUENCY_DIVIDER);
+ print_lluint(PRINT_JSON, "measured-frequency", NULL, val);
+ print_s64(PRINT_FP, NULL, " measured-frequency: %lld.", d.quot);
+ print_s64(PRINT_FP, NULL, "%03lld Hz\n", d.rem);
+}
+
/* Print frequency range (or single value if min==max) */
static void dpll_pr_freq_range(__u64 freq_min, __u64 freq_max)
{
@@ -660,6 +696,7 @@ static void cmd_device_help(void)
pr_err(" dpll device set id DEVICE_ID [ mode { automatic | manual } ]\n");
pr_err(" [ phase-offset-monitor { enable | disable } ]\n");
pr_err(" [ phase-offset-avg-factor NUM ]\n");
+ pr_err(" [ frequency-monitor { enable | disable } ]\n");
pr_err(" dpll device id-get [ module-name NAME ] [ clock-id ID ] [ type TYPE ]\n");
}
@@ -1061,6 +1098,10 @@ static void dpll_device_print_attrs(const struct nlmsghdr *nlh,
str_enable_disable);
DPLL_PR_UINT(tb, DPLL_A_PHASE_OFFSET_AVG_FACTOR,
"phase-offset-avg-factor");
+ DPLL_PR_ENUM_STR_FMT(tb, DPLL_A_FREQUENCY_MONITOR,
+ "frequency-monitor",
+ " frequency-monitor: %s\n",
+ str_enable_disable);
}
/* Netlink callback - device get (single device) */
@@ -1222,25 +1263,20 @@ static int cmd_device_set(struct dpll *dpll)
dpll_parse_mode))
return -EINVAL;
} else if (dpll_argv_match(dpll, "phase-offset-monitor")) {
- const char *str = dpll_argv_next(dpll);
- bool val;
-
- if (!str) {
- pr_err("phase-offset-monitor requires an argument\n");
+ if (dpll_parse_attr_feature_state(dpll, nlh,
+ "phase-offset-monitor",
+ DPLL_A_PHASE_OFFSET_MONITOR))
return -EINVAL;
- }
- if (str_to_bool(str, &val)) {
- pr_err("invalid phase-offset-monitor value: %s (use enable/disable)\n",
- str);
- return -EINVAL;
- }
- mnl_attr_put_u32(nlh, DPLL_A_PHASE_OFFSET_MONITOR,
- val ? 1 : 0);
} else if (dpll_argv_match(dpll, "phase-offset-avg-factor")) {
if (dpll_parse_attr_u32(dpll, nlh,
"phase-offset-avg-factor",
DPLL_A_PHASE_OFFSET_AVG_FACTOR))
return -EINVAL;
+ } else if (dpll_argv_match(dpll, "frequency-monitor")) {
+ if (dpll_parse_attr_feature_state(dpll, nlh,
+ "frequency-monitor",
+ DPLL_A_FREQUENCY_MONITOR))
+ return -EINVAL;
} else {
pr_err("unknown option: %s\n", dpll_argv(dpll));
return -EINVAL;
@@ -1604,6 +1640,7 @@ static void dpll_pin_print_attrs(struct nlattr **tb)
DPLL_PR_ENUM_STR(tb, DPLL_A_PIN_TYPE, "type", dpll_pin_type_name);
DPLL_PR_U64_FMT(tb, DPLL_A_PIN_FREQUENCY, "frequency",
" frequency: %" PRIu64 " Hz\n");
+ dpll_pr_measured_frequency(tb[DPLL_A_PIN_MEASURED_FREQUENCY]);
dpll_pin_print_freq_supported(tb[DPLL_A_PIN_FREQUENCY_SUPPORTED]);
diff --git a/man/man8/dpll.8 b/man/man8/dpll.8
index 89f17af74923..c0d4b9caef2a 100644
--- a/man/man8/dpll.8
+++ b/man/man8/dpll.8
@@ -109,9 +109,11 @@ Lock status (locked-ho-ack, locked, unlocked, holdover)
Temperature (if supported)
.IP \[bu]
Type (PPS or EEC)
+.IP \[bu]
+Frequency monitor status (enable/disable)
.RE
-.SS dpll device set id ID [ mode { automatic | manual } ] [ phase-offset-monitor { enable | disable } ] [ phase-offset-avg-factor FACTOR ]
+.SS dpll device set id ID [ PARAMETER VALUE ] ...
Configure DPLL device parameters.
@@ -140,6 +142,14 @@ When enabled, the kernel continuously measures and reports phase differences.
Set the averaging factor (1-255) applied to phase offset calculations.
Higher values provide smoother but slower-responding measurements.
+.TP
+.BI frequency-monitor " { enable | disable }"
+Enable or disable frequency monitoring on the device. When enabled, the
+kernel continuously measures and reports actual pin frequencies, which can
+be read via the
+.B measured-frequency
+field in pin show output.
+
.SS dpll device id-get [ module-name NAME ] [ clock-id ID ] [ type TYPE ]
Retrieve the device ID based on identifying attributes. Useful for scripting
@@ -233,7 +243,9 @@ Board label (hardware label from device tree or ACPI)
.IP \[bu]
Pin type (mux, ext, synce-eth-port, int-oscillator, gnss)
.IP \[bu]
-Frequency and supported frequency ranges
+Configured frequency and supported frequency ranges
+.IP \[bu]
+Measured frequency in Hz (when frequency monitoring is enabled)
.IP \[bu]
Capabilities (state-can-change, priority-can-change, direction-can-change)
.IP \[bu]
@@ -372,6 +384,11 @@ Press Ctrl+C to stop monitoring.
.B dpll device set id 0 phase-offset-monitor enable
.fi
+.SS Enable frequency monitoring on device 0
+.nf
+.B dpll device set id 0 frequency-monitor enable
+.fi
+
.SS Show all EEC devices
.nf
.B dpll device show type eec
--
2.53.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
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