From: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
To: intel-wired-lan@lists.osuosl.org
Cc: netdev@vger.kernel.org
Subject: [PATCH iwl-next v1 0/4] Rework and fix ice dpll pin control
Date: Thu, 16 Jul 2026 09:49:07 +0000 [thread overview]
Message-ID: <20260716094912.1210865-1-sergey.temerkhanov@intel.com> (raw)
This series reworks and clarifies ice DPLL control logic.
Contains refactoring changes for better readability and
maintainability as well as the changes making the pin
controls compliant to design requirements.
Sergey Temerkhanov (4):
ice: dpll: Rework multiplexed pin notifications
ice: dpll: Use switch statements to handle pin states
ice: dpll: Rework U.FL muxed pin (SMA) control
ice: dpll: Rework the SMA control logic to match the requirements
drivers/net/ethernet/intel/ice/ice_dpll.c | 248 +++++++++++++++++-----
drivers/net/ethernet/intel/ice/ice_dpll.h | 1 +
2 files changed, 193 insertions(+), 56 deletions(-)
base-commit: bf696cf19d64727a5a95126733603269ed8c42c2
--
2.53.0
next reply other threads:[~2026-07-16 9:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-16 9:49 Sergey Temerkhanov [this message]
2026-07-16 9:49 ` [PATCH iwl-next v1 1/4] ice: dpll: Rework multiplexed pin notifications Sergey Temerkhanov
2026-07-16 9:49 ` [PATCH iwl-next v1 2/4] ice: dpll: Use switch statements to handle pin states Sergey Temerkhanov
2026-07-16 9:49 ` [PATCH iwl-next v1 3/4] ice: dpll: Rework U.FL muxed pin (SMA) control Sergey Temerkhanov
2026-07-16 9:49 ` [PATCH iwl-next v1 4/4] ice: dpll: Rework the SMA control logic to match the requirements Sergey Temerkhanov
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