Re: [PATCH net-next v7 3/3] dpll: add SiTime SiT9531x DPLL clock driver

[Ali Rouhi <arouhi@sitime.com>]

On 20/08/2026 19:27, Ivan Vecera wrote:
> +1 ... Reviewing single patch with the whole driver is really annoying.
> Next time, please split the driver into logical parts (e.g. low-level
> ops, core ops, features one-by one)...

Understood, and agreed. v8 comes as thirteen driver patches split that
way; the full breakdown is in my reply to Vadim.

> Due to the fact that the source is very similar with zl3073x, please
> look at its git history to see how it was submitted in past.

Done - thank you, that was the useful reference. We took the first
series as the model: basic support, the invariants fetched during
probe, DPLL types and pin properties from firmware, device and pin
registration, then one capability per patch. Ours is split the same way
and in the same order.

That is about how the series is split, not how the code is arranged.
Our file layout stays as it is for now. Say if you would rather see the
files broken up as well and we will do that too.

> ...and please do not forget to include me in the CC list ;-)

Added, from v8 on.

Thanks,
Ali