[PATCH v3 6/6] bus: mhi: host: mhi_phc: Update the Time sync logic to read 64 bit register value

[Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>]

Instead of reading low and high of the mhi registers twice use 64 bit
register value to avoid any time penalty.

Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
 drivers/bus/mhi/host/mhi_phc.c | 47 ++++++++++++++++++++++++------------------
 1 file changed, 27 insertions(+), 20 deletions(-)

diff --git a/drivers/bus/mhi/host/mhi_phc.c b/drivers/bus/mhi/host/mhi_phc.c
index 783f05b5d144..b1d10431bd30 100644
--- a/drivers/bus/mhi/host/mhi_phc.c
+++ b/drivers/bus/mhi/host/mhi_phc.c
@@ -57,26 +57,33 @@ static int mhi_get_remote_tsc_time_sync(struct mhi_device *mhi_dev, struct mhi_t
 
 	ptp_read_system_prets(sts);
 
-	/*
-	 * Read the high dword twice around the low dword and retry if it
-	 * changed, to avoid a torn read across a device-side rollover.
-	 */
-	do {
-		ret = mhi_read_reg(mhi_cntrl, mhi_tsync->time_reg,
-				   TSC_TIMESYNC_TIME_HIGH_OFFSET, &hi);
-		if (ret)
-			break;
-
-		ret = mhi_read_reg(mhi_cntrl, mhi_tsync->time_reg,
-				   TSC_TIMESYNC_TIME_LOW_OFFSET, &lo);
-		if (ret)
-			break;
-
-		ret = mhi_read_reg(mhi_cntrl, mhi_tsync->time_reg,
-				   TSC_TIMESYNC_TIME_HIGH_OFFSET, &time->t_dev_hi);
-	} while (!ret && hi != time->t_dev_hi);
-
-	time->t_dev_lo = lo;
+	if (mhi_cntrl->read_reg64) {
+		ret = mhi_read_reg64(mhi_cntrl, mhi_tsync->time_reg,
+				     TSC_TIMESYNC_TIME_LOW_OFFSET, &val);
+		time->t_dev_lo = (u32)val;
+		time->t_dev_hi = (u32)(val >> 32);
+	} else {
+		/*
+		 * Read the high dword twice around the low dword and retry if it
+		 * changed, to avoid a torn read across a device-side rollover.
+		 */
+		do {
+			ret = mhi_read_reg(mhi_cntrl, mhi_tsync->time_reg,
+					   TSC_TIMESYNC_TIME_HIGH_OFFSET, &hi);
+			if (ret)
+				break;
+
+			ret = mhi_read_reg(mhi_cntrl, mhi_tsync->time_reg,
+					   TSC_TIMESYNC_TIME_LOW_OFFSET, &lo);
+			if (ret)
+				break;
+
+			ret = mhi_read_reg(mhi_cntrl, mhi_tsync->time_reg,
+					   TSC_TIMESYNC_TIME_HIGH_OFFSET, &time->t_dev_hi);
+		} while (!ret && hi != time->t_dev_hi);
+
+		time->t_dev_lo = lo;
+	}
 
 	ptp_read_system_postts(sts);
 

-- 
2.34.1