[PATCH net-next v13 00/12] dpll: add SiTime SiT9531x DPLL clock driver

[Ali Rouhi <arouhi@sitime.com>]

This series adds a DPLL subsystem driver for the SiTime SiT95316 and
SiT95317 I2C clock generators. Each device integrates four PLLs with
automatic reference selection and on-chip TDC phase-offset measurement,
and is used for synchronization in telecom, networking, and data-center
timing.

What is here is the device-tree binding, the driver under
drivers/dpll/sit9531x/, and the MAINTAINERS entry. Patch 1 of v11 was
applied to net-next as commit 45ad84d2800e ("dt-bindings: dpll: allow
hex unit addresses on output pins"), which is why the count is twelve
and not thirteen.

v1: https://lore.kernel.org/netdev/20260511211143.19792-1-arouhi@sitime.com/
v2: https://lore.kernel.org/netdev/20260520191943.73938-1-arouhi@sitime.com/
v3: https://lore.kernel.org/netdev/20260731180951.65725-1-arouhi@sitime.com/
v4: https://lore.kernel.org/netdev/20260806232439.27551-1-arouhi@sitime.com/
v5: https://lore.kernel.org/netdev/20260810230439.22866-1-arouhi@sitime.com/
v6: https://lore.kernel.org/netdev/20260812175337.18155-1-arouhi@sitime.com/
v7: https://lore.kernel.org/netdev/20260815221919.64226-1-arouhi@sitime.com/
v8: https://lore.kernel.org/netdev/20260902214030.20955-1-arouhi@sitime.com/
v9: https://lore.kernel.org/netdev/20260915000015.80480-1-arouhi@sitime.com/
v10: https://lore.kernel.org/netdev/20260921201108.42676-1-arouhi@sitime.com/
v11: https://lore.kernel.org/netdev/20260930233714.87679-1-arouhi@sitime.com/
v12: https://lore.kernel.org/netdev/20261009183151.78497-1-arouhi@sitime.com/

Ivan Vecera reviewed v12. He gave his Reviewed-by on six patches and
left comments on four; patch 9 has both. All four comments are
addressed here, folded into the patch that introduces the code rather
than added as a follow-up, so each patch still reads as the one change
it describes. The replies go out with this series. There is no code
change in v13 beyond those four, one locking change described below,
and the line wrapping and kernel-doc items the patchwork checks
reported.

His Reviewed-by is carried on patches 4, 6, 7, 9 and 11. Patches 4
and 7 are unchanged from v12. Patch 9 carries the reordering he asked
for, patch 11 a kernel-doc Return line, and patch 6 the line wrapping
noted below. It is not carried on patch 5. That patch now takes
multiop_lock around the probe-time output state fetch, which he has
not seen; the three functions it makes static are the change he asked
for in patch 3.

  1     bindings: vendor prefix
  2     bindings: the device schema
  3     basic support: paged regmap, variant detection, probe
  4     DPLL types and pin properties from system firmware
  5     register the DPLL devices and pins, and keep their state
  6     input pin state and operational state on a DPLL
  7     input pin priority
  8     pin frequency, both directions
  9     output pin state (mute)
  10    output phase adjust
  11    phase offset through the TDC
  12    the inter-PLL sync net as a pair of pins

The two bindings patches come first, so the driver never matches on a
compatible string before the schema that describes it is in the tree.

Each of the ten driver patches builds and links on its own: no patch
calls something a later patch introduces, so a bisect cannot land on a
tree that fails to compile. That was re-checked for this posting patch
by patch with W=1 and with sparse, and kernel-doc -Wall is clean on
every patch. checkpatch --strict at 80 columns is clean except for the
"does MAINTAINERS need updating?" hint on patches 4 and 5, which add
files under drivers/dpll/sit9531x/ -- patch 3 already covers that
directory with an F: entry.

One change in this series did not come from the thread. A review of
v12 by the netdev AI reviewer, which reached us off-list, asked why
sit9531x_out_state_fetch() runs without multiop_lock at probe when
every other caller of a paged-register sequence holds it. Nothing runs
concurrently before registration, so there was no bug, but the fetch
walks the same paged registers under the same contract and now holds
the lock the same way. That is the seven-line change in patch 5.

Changes in v13:

  - Patch 3: sit9531x_regmap_config and sit9531x_dev_probe() are
    static and their declarations are gone from core.h.

  - Patch 5: sit9531x_dev_start(), sit9531x_dev_stop() and
    sit9531x_clear_notifications() are static, the same change, and
    only core.c calls them. The probe-time output state fetch runs
    under multiop_lock.

  - Patch 8: the output rate read-back sat before the
    skip_fwnode_props label, so an output the board describes without
    a rate list, or does not describe at all, kept a cached rate of
    zero and published only the 1 Hz to 1 GHz fallback range. The
    read-back was meant for every output; it now sits past the label,
    so each output publishes the rate its divider produces ahead of
    the fallback range.

  - Patch 10: a zero phase request returns with coarse, fine and the
    adjustment set to zero, before the divisions.

  - Patch 9: local declarations in reverse xmas tree order, and the
    same ordering applied across the driver wherever the swap was
    free. Blocks whose order carries a dependency are unchanged.

  - Patch 11: a Return line in the sit9531x_input_mon_fetch
    kernel-doc.

  - Lines over 80 columns wrapped in patches 6, 8 and 10. The one in
    patch 6 takes a local const u8 *prev for the two prio_srcs reads
    in the rollback loop; the rest are re-indentation.

  - Reviewed-by from Ivan Vecera carried on patches 4, 6, 7, 9 and 11.

Ali Rouhi (2):
  dt-bindings: vendor-prefixes: add SiTime Corporation
  dt-bindings: dpll: add SiTime SiT95316 clock generator

Oleg Zadorozhnyi (10):
  dpll: add basic SiTime SiT9531x support
  dpll: sit9531x: read DPLL types and pin properties from system
    firmware
  dpll: sit9531x: register DPLL devices and pins
  dpll: sit9531x: implement input pin state on a DPLL
  dpll: sit9531x: add support to get and set priority on input pins
  dpll: sit9531x: add support to get and set frequency on pins
  dpll: sit9531x: implement output pin state on a DPLL
  dpll: sit9531x: add support to adjust output phase
  dpll: sit9531x: add support to get phase offset on the connected input
    pin
  dpll: sit9531x: model the inter-PLL sync net as a pair of pins

 .../bindings/dpll/sitime,sit95316.yaml        |  213 +
 .../devicetree/bindings/vendor-prefixes.yaml  |    2 +
 MAINTAINERS                                   |    7 +
 drivers/dpll/Kconfig                          |    2 +
 drivers/dpll/Makefile                         |    1 +
 drivers/dpll/sit9531x/Kconfig                 |   17 +
 drivers/dpll/sit9531x/Makefile                |    4 +
 drivers/dpll/sit9531x/core.c                  | 5320 +++++++++++++++++
 drivers/dpll/sit9531x/core.h                  |  443 ++
 drivers/dpll/sit9531x/dpll.c                  | 1731 ++++++
 drivers/dpll/sit9531x/dpll.h                  |   70 +
 drivers/dpll/sit9531x/prop.c                  |  476 ++
 drivers/dpll/sit9531x/prop.h                  |   37 +
 drivers/dpll/sit9531x/regs.h                  |  425 ++
 14 files changed, 8748 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dpll/sitime,sit95316.yaml
 create mode 100644 drivers/dpll/sit9531x/Kconfig
 create mode 100644 drivers/dpll/sit9531x/Makefile
 create mode 100644 drivers/dpll/sit9531x/core.c
 create mode 100644 drivers/dpll/sit9531x/core.h
 create mode 100644 drivers/dpll/sit9531x/dpll.c
 create mode 100644 drivers/dpll/sit9531x/dpll.h
 create mode 100644 drivers/dpll/sit9531x/prop.c
 create mode 100644 drivers/dpll/sit9531x/prop.h
 create mode 100644 drivers/dpll/sit9531x/regs.h


base-commit: 45ad84d2800e4a092fb8d96006a533b2d0ab13f6
-- 
2.39.2 (Apple Git-143)