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From: Imran Shaik <imran.shaik@oss.qualcomm.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Richard Cochran <richardcochran@gmail.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: Ajit Pandey <ajit.pandey@oss.qualcomm.com>,
	Taniya Das <taniya.das@oss.qualcomm.com>,
	Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH 1/6] dt-bindings: ptp: Document the TSCSS on Qualcomm Lemans and Monaco SoCs
Date: Mon, 26 Oct 2026 18:25:37 +0530	[thread overview]
Message-ID: <237b2f74-4a9b-4df2-a0fe-a7b783ed5267@oss.qualcomm.com> (raw)
In-Reply-To: <aa76425c-0579-42c2-832d-cc767703f3f5@kernel.org>



On 23-10-2026 03:09 pm, Krzysztof Kozlowski wrote:
> On 13/10/2026 13:49, Imran Shaik wrote:
>>>>>> +
>>>>>> +patternProperties:
>>>>>> +  "^etu-slice@[0-9a-f]+$":
>>>>>> +    type: object
>>>>>> +    description: ETU slice configuration
>>>>>> +    properties:
>>>>>> +      reg:
>>>>>> +        maxItems: 1
>>>>>> +
>>>>>> +      pinctrl-0: true
>>>>>> +
>>>>>> +      pinctrl-names:
>>>>>> +        items:
>>>>>> +          - const: default
>>>>>
>>>>> Heh? Which code do you copy?
>>>>>
>>>>
>>>> Each ETU slice has its own external event pin config, so kept pinctrl-0
>>>> and pinctrl-names on the slice subnode. Please suggest if you prefer
>>>> otherwise.
> 
> Just drop both pinctrl properties, because you should not need them. You
> define them only if they are different than default.
> 

Thanks for the feedback, will drop this in next series.

>>>
>>> No, from where did you get this code? Why are you sending bindings which
>>> are different then all other bindings?
>>>
>>
>> I was referring to the example in [1] when adding the pinctrl properties
>> under the etu-slice sub node.
>>
>> [1] -
>> Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml
> 
> That's like 13 years old device binding, so unfortunately likely
> antipattern.
> 
> 
> 
>>
>> On checking further, I found that our etu-slice sub node deviates from
>> that example, since we don't have a compatible string for the sub node.
>>
>> Please let me know if we should move the pinctrl properties under the
>> tscss node with per-slice names, or instead keep them under the
>> etu-slice sub node and add a compatible there.
> 
> etu-slice does not feel like device at all unfortunately. I see only
> address space, so one resource, which might be enough but lack of
> description for the subnode is not helping. I have doubts that separate
> subnodes should be there in the first place, but if they stay, describe
> the child node fully - what sort of device it is. Just because there is
> independent timestamping counter does not make it separate device, just
> like independent interrupt in GIC is not itself an independent device.
> 

The ETU is an independent hardware block within TSCSS that captures/
snapshots the TSC timestamp in response to an external hardware
event trigger, for each slice individually. Hence the subnodes approach
was followed and will capture these details in the description as well.

If we drop the subnodes and add everything into the parent TSCSS node
instead, then all the arrays here must stay index aligned as per slice
mapping. Example DTS node looks like this (QDU1000, 3 slices):

ptp@1da0000 {
	compatible = "qcom,qdu1000-tscss";
	reg = <0x0 0x01da0000 0x0 0x2000>,
	      <0x0 0x01db0000 0x0 0x10000>;
	reg-names = "tsc", "etu";
	
	...

	interrupts = <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>,
		     <GIC_SPI 333 IRQ_TYPE_EDGE_RISING>,
		     <GIC_SPI 334 IRQ_TYPE_EDGE_RISING>;
	interrupt-names = "slice1", "slice5", "slice6";
	
	pinctrl-0 = <&tod_pps>;
	pinctrl-1 = <&gps_pps>;
	pinctrl-2 = <&hardsync_pps>;
	pinctrl-names = "slice1", "slice5", "slice6";
	
	qcom,etu-slice = <1 5 6>;
	qcom,etu-event-sel = <1 3 2>;
};

Please help suggest which approach to follow here. Accordingly, I will
update the bindings in next series.

Thanks,
Imran

  reply	other threads:[~2026-10-26 12:56 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-27 14:10 [PATCH 0/6] Add support for Qualcomm TSCSS hardware Imran Shaik
2026-07-27 14:10 ` [PATCH 1/6] dt-bindings: ptp: Document the TSCSS on Qualcomm Lemans and Monaco SoCs Imran Shaik
2026-07-27 15:50   ` Krzysztof Kozlowski
2026-09-01  6:31     ` Imran Shaik
2026-09-01  6:40       ` Krzysztof Kozlowski
2026-10-13 11:49         ` Imran Shaik
2026-10-23  9:39           ` Krzysztof Kozlowski
2026-10-26 12:55             ` Imran Shaik [this message]
2026-07-27 14:10 ` [PATCH 2/6] dt-bindings: ptp: Document TSCSS hardware on Qualcomm QDU1000 SoC Imran Shaik
2026-07-27 15:51   ` Krzysztof Kozlowski
2026-09-01  6:31     ` Imran Shaik
2026-07-27 14:10 ` [PATCH 3/6] ptp: qcom: Add PTP driver for the Qualcomm TSC hardware Imran Shaik
2026-07-27 15:53   ` Krzysztof Kozlowski
2026-07-30 10:58     ` Imran Shaik
2026-07-27 23:20   ` Jakub Kicinski
2026-07-30 10:56     ` Imran Shaik
2026-07-27 14:11 ` [PATCH 4/6] arm64: defconfig: Enable Qualcomm TSC driver Imran Shaik
2026-07-27 14:11 ` [PATCH 5/6] arm64: dts: qcom: lemans: Add support for TSCSS node Imran Shaik
2026-07-27 14:44   ` Konrad Dybcio
2026-09-01  6:41     ` Imran Shaik
2026-09-02 15:58       ` Konrad Dybcio
2026-07-27 14:11 ` [PATCH 6/6] arm64: dts: qcom: qdu1000: " Imran Shaik
2026-07-27 15:54   ` Krzysztof Kozlowski

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