Re: [net-next,PATCH v2] enetc: Increase eMDIO MDC rate to 2.5 MHz

[Marek Vasut <marex@nabladev.com>]

On 10/1/26 3:53 PM, Andrew Lunn wrote:
>> Okay, but please consider Andrew's suggestion. Add clock-frequency
>> support for greater flexibility in adapting to different situations,
>> instead of fixing the MDC clock to 2.5MHz.
> 
> I consider this nice to have. And to actually implement it, you need
> to know the base frequency in order to calculate the divider. So i
> suggest the first patches in the patchset set the clock to 2.5Mhz,
> then consider other DT requested frequencies.
I sent this:

[net-next,PATCH] enetc: Set eMDIO MDC rate to 2.5 MHz only on i.MX95

This sets MX95 to 2.5 MHz and keeps other SoCs unaffected.

Wei, for the other SoCs, do we know which SoCs clocks the MDC (divider) 
from which clock ? And can we figure out the clock rates and dividers ?

For the MX95, I assume the clock that feed the MDC divider are "enet" 
clock at 666 MHz , divided by 66 and divided by 4 ? Where does the 4 
come from ?

Thank you for your help !