Re: [net-next,PATCH v2] enetc: Increase eMDIO MDC rate to 2.5 MHz

[Marek Vasut <marex@nabladev.com>]

On 10/1/26 2:45 AM, Wei Fang wrote:

Hello Wei,

>> Hmmmm, are those clock available on MX95 ? Maybe we can do some sort of
>> fallback -- assume 166 MHz clock on LS, and obtain the clock and clock
>> rate via clock framework on MX95 ?
> 
> The MDC clock is derived from the NETC system clock. For iMX platforms, the
> system clock is controlled by system manager (M33 core), Linux cannot
> configure it.

That is probably still fine, as long as the clock are available via SCMI 
and their clock frequency can be read (not written/set), we can use them.

> Moreover, the actual situation is a bit complicated. For iMX95, the
> system clock source provided by the SoC to NETC is IMX95_CLK_ENET, which is
> 666MHz. There is a 1/2 divisor in NETCMIX, so the clock input to NETC is 333MHz.
> Therefore, to obtain the actual system clock from the clock framework, we need
> to add a fixed-factor clock to the DTS as the NETC's system clock. Some platforms
> do not have this divisor. So we do not add the system clock to the binding-doc of
> both emdio and enetc.

This is something which can still be handled by a compatible string match.

> In addition, the NETC is also used on S32 platforms, that might be another story
> altogether.
> 
> Therefore, hardcoding the clock frequency according to the NETC revision in
> the driver is a simple and quick method, just like we did in the enetc driver.
> https://elixir.bootlin.com/linux/v7.3-rc5/source/drivers/net/ethernet/freescale/enetc/enetc.c#L3770

Let me try something better, give me a day or two.

Jakub, do you want a revert of this one, fix, or follow up patch ?