From: Kyle Switch <kyle.switch@motor-comm.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Frank.Sae@motor-comm.com, hkallweit1@gmail.com,
linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, jianmin.wang@motor-comm.com,
ming.xu@motor-comm.com, xiaolin.xu@motor-comm.com,
jie.han@motor-comm.com
Subject: Re: [PATCH] net: phy: Add driver for Motorcomm Quad 2.5GbE phy
Date: Wed, 15 Jul 2026 19:59:55 +0800 [thread overview]
Message-ID: <47b67113-2903-49b5-a25e-84e704ac017d@motor-comm.com> (raw)
In-Reply-To: <46c380a2-74ab-4690-a289-6050cb33c1a4@lunn.ch>
On 7/15/26 05:46, Andrew Lunn wrote:
>> +static inline int ytphy_top_write(struct phy_device *phydev, u32 regnum,
>> + u16 val)
>> +{
>> + struct yt8521_priv *priv = phydev->priv;
>> + struct mii_bus *bus = phydev->mdio.bus;
>> +
>> + return bus->write(bus, priv->top_phy_addr, regnum, val);
>> +}
>
> Please could you explain the architecture in detail. It seems like you
> are accessing registers of some other device on the bus.
>
> Maybe you need to use the code in phy_package.c?
Ans: YT8824 contains top extend reg space, and the addr is fixed, for
internal phy8824 the value is 9, and external phy8824 is (baseaddr + 4).
>
> Andrew
next prev parent reply other threads:[~2026-07-15 12:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-14 11:12 [PATCH] net: phy: Add driver for Motorcomm Quad 2.5GbE phy Kyle Switch
2026-07-14 21:43 ` Andrew Lunn
2026-07-15 11:56 ` Kyle Switch
2026-07-14 21:46 ` Andrew Lunn
2026-07-15 11:59 ` Kyle Switch [this message]
2026-07-15 13:09 ` Andrew Lunn
2026-07-17 3:47 ` Kyle Switch
2026-08-05 12:26 ` kernel test robot
2026-08-05 22:28 ` kernel test robot
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