Re: [PATCH] net: phy: Add driver for Motorcomm Quad 2.5GbE phy

[Kyle Switch <kyle.switch@motor-comm.com>]

On 7/15/26 21:09, Andrew Lunn wrote:
> On Wed, Jul 15, 2026 at 07:59:55PM +0800, Kyle Switch wrote:
>>
>>
>> On 7/15/26 05:46, Andrew Lunn wrote:
>>>> +static inline int ytphy_top_write(struct phy_device *phydev, u32 regnum,
>>>> +				  u16 val)
>>>> +{
>>>> +	struct yt8521_priv *priv = phydev->priv;
>>>> +	struct mii_bus *bus = phydev->mdio.bus;
>>>> +
>>>> +	return bus->write(bus, priv->top_phy_addr, regnum, val);
>>>> +}
>>>
>>> Please could you explain the architecture in detail. It seems like you
>>> are accessing registers of some other device on the bus.
>>>
>>> Maybe you need to use the code in phy_package.c?
>>
>> Ans: YT8824 contains top extend reg space, and the addr is fixed, for 
>> internal phy8824 the value is 9, and external phy8824 is (baseaddr + 4).
> 
> Does the "top extend reg space" have values in the ID registers, 2 and
> 3? Is Linux trying to probe this address space?
> 
> Anyway, it does sound like you need to use phy_package. That will give
> you a better API for accessing the registers in the other address
> space.
> 

Ans: The "top extend reg space" does not have ID register, which is common
      register space shared by UTP and serdes.

> 	Andrew