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From: Mike Marciniszyn <mike.marciniszyn@gmail.com>
To: Paolo Abeni <pabeni@redhat.com>
Cc: Jakub Kicinski <kuba@kernel.org>,
	Alexander Duyck <alexanderduyck@fb.com>,
	kernel-team@meta.com, Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Jacob Keller <jacob.e.keller@intel.com>,
	Mohsin Bashir <mohsin.bashr@gmail.com>,
	Simon Horman <horms@kernel.org>, Lee Trager <lee@trager.us>,
	Andrew Lunn <andrew@lunn.ch>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next v3 1/4] net: eth: fbnic: Fix addr validation in pcs write
Date: Thu, 7 May 2026 09:20:45 -0400	[thread overview]
Message-ID: <afyRrWW8XVeO55Ob@PF5YBGDS.localdomain> (raw)
In-Reply-To: <1cd8256c-286a-4a73-b0a0-89233cb3c2d0@redhat.com>

On Thu, May 07, 2026 at 09:20:53AM +0200, Paolo Abeni wrote:
> On 5/7/26 3:58 AM, Jakub Kicinski wrote:
> > On Mon,  4 May 2026 09:58:12 -0400 mike.marciniszyn@gmail.com wrote:
> >> From: "Mike Marciniszyn (Meta)" <mike.marciniszyn@gmail.com>
> >>
> >> The DW IP has two distinct PCS address ranges cooresponding
> >> to the C45 PCS registers.
> >>
> >> The shim translates the PCS addr/regno into specific CSR writes
> >> into one of those two zero-relative.
> >>
> >> This patch fixes a one off in the test that could allow an invalid
> >> CSR write if an addr == 2 was called.
> >>
> >> This patch contains a fix for addr validation in fbnic_mdio_write_pcs()
> >> to only return actual CSR reads for addr 0 and 1.
> >>
> >> There are as of yet, no real impact for the bug as no PCS writes are
> >> not yet present.
> >
> > Hi Paolo! Was there a reason / do you recall why this was not applied?
> > (I dropped it from patchwork now. If the omission was accidental it has
> > to be reposted)
>
> Darn, limited capacity here plus re-submission glitch: v3 had a slightly
> different cover title (due to typo) WRT v2 so PW did not mark v2 as
> superseded. I process patches via PW in sequence, when I reached v2 I
> considered the sashiko comment not blocking and I apply it. I was unable
> to reach v3 until now.
>
> TL;DR: @Mike: please re-submit 1/4 and double check there are not other
> differences between v2 and v3 - otherwise more patches needed. Also
> please ensure you keep the series title consistent among revision, or at
> least manually remove old revisions from PW upon resubmission.
>
> Thanks,
>
> Paolo
>

I double checked v2 -> v3 for the other patches are ok.

I'm just now resending 1/4 of the series.  I reworded the commit message
to fix the AI review comment.

Mike

  reply	other threads:[~2026-05-07 13:20 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-04 13:58 [PATCH net-next v3 0/4] irst series for xpcs based rsfec configuration mike.marciniszyn
2026-05-04 13:58 ` [PATCH net-next v3 1/4] net: eth: fbnic: Fix addr validation in pcs write mike.marciniszyn
2026-05-07  1:58   ` Jakub Kicinski
2026-05-07  7:20     ` Paolo Abeni
2026-05-07 13:20       ` Mike Marciniszyn [this message]
2026-05-07 13:48         ` Mike Marciniszyn
2026-05-07 13:50           ` Paolo Abeni
2026-05-07 15:58             ` Mike Marciniszyn
2026-05-04 13:58 ` [PATCH net-next v3 2/4] net: mdio: Add support for RSFEC Control register for PMA mike.marciniszyn
2026-05-04 13:58 ` [PATCH net-next v3 3/4] net: eth: fbnic: Consolidate register reads for ids and devs mike.marciniszyn
2026-05-04 13:58 ` [PATCH net-next v3 4/4] net: eth: fbnic: Add pma read and write access mike.marciniszyn
2026-05-05 12:50 ` [PATCH net-next v3 0/4] irst series for xpcs based rsfec configuration patchwork-bot+netdevbpf

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