From: Inochi Amaoto <inochiama@gmail.com>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>,
Inochi Amaoto <inochiama@gmail.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Yixun Lan <dlan@kernel.org>,
"Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, Yixun Lan <dlan@gentoo.org>,
Longbin Li <looong.bin@gmail.com>
Subject: Re: [PATCH net] net: stmmac: dwmac-spacemit: Fix wrong ctrl register definition
Date: Thu, 18 Jun 2026 15:12:58 +0800 [thread overview]
Message-ID: <ajOZnO_dFg20VnEc@inochi.infowork> (raw)
In-Reply-To: <9b39829d-92b4-4ffa-be0b-b2b0f857f58e@bootlin.com>
On Thu, Jun 18, 2026 at 09:03:21AM +0200, Maxime Chevallier wrote:
> Hi Inochi,
>
> On 6/18/26 08:41, Inochi Amaoto wrote:
> > There register layout of the phy ctrl register has something wrong,
> > fix it to match the right layout
> >
> > Fixes: 30f0ba420ed3 ("net: stmmac: Add glue layer for Spacemit K3 SoC")
> > Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> > ---
> > .../net/ethernet/stmicro/stmmac/dwmac-spacemit.c | 13 ++++++++-----
> > 1 file changed, 8 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
> > index 223754cc5c79..6feffaa3ef3a 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
> > @@ -18,10 +18,12 @@
> > #include "stmmac_platform.h"
> >
> > /* ctrl register bits */
> > -#define CTRL_PHY_INTF_RGMII BIT(3)
> > -#define CTRL_PHY_INTF_MII BIT(4)
> > -#define CTRL_WAKE_IRQ_EN BIT(9)
> > -#define CTRL_PHY_IRQ_EN BIT(12)
> > +#define CTRL_PHY_INTF_MODE GENMASK(4, 3)
> > +#define CTRL_PHY_INTF_RMII FIELD_PREP(CTRL_PHY_INTF_MODE, 0)
> > +#define CTRL_PHY_INTF_RGMII FIELD_PREP(CTRL_PHY_INTF_MODE, 1)
> > +#define CTRL_PHY_INTF_MII FIELD_PREP(CTRL_PHY_INTF_MODE, 3)
> > +#define CTRL_PHY_IRQ_EN BIT(9)
> > +#define CTRL_WAKE_IRQ_EN BIT(12)
>
> Looks like you're fixing 2 things there :
>
> -> Wake on Lan probably didn't work before, as the wake irq was apparently wrong.
I guess the vendor firmware and uboot may do something for it,
but the irq is wrong actually.
> -> The MII mode selection apparently also changes, but maybe you don't have a
> MII board around to test this ?
>
Actually, the only board of the K3 is the pico-itx board, and it only has
a RGMII phy. I even doube the spacemit vendor has not tested the MII phy
well....
> Is it possible you address these issues independently (i.e. split this in 2 patches) ?
> That way, if we ever revert one, we won't re-break the other thing that was broken.
>
>
Yes, it is fine for me to split it. I will send it in a few days.
Regards,
Inochi
prev parent reply other threads:[~2026-06-18 7:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-18 6:41 [PATCH net] net: stmmac: dwmac-spacemit: Fix wrong ctrl register definition Inochi Amaoto
2026-06-18 7:03 ` Maxime Chevallier
2026-06-18 7:12 ` Inochi Amaoto [this message]
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