Re: [PATCH 2/3] arm64: dts: socfpga: agilex5: Add SoCDK TSN Config2 board

["Nazle Asmade, Muhammad Nazim Amirul" <muhammad.nazim.amirul.nazle.asmade@altera.com>]

On 2/7/2026 3:17 pm, Krzysztof Kozlowski wrote:
> On Tue, Jun 30, 2026 at 06:31:07AM -0700, muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
>> From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
>>
>> Add device tree for the Intel SoCFPGA Agilex5 SoCDK TSN Config2 board
>> variant. This configuration enables gmac1 as a TSN port alongside
>> the standard gmac2 Ethernet port.
>>
>> The TSN port (gmac1) uses GMII internally in the MAC but connects to an
>> RGMII PHY. The mac-mode property is set to "gmii" to reflect the
>> MAC-side interface, while phy-mode is set to "rgmii" for the PHY-side
>> interface.
>>
>> Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
>> ---
>>   arch/arm64/boot/dts/intel/Makefile            |   3 +-
>>   .../intel/socfpga_agilex5_socdk_tsn_cfg2.dts  | 133 ++++++++++++++++++
>>   2 files changed, 135 insertions(+), 1 deletion(-)
>>   create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_tsn_cfg2.dts
>>
>> diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
>> index 270c70fdf084..fc7ba2c6384b 100644
>> --- a/arch/arm64/boot/dts/intel/Makefile
>> +++ b/arch/arm64/boot/dts/intel/Makefile
>> @@ -4,10 +4,11 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
>>   				socfpga_agilex_socdk_emmc.dtb \
>>   				socfpga_agilex_socdk_nand.dtb \
>>   				socfpga_agilex3_socdk.dtb \
>> -				socfpga_agilex5_socdk.dtb \
>> +			socfpga_agilex5_socdk.dtb \
> 
> Why are you making this change?
Hi Krzysztof,
Thank you for catching this. I did not intend to make this change — the 
indentation on the socfpga_agilex5_socdk.dtb line was accidentally 
modified during patch preparation. It should retain its original 
indentation. I will fix this in v2.
> 
>>   				socfpga_agilex5_socdk_013b.dtb \
>>   				socfpga_agilex5_socdk_modular.dtb \
>>   				socfpga_agilex5_socdk_nand.dtb \
>> +				socfpga_agilex5_socdk_tsn_cfg2.dtb \
>>   				socfpga_agilex72_socdk.dtb \
>>   				socfpga_agilex7m_socdk.dtb \
>>   				socfpga_n5x_socdk.dtb
> 
> Best regards,
> Krzysztof
> 

BR,
Nazim