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From: Krzysztof Halasa <khc@pm.waw.pl>
To: "Miguel Ángel Álvarez" <gotzoncabanes@gmail.com>
Cc: netdev@vger.kernel.org
Subject: Re: qmgr for ixp4xx
Date: Wed, 10 Dec 2008 01:56:25 +0100	[thread overview]
Message-ID: <m3fxkwvoee.fsf@maximus.localdomain> (raw)
In-Reply-To: <b0438a630812090148u4c42a193q833c913a1a27e0a9@mail.gmail.com> ("Miguel Ángel Álvarez"'s message of "Tue\, 9 Dec 2008 10\:48\:03 +0100")

"Miguel Ángel Álvarez" <gotzoncabanes@gmail.com> writes:

> Sure... But in case you are not using ethernet in the NPEA (most
> likely if you are using HSS),

I'm not sure but it may be true.
The docs say things about "6 ports" but AFAIK there are 3 physical
ports. For now I don't have anything 465-bases so I care a bit less
than for 425.

> ethernet only takes one common queue
> (TXDONE = 31). The rest of the queues seem to be NPE dependent.

Some numbers are fixed in software (like most of the Ethernet's
excluding "txready" which is a driver-only thing, and as Christian
writes, a couple of queues for crypto). Some are configurable (like RX
Ethernet queues, up to 8 per port with (not unused currently) QoS
"acceleration").

> At
> least that was what I thought, but if I change rxq and txreadyq for
> ethernet in ixdp425-setup.c and give them the values 0x103, 0x114 for
> NPEB and 0x203, 0x214 for NPEC they also interfere with the queues for
> HSS (for not 0 hdlcs...).

The range is 0-31 (0-0x1F). There are (not yet supported) queues 32-64
(0x20-0x3F) with a bit more limited functionality. We certainly need
them, too.

And the on-chip SRAM region in which the queues exist is limited, too.

> So... Do we have 32 queues for NPE, or some of them are common for all
> NPEs? In the first case it could be possible to work with 32 queues in
> most of the situations... if not, 64-queue patch seems to be required
> (where can I find last version of it? I just found one which is
> heavily critizised by you, Krzysztof).

It's this one. It wasn't "heavily criticized", though. I didn't like
many tiny bits but generally it is a good work.

We have 64 queues for all ports, processes etc combined.
You may want to see Intel's docs, for instance their IXP42X
development manual (the queues are explained in section 21, "AHB Queue
Manager (AQM)).
-- 
Krzysztof Halasa

  reply	other threads:[~2008-12-10  0:56 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-12-02 18:44 qmgr for ixp4xx Miguel Ángel Álvarez
2008-12-04 21:06 ` Krzysztof Halasa
2008-12-05  8:51   ` Miguel Ángel Álvarez
2008-12-05 16:03     ` Krzysztof Halasa
2008-12-05 16:59       ` Miguel Ángel Álvarez
2008-12-05 18:29         ` Krzysztof Halasa
2008-12-09  9:48           ` Miguel Ángel Álvarez
2008-12-10  0:56             ` Krzysztof Halasa [this message]
2008-12-10  9:04               ` Miguel Ángel Álvarez
2008-12-10 16:32                 ` Miguel Ángel Álvarez
2008-12-09 16:44           ` Christian Hohnstaedt
2008-12-10  8:48             ` Miguel Ángel Álvarez

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