* Re: [IPv6] Add v4mapped address inline
From: David Miller @ 2007-08-25 6:16 UTC (permalink / raw)
To: brian.haley; +Cc: yoshfuji, netdev, lksctp-developers
In-Reply-To: <46CDCE8B.6010909@hp.com>
From: Brian Haley <brian.haley@hp.com>
Date: Thu, 23 Aug 2007 14:14:35 -0400
> YOSHIFUJI Hideaki / ???? wrote:
> > Please put this just after ipv6_addr_any(), not after
> > ipv6_addr_diff().
>
> Ok, updated patch attached.
>
> Add v4mapped address inline to avoid calls to ipv6_addr_type().
>
> Signed-off-by: Brian Haley <brian.haley@hp.com>
Applied, thanks Brian.
^ permalink raw reply
* Re: [PATCH 16/30] net: Avoid pointless allocation casts in BSD compression module
From: David Miller @ 2007-08-25 6:25 UTC (permalink / raw)
To: jesper.juhl; +Cc: linux-kernel, netdev
In-Reply-To: <fd58f69b12c07872b351261199f3c677c6786f06.1187912217.git.jesper.juhl@gmail.com>
From: Jesper Juhl <jesper.juhl@gmail.com>
Date: Fri, 24 Aug 2007 02:06:58 +0200
> The general kernel memory allocation functions return void pointers
> and there is no need to cast their return values.
>
> Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Applied.
^ permalink raw reply
* Re: [PATCH] [XFRM] : Fix pointer copy size for encap_tmpl and coaddr.
From: David Miller @ 2007-08-25 6:30 UTC (permalink / raw)
To: nakam; +Cc: tgraf, netdev
In-Reply-To: <11879499202750-git-send-email-nakam@linux-ipv6.org>
From: Masahide NAKAMURA <nakam@linux-ipv6.org>
Date: Fri, 24 Aug 2007 19:05:20 +0900
> This is minor fix about sizeof argument using with kmemdup().
>
> Signed-off-by: Masahide NAKAMURA <nakam@linux-ipv6.org>
Patch applied, thank you!
^ permalink raw reply
* Re: [PATCH] [IPV6] XFRM: Fix connected socket to use transformation.
From: David Miller @ 2007-08-25 6:31 UTC (permalink / raw)
To: nakam; +Cc: netdev, takamiya
In-Reply-To: <118795011877-git-send-email-nakam@linux-ipv6.org>
From: Masahide NAKAMURA <nakam@linux-ipv6.org>
Date: Fri, 24 Aug 2007 19:08:38 +0900
> When XFRM policy and state are ready after TCP connection is started,
> the traffic should be transformed immediately, however it does not
> on IPv6 TCP.
>
> It depends on a dst cache replacement policy with connected socket.
> It seems that the replacement is always done for IPv4, however, on
> IPv6 case it is done only when routing cookie is changed.
>
> This patch fix that non-transformation dst can be changed to
> transformation one.
> This behavior is required by MIPv6 and improves IPv6 IPsec.
>
> Signed-off-by: Noriaki TAKAMIYA <takamiya@po.ntts.co.jp>
> Signed-off-by: Masahide NAKAMURA <nakam@linux-ipv6.org>
Applied to net-2.6.24, thank you!
^ permalink raw reply
* Re: [PATCH 2.6.23 RESEND] cxgb3 - Fix dev->priv usage
From: Jeff Garzik @ 2007-08-25 6:31 UTC (permalink / raw)
To: Divy Le Ray; +Cc: netdev, linux-kernel, swise
In-Reply-To: <46CFA8E8.90101@garzik.org>
Jeff Garzik wrote:
> Divy Le Ray wrote:
>> From: Divy Le Ray <divy@chelsio.com>
>>
>> cxgb3 used netdev_priv() and dev->priv for different purposes.
>> In 2.6.23, netdev_priv() == dev->priv, cxgb3 needs a fix.
>> This patch is a partial backport of Dave Miller's changes in the
>> net-2.6.24 git branch.
>> Without this fix, cxgb3 crashes on 2.6.23.
>>
>> Signed-off-by: Divy Le Ray <divy@chelsio.com>
>> ---
>>
>> drivers/net/cxgb3/adapter.h | 10 +++
>> drivers/net/cxgb3/cxgb3_main.c | 126
>> +++++++++++++++++++++----------------
>> drivers/net/cxgb3/cxgb3_offload.c | 6 +-
>> drivers/net/cxgb3/sge.c | 23 ++++---
>> drivers/net/cxgb3/t3cdev.h | 3 -
>> 5 files changed, 100 insertions(+), 68 deletions(-)
>>
>
> applied
I take that back. Rejected -- it breaks infiniband build.
^ permalink raw reply
* Re: [PATCH 1/2] [IPV6] IPSEC: Omit redirect for tunnelled packet.
From: David Miller @ 2007-08-25 6:32 UTC (permalink / raw)
To: nakam; +Cc: netdev
In-Reply-To: <11879501353034-git-send-email-nakam@linux-ipv6.org>
From: Masahide NAKAMURA <nakam@linux-ipv6.org>
Date: Fri, 24 Aug 2007 19:08:55 +0900
> IPv6 IPsec tunnel gateway incorrectly sends redirect to
> router or sender when network device the IPsec tunnelled packet
> is arrived is the same as the one the decapsulated packet
> is sent.
>
> With this patch, it omits to send the redirect when the forwarding
> skbuff carries secpath, since such skbuff should be assumed as
> a decapsulated packet from IPsec tunnel by own.
>
> It may be a rare case for an IPsec security gateway, however
> it is not rare when the gateway is MIPv6 Home Agent since
> the another tunnel end-point is Mobile Node and it changes
> the attached network.
>
> Signed-off-by: Masahide NAKAMURA <nakam@linux-ipv6.org>
Patch applied, thanks.
^ permalink raw reply
* Re: [PATCH 2/2] [IPV4] IPSEC: Omit redirect for tunnelled packet.
From: David Miller @ 2007-08-25 6:33 UTC (permalink / raw)
To: nakam; +Cc: netdev
In-Reply-To: <11879501412786-git-send-email-nakam@linux-ipv6.org>
From: Masahide NAKAMURA <nakam@linux-ipv6.org>
Date: Fri, 24 Aug 2007 19:09:01 +0900
> IPv4 IPsec tunnel gateway incorrectly sends redirect to
> sender if it is onlink host when network device the IPsec tunnelled
> packet is arrived is the same as the one the decapsulated packet
> is sent.
>
> With this patch, it omits to send the redirect when the forwarding
> skbuff carries secpath, since such skbuff should be assumed as
> a decapsulated packet from IPsec tunnel by own.
>
> Request for comments:
> Alternatively we'd have another way to change net/ipv4/route.c
> (__mkroute_input) to use RTCF_DOREDIRECT flag unless skbuff
> has no secpath. It is better than this patch at performance
> point of view because IPv4 redirect judgement is done at
> routing slow-path. However, it should be taken care of resource
> changes between SAD(XFRM states) and routing table. In other words,
> When IPv4 SAD is changed does the related routing entry go to its
> slow-path? If not, it is reasonable to apply this patch.
>
> Signed-off-by: Masahide NAKAMURA <nakam@linux-ipv6.org>
Also applied, thank you!
^ permalink raw reply
* Re: Please pull 'upstream-jgarzik' branch of wireless-2.6
From: Jeff Garzik @ 2007-08-25 6:40 UTC (permalink / raw)
To: John W. Linville
Cc: linux-wireless-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20070815003637.GK7198-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org>
John W. Linville wrote:
> A few items intended for 2.6.24.
>
> Individual patches here:
>
> http://www.kernel.org/pub/linux/kernel/people/linville/wireless-2.6/upstream-jgarzik/
>
> Thanks!
>
> John
>
> ---
>
> The following changes since commit 39d3520c92cf7a28c07229ca00cc35a1e8026c77:
> Linus Torvalds (1):
> Linux 2.6.23-rc3
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-2.6.git upstream-jgarzik
>
> Daniel Drake (2):
> zd1211rw: Add ID for Sitecom WL-162
> zd1211rw: Add ID for ZyXEL M-202 XtremeMIMO
>
> Mariusz Kozlowski (1):
> drivers/net/wireless/wl3501_cs.c: remove redundant memset
>
> Ulrich Kunitz (2):
> zd1211rw: removed noisy debug messages
> zd1211rw: consistent handling of ZD1211 specific rates
>
> drivers/net/wireless/wl3501_cs.c | 1 -
> drivers/net/wireless/zd1211rw/zd_chip.c | 69 +++++++-----------
> drivers/net/wireless/zd1211rw/zd_ieee80211.h | 43 +++++++----
> drivers/net/wireless/zd1211rw/zd_mac.c | 99 +++++++-------------------
> drivers/net/wireless/zd1211rw/zd_mac.h | 65 +++++++++++------
> drivers/net/wireless/zd1211rw/zd_usb.c | 2 +
> 6 files changed, 128 insertions(+), 151 deletions(-)
pulled
^ permalink raw reply
* Re: [PATCH 1/3] e1000e: retire last_tx_tso workaround
From: Jeff Garzik @ 2007-08-25 7:49 UTC (permalink / raw)
To: Auke Kok; +Cc: netdev, john.ronciak, akpm
In-Reply-To: <20070822150839.19918.86665.stgit@localhost.localdomain>
Auke Kok wrote:
> This TSO-related workaround is no longer needed since it's only
> applicable for 8254x silicon.
>
> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
> ---
>
> drivers/net/e1000e/e1000.h | 15 +++------------
> drivers/net/e1000e/netdev.c | 20 ++------------------
> 2 files changed, 5 insertions(+), 30 deletions(-)
applied 1-3 to #e1000e
^ permalink raw reply
* [git patches] net driver fixes
From: Jeff Garzik @ 2007-08-25 7:51 UTC (permalink / raw)
To: Andrew Morton, Linus Torvalds; +Cc: netdev, LKML
Please pull from 'upstream-linus' branch of
master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6.git upstream-linus
to receive the following updates:
drivers/net/dm9000.c | 25 ++++-----------
drivers/net/ehea/ehea_main.c | 8 ++--
drivers/net/ehea/ehea_qmr.c | 6 ++++
drivers/net/forcedeth.c | 2 +-
drivers/net/meth.c | 2 +-
drivers/net/myri10ge/myri10ge.c | 34 ++++----------------
drivers/net/phy/phy_device.c | 2 +-
drivers/net/sgiseeq.c | 4 ++-
drivers/net/sky2.c | 64 +++++++++++++++++++-------------------
drivers/net/sky2.h | 3 +-
10 files changed, 64 insertions(+), 86 deletions(-)
Brice Goglin (2):
myri10ge: use pcie_get/set_readrq
myri10ge: update driver version to 1.3.2-1.269
Domen Puncer (1):
phy layer: fix genphy_setup_forced (don't reset)
Florian Westphal (1):
DM9000: fix interface hang under load
Jan-Bernd Themann (3):
ehea: fix interface to DLPAR tools
ehea: fix module parameter description
ehea: fix queue destructor
Ralf Baechle (2):
Don't use GFP_DMA for zone allocation.
sgiseeq: Fix return type of sgiseeq_remove
Stephen Hemminger (3):
sky2: clear PCI power control reg at startup
sky2: only bring up watchdog if link is active
sky2 1.17
Willy Tarreau (1):
fix realtek phy id in forcedeth
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
index c3de81b..738aa59 100644
--- a/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
@@ -700,6 +700,7 @@ dm9000_init_dm9000(struct net_device *dev)
static int
dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
+ unsigned long flags;
board_info_t *db = (board_info_t *) dev->priv;
PRINTK3("dm9000_start_xmit\n");
@@ -707,10 +708,7 @@ dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
if (db->tx_pkt_cnt > 1)
return 1;
- netif_stop_queue(dev);
-
- /* Disable all interrupts */
- iow(db, DM9000_IMR, IMR_PAR);
+ spin_lock_irqsave(&db->lock, flags);
/* Move data to DM9000 TX RAM */
writeb(DM9000_MWCMD, db->io_addr);
@@ -718,12 +716,9 @@ dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
(db->outblk)(db->io_data, skb->data, skb->len);
db->stats.tx_bytes += skb->len;
+ db->tx_pkt_cnt++;
/* TX control: First packet immediately send, second packet queue */
- if (db->tx_pkt_cnt == 0) {
-
- /* First Packet */
- db->tx_pkt_cnt++;
-
+ if (db->tx_pkt_cnt == 1) {
/* Set TX length to DM9000 */
iow(db, DM9000_TXPLL, skb->len & 0xff);
iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
@@ -732,23 +727,17 @@ dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
dev->trans_start = jiffies; /* save the time stamp */
-
} else {
/* Second packet */
- db->tx_pkt_cnt++;
db->queue_pkt_len = skb->len;
+ netif_stop_queue(dev);
}
+ spin_unlock_irqrestore(&db->lock, flags);
+
/* free this SKB */
dev_kfree_skb(skb);
- /* Re-enable resource check */
- if (db->tx_pkt_cnt == 1)
- netif_wake_queue(dev);
-
- /* Re-enable interrupt */
- iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
-
return 0;
}
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c
index 9756211..db57474 100644
--- a/drivers/net/ehea/ehea_main.c
+++ b/drivers/net/ehea/ehea_main.c
@@ -76,7 +76,7 @@ MODULE_PARM_DESC(rq1_entries, "Number of entries for Receive Queue 1 "
MODULE_PARM_DESC(sq_entries, " Number of entries for the Send Queue "
"[2^x - 1], x = [6..14]. Default = "
__MODULE_STRING(EHEA_DEF_ENTRIES_SQ) ")");
-MODULE_PARM_DESC(use_mcs, " 0:NAPI, 1:Multiple receive queues, Default = 1 ");
+MODULE_PARM_DESC(use_mcs, " 0:NAPI, 1:Multiple receive queues, Default = 0 ");
static int port_name_cnt = 0;
static LIST_HEAD(adapter_list);
@@ -2490,7 +2490,7 @@ static ssize_t ehea_show_port_id(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct ehea_port *port = container_of(dev, struct ehea_port, ofdev.dev);
- return sprintf(buf, "0x%X", port->logical_port_id);
+ return sprintf(buf, "%d", port->logical_port_id);
}
static DEVICE_ATTR(log_port_id, S_IRUSR | S_IRGRP | S_IROTH, ehea_show_port_id,
@@ -2781,7 +2781,7 @@ static ssize_t ehea_probe_port(struct device *dev,
u32 logical_port_id;
- sscanf(buf, "%X", &logical_port_id);
+ sscanf(buf, "%d", &logical_port_id);
port = ehea_get_port(adapter, logical_port_id);
@@ -2834,7 +2834,7 @@ static ssize_t ehea_remove_port(struct device *dev,
int i;
u32 logical_port_id;
- sscanf(buf, "%X", &logical_port_id);
+ sscanf(buf, "%d", &logical_port_id);
port = ehea_get_port(adapter, logical_port_id);
diff --git a/drivers/net/ehea/ehea_qmr.c b/drivers/net/ehea/ehea_qmr.c
index a36fa6c..c82e245 100644
--- a/drivers/net/ehea/ehea_qmr.c
+++ b/drivers/net/ehea/ehea_qmr.c
@@ -235,6 +235,8 @@ int ehea_destroy_cq(struct ehea_cq *cq)
if (!cq)
return 0;
+ hcp_epas_dtor(&cq->epas);
+
if ((hret = ehea_destroy_cq_res(cq, NORMAL_FREE)) == H_R_STATE) {
ehea_error_data(cq->adapter, cq->fw_handle);
hret = ehea_destroy_cq_res(cq, FORCE_FREE);
@@ -361,6 +363,8 @@ int ehea_destroy_eq(struct ehea_eq *eq)
if (!eq)
return 0;
+ hcp_epas_dtor(&eq->epas);
+
if ((hret = ehea_destroy_eq_res(eq, NORMAL_FREE)) == H_R_STATE) {
ehea_error_data(eq->adapter, eq->fw_handle);
hret = ehea_destroy_eq_res(eq, FORCE_FREE);
@@ -541,6 +545,8 @@ int ehea_destroy_qp(struct ehea_qp *qp)
if (!qp)
return 0;
+ hcp_epas_dtor(&qp->epas);
+
if ((hret = ehea_destroy_qp_res(qp, NORMAL_FREE)) == H_R_STATE) {
ehea_error_data(qp->adapter, qp->fw_handle);
hret = ehea_destroy_qp_res(qp, FORCE_FREE);
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 10f4e3b..1938d6d 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -552,7 +552,7 @@ union ring_type {
#define PHY_OUI_MARVELL 0x5043
#define PHY_OUI_CICADA 0x03f1
#define PHY_OUI_VITESSE 0x01c1
-#define PHY_OUI_REALTEK 0x01c1
+#define PHY_OUI_REALTEK 0x0732
#define PHYID1_OUI_MASK 0x03ff
#define PHYID1_OUI_SHFT 6
#define PHYID2_OUI_MASK 0xfc00
diff --git a/drivers/net/meth.c b/drivers/net/meth.c
index 92b403b..32bed6b 100644
--- a/drivers/net/meth.c
+++ b/drivers/net/meth.c
@@ -405,7 +405,7 @@ static void meth_rx(struct net_device* dev, unsigned long int_status)
priv->stats.rx_length_errors++;
skb = priv->rx_skbs[priv->rx_write];
} else {
- skb = alloc_skb(METH_RX_BUFF_SIZE, GFP_ATOMIC | GFP_DMA);
+ skb = alloc_skb(METH_RX_BUFF_SIZE, GFP_ATOMIC);
if (!skb) {
/* Ouch! No memory! Drop packet on the floor */
DPRINTK("No mem: dropping packet\n");
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index ae9bb7b..1c42266 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -72,7 +72,7 @@
#include "myri10ge_mcp.h"
#include "myri10ge_mcp_gen_header.h"
-#define MYRI10GE_VERSION_STR "1.3.1-1.248"
+#define MYRI10GE_VERSION_STR "1.3.2-1.269"
MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
MODULE_AUTHOR("Maintainer: help@myri.com");
@@ -2514,26 +2514,20 @@ static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
{
struct pci_dev *pdev = mgp->pdev;
struct device *dev = &pdev->dev;
- int cap, status;
- u16 val;
+ int status;
mgp->tx.boundary = 4096;
/*
* Verify the max read request size was set to 4KB
* before trying the test with 4KB.
*/
- cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
- if (cap < 64) {
- dev_err(dev, "Bad PCI_CAP_ID_EXP location %d\n", cap);
- goto abort;
- }
- status = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &val);
- if (status != 0) {
+ status = pcie_get_readrq(pdev);
+ if (status < 0) {
dev_err(dev, "Couldn't read max read req size: %d\n", status);
goto abort;
}
- if ((val & (5 << 12)) != (5 << 12)) {
- dev_warn(dev, "Max Read Request size != 4096 (0x%x)\n", val);
+ if (status != 4096) {
+ dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
mgp->tx.boundary = 2048;
}
/*
@@ -2850,9 +2844,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
size_t bytes;
int i;
int status = -ENXIO;
- int cap;
int dac_enabled;
- u16 val;
netdev = alloc_etherdev(sizeof(*mgp));
if (netdev == NULL) {
@@ -2884,19 +2876,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
= pci_find_capability(pdev, PCI_CAP_ID_VNDR);
/* Set our max read request to 4KB */
- cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
- if (cap < 64) {
- dev_err(&pdev->dev, "Bad PCI_CAP_ID_EXP location %d\n", cap);
- goto abort_with_netdev;
- }
- status = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &val);
- if (status != 0) {
- dev_err(&pdev->dev, "Error %d reading PCI_EXP_DEVCTL\n",
- status);
- goto abort_with_netdev;
- }
- val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
- status = pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, val);
+ status = pcie_set_readrq(pdev, 4096);
if (status != 0) {
dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
status);
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index a8b74cd..e275df8 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -364,7 +364,7 @@ EXPORT_SYMBOL(genphy_config_advert);
*/
int genphy_setup_forced(struct phy_device *phydev)
{
- int ctl = BMCR_RESET;
+ int ctl = 0;
phydev->pause = phydev->asym_pause = 0;
diff --git a/drivers/net/sgiseeq.c b/drivers/net/sgiseeq.c
index 384b468..0fb74cb 100644
--- a/drivers/net/sgiseeq.c
+++ b/drivers/net/sgiseeq.c
@@ -726,7 +726,7 @@ err_out:
return err;
}
-static void __exit sgiseeq_remove(struct platform_device *pdev)
+static int __exit sgiseeq_remove(struct platform_device *pdev)
{
struct net_device *dev = platform_get_drvdata(pdev);
struct sgiseeq_private *sp = netdev_priv(dev);
@@ -735,6 +735,8 @@ static void __exit sgiseeq_remove(struct platform_device *pdev)
free_page((unsigned long) sp->srings);
free_netdev(dev);
platform_set_drvdata(pdev, NULL);
+
+ return 0;
}
static struct platform_driver sgiseeq_driver = {
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 7575924..e6d937e 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -51,7 +51,7 @@
#include "sky2.h"
#define DRV_NAME "sky2"
-#define DRV_VERSION "1.16"
+#define DRV_VERSION "1.17"
#define PFX DRV_NAME " "
/*
@@ -99,10 +99,6 @@ static int disable_msi = 0;
module_param(disable_msi, int, 0);
MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
-static int idle_timeout = 100;
-module_param(idle_timeout, int, 0);
-MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)");
-
static const struct pci_device_id sky2_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
{ PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
@@ -219,9 +215,12 @@ static void sky2_power_on(struct sky2_hw *hw)
else
sky2_write8(hw, B2_Y2_CLK_GATE, 0);
- if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX) {
+ if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
+ hw->chip_id == CHIP_ID_YUKON_EX) {
u32 reg;
+ sky2_pci_write32(hw, PCI_DEV_REG3, 0);
+
reg = sky2_pci_read32(hw, PCI_DEV_REG4);
/* set all bits to 0 except bits 15..12 and 8 */
reg &= P_ASPM_CONTROL_MSK;
@@ -238,6 +237,8 @@ static void sky2_power_on(struct sky2_hw *hw)
reg = sky2_read32(hw, B2_GP_IO);
reg |= GLB_GPIO_STAT_RACE_DIS;
sky2_write32(hw, B2_GP_IO, reg);
+
+ sky2_read32(hw, B2_GP_IO);
}
}
@@ -1619,6 +1620,9 @@ static int sky2_down(struct net_device *dev)
if (netif_msg_ifdown(sky2))
printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
+ if (netif_carrier_ok(dev) && --hw->active == 0)
+ del_timer(&hw->watchdog_timer);
+
/* Stop more packets from being queued */
netif_stop_queue(dev);
@@ -1739,6 +1743,10 @@ static void sky2_link_up(struct sky2_port *sky2)
netif_carrier_on(sky2->netdev);
+ if (hw->active++ == 0)
+ mod_timer(&hw->watchdog_timer, jiffies + 1);
+
+
/* Turn on link LED */
sky2_write8(hw, SK_REG(port, LNK_LED_REG),
LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
@@ -1790,6 +1798,11 @@ static void sky2_link_down(struct sky2_port *sky2)
netif_carrier_off(sky2->netdev);
+ /* Stop watchdog if both ports are not active */
+ if (--hw->active == 0)
+ del_timer(&hw->watchdog_timer);
+
+
/* Turn on link LED */
sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
@@ -2421,25 +2434,20 @@ static void sky2_le_error(struct sky2_hw *hw, unsigned port,
sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
}
-/* If idle then force a fake soft NAPI poll once a second
- * to work around cases where sharing an edge triggered interrupt.
- */
-static inline void sky2_idle_start(struct sky2_hw *hw)
-{
- if (idle_timeout > 0)
- mod_timer(&hw->idle_timer,
- jiffies + msecs_to_jiffies(idle_timeout));
-}
-
-static void sky2_idle(unsigned long arg)
+/* Check for lost IRQ once a second */
+static void sky2_watchdog(unsigned long arg)
{
struct sky2_hw *hw = (struct sky2_hw *) arg;
- struct net_device *dev = hw->dev[0];
- if (__netif_rx_schedule_prep(dev))
- __netif_rx_schedule(dev);
+ if (sky2_read32(hw, B0_ISRC)) {
+ struct net_device *dev = hw->dev[0];
+
+ if (__netif_rx_schedule_prep(dev))
+ __netif_rx_schedule(dev);
+ }
- mod_timer(&hw->idle_timer, jiffies + msecs_to_jiffies(idle_timeout));
+ if (hw->active > 0)
+ mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
}
/* Hardware/software error handling */
@@ -2727,8 +2735,6 @@ static void sky2_restart(struct work_struct *work)
struct net_device *dev;
int i, err;
- del_timer_sync(&hw->idle_timer);
-
rtnl_lock();
sky2_write32(hw, B0_IMSK, 0);
sky2_read32(hw, B0_IMSK);
@@ -2757,8 +2763,6 @@ static void sky2_restart(struct work_struct *work)
}
}
- sky2_idle_start(hw);
-
rtnl_unlock();
}
@@ -4025,11 +4029,9 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
sky2_show_addr(dev1);
}
- setup_timer(&hw->idle_timer, sky2_idle, (unsigned long) hw);
+ setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
INIT_WORK(&hw->restart_work, sky2_restart);
- sky2_idle_start(hw);
-
pci_set_drvdata(pdev, hw);
return 0;
@@ -4064,7 +4066,7 @@ static void __devexit sky2_remove(struct pci_dev *pdev)
if (!hw)
return;
- del_timer_sync(&hw->idle_timer);
+ del_timer_sync(&hw->watchdog_timer);
flush_scheduled_work();
@@ -4108,7 +4110,6 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
if (!hw)
return 0;
- del_timer_sync(&hw->idle_timer);
netif_poll_disable(hw->dev[0]);
for (i = 0; i < hw->ports; i++) {
@@ -4174,7 +4175,7 @@ static int sky2_resume(struct pci_dev *pdev)
}
netif_poll_enable(hw->dev[0]);
- sky2_idle_start(hw);
+
return 0;
out:
dev_err(&pdev->dev, "resume failed (%d)\n", err);
@@ -4191,7 +4192,6 @@ static void sky2_shutdown(struct pci_dev *pdev)
if (!hw)
return;
- del_timer_sync(&hw->idle_timer);
netif_poll_disable(hw->dev[0]);
for (i = 0; i < hw->ports; i++) {
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index dce4d27..72e12b7 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -2045,12 +2045,13 @@ struct sky2_hw {
u8 chip_rev;
u8 pmd_type;
u8 ports;
+ u8 active;
struct sky2_status_le *st_le;
u32 st_idx;
dma_addr_t st_dma;
- struct timer_list idle_timer;
+ struct timer_list watchdog_timer;
struct work_struct restart_work;
int msi;
wait_queue_head_t msi_wait;
^ permalink raw reply related
* [PATCH 1/4] Net: ath5k, comment some EEPROM registers
From: Jiri Slaby @ 2007-08-25 7:57 UTC (permalink / raw)
To: linville-2XuSBdqkA4R54TAoqtyWWQ
Cc: Andrew Morton, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA
ath5k, comment some EEPROM registers
make some registers meaning clear
Signed-off-by: Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: <linville-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org>
---
commit 06615d9cdf1ae777821dfcd7845c72c38ff14ffa
tree d0c4b9ded4aa541e003b6855e9bde072e01b631d
parent 069bfbe93facb3468f579568434d18f1268a487c
author Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:18:19 +0200
committer Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:18:19 +0200
drivers/net/wireless/ath5k_hw.c | 4 +
drivers/net/wireless/ath5k_reg.h | 114 +++++++++++++++++++++-----------------
2 files changed, 65 insertions(+), 53 deletions(-)
diff --git a/drivers/net/wireless/ath5k_hw.c b/drivers/net/wireless/ath5k_hw.c
index f273c42..4375129 100644
--- a/drivers/net/wireless/ath5k_hw.c
+++ b/drivers/net/wireless/ath5k_hw.c
@@ -344,7 +344,7 @@ struct ath_hw *ath5k_hw_attach(u16 device, u8 mac_version, void *sc,
/*
* Set the mac revision based on the pci id
*/
- hal->ah_version = mac_version;
+ hal->ah_version = mac_version;
/*Fill the hal struct with the needed functions*/
if (hal->ah_version == AR5K_AR5212)
@@ -4636,6 +4636,8 @@ static int ath5k_hw_channel(struct ath_hw *hal,
/*
* Perform a PHY calibration on RF5110
+ * -Fix BPSK/QAM Constellation (I/Q correction)
+ * -Calculate Noise Floor
*/
static int ath5k_hw_rf5110_calibrate(struct ath_hw *hal,
struct ieee80211_channel *channel)
diff --git a/drivers/net/wireless/ath5k_reg.h b/drivers/net/wireless/ath5k_reg.h
index 59547d1..c6142d2 100644
--- a/drivers/net/wireless/ath5k_reg.h
+++ b/drivers/net/wireless/ath5k_reg.h
@@ -920,63 +920,65 @@
#define AR5K_EEPROM_BASE 0x6000
/*
- * Common ar5xxx EEPROM data offset (set these on AR5K_EEPROM_BASE)
+ * Common ar5xxx EEPROM data offsets (set these on AR5K_EEPROM_BASE)
*/
-#define AR5K_EEPROM_MAGIC 0x003d
-#define AR5K_EEPROM_MAGIC_VALUE 0x5aa5
+#define AR5K_EEPROM_MAGIC 0x003d /* EEPROM Magic number */
+#define AR5K_EEPROM_MAGIC_VALUE 0x5aa5 /* Default - found on EEPROM */
#define AR5K_EEPROM_MAGIC_5212 0x0000145c /* 5212 */
#define AR5K_EEPROM_MAGIC_5211 0x0000145b /* 5211 */
#define AR5K_EEPROM_MAGIC_5210 0x0000145a /* 5210 */
-#define AR5K_EEPROM_PROTECT 0x003f
-#define AR5K_EEPROM_PROTECT_RD_0_31 0x0001
-#define AR5K_EEPROM_PROTECT_WR_0_31 0x0002
-#define AR5K_EEPROM_PROTECT_RD_32_63 0x0004
+#define AR5K_EEPROM_PROTECT 0x003f /* EEPROM protect status */
+#define AR5K_EEPROM_PROTECT_RD_0_31 0x0001 /* Read protection bit for offsets 0x0 - 0x1f */
+#define AR5K_EEPROM_PROTECT_WR_0_31 0x0002 /* Write protection bit for offsets 0x0 - 0x1f */
+#define AR5K_EEPROM_PROTECT_RD_32_63 0x0004 /* 0x20 - 0x3f */
#define AR5K_EEPROM_PROTECT_WR_32_63 0x0008
-#define AR5K_EEPROM_PROTECT_RD_64_127 0x0010
+#define AR5K_EEPROM_PROTECT_RD_64_127 0x0010 /* 0x40 - 0x7f */
#define AR5K_EEPROM_PROTECT_WR_64_127 0x0020
-#define AR5K_EEPROM_PROTECT_RD_128_191 0x0040
+#define AR5K_EEPROM_PROTECT_RD_128_191 0x0040 /* 0x80 - 0xbf (regdom) */
#define AR5K_EEPROM_PROTECT_WR_128_191 0x0080
-#define AR5K_EEPROM_PROTECT_RD_192_207 0x0100
+#define AR5K_EEPROM_PROTECT_RD_192_207 0x0100 /* 0xc0 - 0xcf */
#define AR5K_EEPROM_PROTECT_WR_192_207 0x0200
-#define AR5K_EEPROM_PROTECT_RD_208_223 0x0400
+#define AR5K_EEPROM_PROTECT_RD_208_223 0x0400 /* 0xd0 - 0xdf */
#define AR5K_EEPROM_PROTECT_WR_208_223 0x0800
-#define AR5K_EEPROM_PROTECT_RD_224_239 0x1000
+#define AR5K_EEPROM_PROTECT_RD_224_239 0x1000 /* 0xe0 - 0xef */
#define AR5K_EEPROM_PROTECT_WR_224_239 0x2000
-#define AR5K_EEPROM_PROTECT_RD_240_255 0x4000
+#define AR5K_EEPROM_PROTECT_RD_240_255 0x4000 /* 0xf0 - 0xff */
#define AR5K_EEPROM_PROTECT_WR_240_255 0x8000
-#define AR5K_EEPROM_REG_DOMAIN 0x00bf
-#define AR5K_EEPROM_INFO_BASE 0x00c0
+#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */
+#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */
#define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE)
#define AR5K_EEPROM_INFO_CKSUM 0xffff
#define AR5K_EEPROM_INFO(_n) (AR5K_EEPROM_INFO_BASE + (_n))
-#define AR5K_EEPROM_VERSION AR5K_EEPROM_INFO(1)
-#define AR5K_EEPROM_VERSION_3_0 0x3000
-#define AR5K_EEPROM_VERSION_3_1 0x3001
-#define AR5K_EEPROM_VERSION_3_2 0x3002
-#define AR5K_EEPROM_VERSION_3_3 0x3003
-#define AR5K_EEPROM_VERSION_3_4 0x3004
-#define AR5K_EEPROM_VERSION_4_0 0x4000
-#define AR5K_EEPROM_VERSION_4_1 0x4001
-#define AR5K_EEPROM_VERSION_4_2 0x4002
+#define AR5K_EEPROM_VERSION AR5K_EEPROM_INFO(1) /* EEPROM Version */
+#define AR5K_EEPROM_VERSION_3_0 0x3000 /* No idea what's going on before this version */
+#define AR5K_EEPROM_VERSION_3_1 0x3001 /* ob/db values for 2Ghz (ar5211_rfregs) */
+#define AR5K_EEPROM_VERSION_3_2 0x3002 /* different frequency representation (eeprom_bin2freq) */
+#define AR5K_EEPROM_VERSION_3_3 0x3003 /* offsets changed, has 32 CTLs (see below) and ee_false_detect (eeprom_read_modes) */
+#define AR5K_EEPROM_VERSION_3_4 0x3004 /* has ee_i_gain ee_cck_ofdm_power_delta (eeprom_read_modes) */
+#define AR5K_EEPROM_VERSION_4_0 0x4000 /* has ee_misc*, ee_cal_pier, ee_turbo_max_power and ee_xr_power (eeprom_init) */
+#define AR5K_EEPROM_VERSION_4_1 0x4001 /* has ee_margin_tx_rx (eeprom_init) */
+#define AR5K_EEPROM_VERSION_4_2 0x4002 /* has ee_cck_ofdm_gain_delta (eeprom_init) */
#define AR5K_EEPROM_VERSION_4_3 0x4003
-#define AR5K_EEPROM_VERSION_4_6 0x4006
+#define AR5K_EEPROM_VERSION_4_4 0x4004
+#define AR5K_EEPROM_VERSION_4_5 0x4005
+#define AR5K_EEPROM_VERSION_4_6 0x4006 /* has ee_scaled_cck_delta */
#define AR5K_EEPROM_VERSION_4_7 0x3007
#define AR5K_EEPROM_MODE_11A 0
#define AR5K_EEPROM_MODE_11B 1
#define AR5K_EEPROM_MODE_11G 2
-#define AR5K_EEPROM_HDR AR5K_EEPROM_INFO(2)
+#define AR5K_EEPROM_HDR AR5K_EEPROM_INFO(2) /* Header that contains the device caps */
#define AR5K_EEPROM_HDR_11A(_v) (((_v) >> AR5K_EEPROM_MODE_11A) & 0x1)
#define AR5K_EEPROM_HDR_11B(_v) (((_v) >> AR5K_EEPROM_MODE_11B) & 0x1)
#define AR5K_EEPROM_HDR_11G(_v) (((_v) >> AR5K_EEPROM_MODE_11G) & 0x1)
-#define AR5K_EEPROM_HDR_T_2GHZ_DIS(_v) (((_v) >> 3) & 0x1)
-#define AR5K_EEPROM_HDR_T_5GHZ_DBM(_v) (((_v) >> 4) & 0x7f)
+#define AR5K_EEPROM_HDR_T_2GHZ_DIS(_v) (((_v) >> 3) & 0x1) /* Disable turbo for 2Ghz (?) */
+#define AR5K_EEPROM_HDR_T_5GHZ_DBM(_v) (((_v) >> 4) & 0x7f) /* Max turbo power for a/XR mode (eeprom_init) */
#define AR5K_EEPROM_HDR_DEVICE(_v) (((_v) >> 11) & 0x7)
-#define AR5K_EEPROM_HDR_T_5GHZ_DIS(_v) (((_v) >> 15) & 0x1)
-#define AR5K_EEPROM_HDR_RFKILL(_v) (((_v) >> 14) & 0x1)
+#define AR5K_EEPROM_HDR_T_5GHZ_DIS(_v) (((_v) >> 15) & 0x1) /* Disable turbo for 5Ghz (?) */
+#define AR5K_EEPROM_HDR_RFKILL(_v) (((_v) >> 14) & 0x1) /* Device has RFKill support */
#define AR5K_EEPROM_RFKILL_GPIO_SEL 0x0000001c
#define AR5K_EEPROM_RFKILL_GPIO_SEL_S 2
@@ -991,12 +993,13 @@
#define AR5K_EEPROM_ANT_GAIN_5GHZ(_v) ((int8_t)(((_v) >> 8) & 0xff))
#define AR5K_EEPROM_ANT_GAIN_2GHZ(_v) ((int8_t)((_v) & 0xff))
+/* calibration settings */
#define AR5K_EEPROM_MODES_11A(_v) AR5K_EEPROM_OFF(_v, 0x00c5, 0x00d4)
#define AR5K_EEPROM_MODES_11B(_v) AR5K_EEPROM_OFF(_v, 0x00d0, 0x00f2)
#define AR5K_EEPROM_MODES_11G(_v) AR5K_EEPROM_OFF(_v, 0x00da, 0x010d)
-#define AR5K_EEPROM_CTL(_v) AR5K_EEPROM_OFF(_v, 0x00e4, 0x0128)
+#define AR5K_EEPROM_CTL(_v) AR5K_EEPROM_OFF(_v, 0x00e4, 0x0128) /* Conformance test limits */
-/* Since 3.1 */
+/* [3.1 - 3.3] */
#define AR5K_EEPROM_OBDB0_2GHZ 0x00ec
#define AR5K_EEPROM_OBDB1_2GHZ 0x00ed
@@ -1718,12 +1721,12 @@
* PHY PLL (Phase Locked Loop) control register
*/
#define AR5K_PHY_PLL 0x987c
-#define AR5K_PHY_PLL_20MHZ 0x13 /* [5111] */
-#define AR5K_PHY_PLL_40MHZ_5211 0x18
+#define AR5K_PHY_PLL_20MHZ 0x13 /* For half rate (?) [5111+] */
+#define AR5K_PHY_PLL_40MHZ_5211 0x18 /* For 802.11a */
#define AR5K_PHY_PLL_40MHZ_5212 0x000000aa
#define AR5K_PHY_PLL_40MHZ (hal->ah_version == AR5K_AR5211 ? \
AR5K_PHY_PLL_40MHZ_5211 : AR5K_PHY_PLL_40MHZ_5212)
-#define AR5K_PHY_PLL_44MHZ_5211 0x19
+#define AR5K_PHY_PLL_44MHZ_5211 0x19 /* For 802.11b/g */
#define AR5K_PHY_PLL_44MHZ_5212 0x000000ab
#define AR5K_PHY_PLL_44MHZ (hal->ah_version == AR5K_AR5211 ? \
AR5K_PHY_PLL_44MHZ_5211 : AR5K_PHY_PLL_44MHZ_5212)
@@ -1770,7 +1773,8 @@
/* Channel set on 5111 */
/* Used to read radio revision*/
-#define AR5K_RF_BUFFER_CONTROL_4 0x98d4 /* Bank 0,1,2,6 on 5111 */
+#define AR5K_RF_BUFFER_CONTROL_4 0x98d4 /* RF Stage register on 5110 */
+ /* Bank 0,1,2,6 on 5111 */
/* Bank 1 on 5112 */
/* Used during activation on 5111 */
@@ -1796,14 +1800,14 @@
/*
* PHY timing I(nphase) Q(adrature) control register [5111+]
*/
-#define AR5K_PHY_IQ 0x9920
-#define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f
-#define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0
+#define AR5K_PHY_IQ 0x9920 /* Register address */
+#define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */
+#define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */
#define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5
-#define AR5K_PHY_IQ_CORR_ENABLE 0x00000800
+#define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */
#define AR5K_PHY_IQ_CAL_NUM_LOG_MAX 0x0000f000
#define AR5K_PHY_IQ_CAL_NUM_LOG_MAX_S 12
-#define AR5K_PHY_IQ_RUN 0x00010000
+#define AR5K_PHY_IQ_RUN 0x00010000 /* Run i/q calibration */
/*
@@ -1846,13 +1850,19 @@
/*---[5111+]---*/
#define AR5K_PHY_FRAME_CTL_TX_CLIP 0x00000038
#define AR5K_PHY_FRAME_CTL_TX_CLIP_S 3
-/*---[5110]---*/
+/*---[5110/5111]---*/
#define AR5K_PHY_FRAME_CTL_TIMING_ERR 0x01000000
#define AR5K_PHY_FRAME_CTL_PARITY_ERR 0x02000000
-#define AR5K_PHY_FRAME_CTL_ILLRATE_ERR 0x04000000
-#define AR5K_PHY_FRAME_CTL_ILLLEN_ERR 0x08000000
+#define AR5K_PHY_FRAME_CTL_ILLRATE_ERR 0x04000000 /* illegal rate */
+#define AR5K_PHY_FRAME_CTL_ILLLEN_ERR 0x08000000 /* illegal length */
#define AR5K_PHY_FRAME_CTL_SERVICE_ERR 0x20000000
-#define AR5K_PHY_FRAME_CTL_TXURN_ERR 0x40000000
+#define AR5K_PHY_FRAME_CTL_TXURN_ERR 0x40000000 /* tx underrun */
+#define AR5K_PHY_FRAME_CTL_INI AR5K_PHY_FRAME_CTL_SERVICE_ERR | \
+ AR5K_PHY_FRAME_CTL_TXURN_ERR | \
+ AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \
+ AR5K_PHY_FRAME_CTL_ILLRATE_ERR | \
+ AR5K_PHY_FRAME_CTL_PARITY_ERR | \
+ AR5K_PHY_FRAME_CTL_TIMING_ERR
/*
* PHY radar detection register [5111+]
@@ -1928,7 +1938,7 @@ after DFS is enabled */
*/
#define AR5K_PHY_IQRES_CAL_PWR_I 0x9c10 /* I (Inphase) power value */
#define AR5K_PHY_IQRES_CAL_PWR_Q 0x9c14 /* Q (Quadrature) power value */
-#define AR5K_PHY_IQRES_CAL_CORR 0x9c18
+#define AR5K_PHY_IQRES_CAL_CORR 0x9c18 /* I/Q Correlation */
/*
* PHY current RSSI register [5111+]
@@ -1936,7 +1946,7 @@ after DFS is enabled */
#define AR5K_PHY_CURRENT_RSSI 0x9c1c
/*
- * PHY PCDAC TX power register [511+ (?)]
+ * PHY PCDAC TX power table
*/
#define AR5K_PHY_PCDAC_TXPOWER_BASE 0xa180
#define AR5K_PHY_PCDAC_TXPOWER(_n) (AR5K_PHY_PCDAC_TXPOWER_BASE + ((_n) << 2))
@@ -1944,15 +1954,15 @@ after DFS is enabled */
/*
* PHY mode register [5111+]
*/
-#define AR5K_PHY_MODE 0x0a200
-#define AR5K_PHY_MODE_MOD 0x00000001
+#define AR5K_PHY_MODE 0x0a200 /* Register address */
+#define AR5K_PHY_MODE_MOD 0x00000001 /* PHY Modulation mask*/
#define AR5K_PHY_MODE_MOD_OFDM 0
#define AR5K_PHY_MODE_MOD_CCK 1
-#define AR5K_PHY_MODE_FREQ 0x00000002
+#define AR5K_PHY_MODE_FREQ 0x00000002 /* Freq mode mask */
#define AR5K_PHY_MODE_FREQ_5GHZ 0
#define AR5K_PHY_MODE_FREQ_2GHZ 2
-#define AR5K_PHY_MODE_MOD_DYN 0x00000004 /* [5112+] */
-#define AR5K_PHY_MODE_RAD 0x00000008 /* [5112+] */
+#define AR5K_PHY_MODE_MOD_DYN 0x00000004 /* Dynamic OFDM/CCK mode mask [5112+] */
+#define AR5K_PHY_MODE_RAD 0x00000008 /* [5212+] */
#define AR5K_PHY_MODE_RAD_RF5111 0
#define AR5K_PHY_MODE_RAD_RF5112 8
#define AR5K_PHY_MODE_XR 0x00000010 /* [5112+] */
^ permalink raw reply related
* [PATCH 2/4] Net: ath5k, initial write cleanup
From: Jiri Slaby @ 2007-08-25 7:58 UTC (permalink / raw)
To: linville-2XuSBdqkA4R54TAoqtyWWQ
Cc: Andrew Morton, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <149438602455517207-+5AFNAhbZwkm4RdzfppkhA@public.gmane.org>
ath5k, initial write cleanup
The final step of initial writing cleanup. ar5211_rf is going away.
Signed-off-by: Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: <linville-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org>
---
commit 0aebc8bb5574b6b0cc8f9f0d73672c1bee5cbfbb
tree a9a5e6bb4fa99b82fc345f8f52d2d202ddcec06b
parent 06615d9cdf1ae777821dfcd7845c72c38ff14ffa
author Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:22:49 +0200
committer Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:22:49 +0200
drivers/net/wireless/ath5k.h | 1
drivers/net/wireless/ath5k_hw.c | 327 +++++++--------
drivers/net/wireless/ath5k_hw.h | 849 ++++++++++++++++++---------------------
3 files changed, 540 insertions(+), 637 deletions(-)
diff --git a/drivers/net/wireless/ath5k.h b/drivers/net/wireless/ath5k.h
index 2913a0a..c70cd30 100644
--- a/drivers/net/wireless/ath5k.h
+++ b/drivers/net/wireless/ath5k.h
@@ -1036,7 +1036,6 @@ int ath5k_hw_phy_calibrate(struct ath_hw *hal, struct ieee80211_channel *channel
bool ath5k_hw_phy_disable(struct ath_hw *hal);
void ath5k_hw_set_def_antenna(struct ath_hw *hal, unsigned int ant);
unsigned int ath5k_hw_get_def_antenna(struct ath_hw *hal);
-bool ath5k_hw_rfgain(struct ath_hw *hal, unsigned int phy, u_int freq);
enum ath5k_rfgain ath5k_hw_get_rf_gain(struct ath_hw *hal);
/* Misc functions */
int ath5k_hw_set_txpower_limit(struct ath_hw *hal, unsigned int power);
diff --git a/drivers/net/wireless/ath5k_hw.c b/drivers/net/wireless/ath5k_hw.c
index 4375129..887213d 100644
--- a/drivers/net/wireless/ath5k_hw.c
+++ b/drivers/net/wireless/ath5k_hw.c
@@ -70,40 +70,43 @@ static int ath5k_hw_rf5111_rfregs(struct ath_hw *, struct ieee80211_channel *,
unsigned int);
static int ath5k_hw_rf5112_rfregs(struct ath_hw *, struct ieee80211_channel *,
unsigned int);
-static void ath5k_hw_ar5211_rfregs(struct ath_hw *, struct ieee80211_channel *,
- unsigned int, unsigned int);
+static int ath5k_hw_rfgain(struct ath_hw *, unsigned int);
/*
* Initial register dumps
*/
+
+/*
+ * MAC/PHY Settings
+ */
+/* Common for all modes */
static const struct ath5k_ini ar5210_ini[] = AR5K_AR5210_INI;
static const struct ath5k_ini ar5211_ini[] = AR5K_AR5211_INI;
static const struct ath5k_ini ar5212_ini[] = AR5K_AR5212_INI;
-static const struct ath5k_ar5211_ini_mode ar5211_mode[] = AR5K_AR5211_INI_MODE;
-static const struct ath5k_ar5212_ini_mode ar5212_mode[] = AR5K_AR5212_INI_MODE;
-/* RF Initial BB gain settings */
-static const struct ath5k_ini rf5111_bbgain_ini[] = AR5K_RF5111_BBGAIN_INI;
-static const struct ath5k_ini rf5112_bbgain_ini[] = AR5K_RF5112_BBGAIN_INI;
-
-/* This is going out soon */
-static const struct ath5k_ar5211_ini_rf ar5211_rf[] = AR5K_AR5211_INI_RF;
+/* Mode-specific settings */
+static const struct ath5k_ini_mode ar5211_ini_mode[] = AR5K_AR5211_INI_MODE;
+static const struct ath5k_ini_mode ar5212_ini_mode[] = AR5K_AR5212_INI_MODE;
+static const struct ath5k_ini_mode ar5212_rf5111_ini_mode[] = AR5K_AR5212_RF5111_INI_MODE;
+static const struct ath5k_ini_mode ar5212_rf5112_ini_mode[] = AR5K_AR5212_RF5112_INI_MODE;
-/*
- * Initial gain optimization values
- */
-static const struct ath5k_gain_opt rf5111_gain_opt = AR5K_RF5111_GAIN_OPT;
-static const struct ath5k_gain_opt rf5112_gain_opt = AR5K_RF5112_GAIN_OPT;
+/* RF Initial BB gain settings */
+static const struct ath5k_ini rf5111_ini_bbgain[] = AR5K_RF5111_INI_BBGAIN;
+static const struct ath5k_ini rf5112_ini_bbgain[] = AR5K_RF5112_INI_BBGAIN;
/*
- * Initial register settings for the radio chipsets
+ * RF Settings
*/
/* RF Banks */
static const struct ath5k_ini_rf rf5111_rf[] = AR5K_RF5111_INI_RF;
static const struct ath5k_ini_rf rf5112_rf[] = AR5K_RF5112_INI_RF;
static const struct ath5k_ini_rf rf5112a_rf[] = AR5K_RF5112A_INI_RF;
-/* Common (5111/5112) rf gain table */
-static const struct ath5k_ini_rfgain ath5k_rfg[] = AR5K_INI_RFGAIN;
+/* Initial mode-specific RF gain table for 5111/5112 */
+static const struct ath5k_ini_rfgain rf5111_ini_rfgain[] = AR5K_RF5111_INI_RFGAIN;
+static const struct ath5k_ini_rfgain rf5112_ini_rfgain[] = AR5K_RF5112_INI_RFGAIN;
+/* Initial gain optimization tables */
+static const struct ath5k_gain_opt rf5111_gain_opt = AR5K_RF5111_GAIN_OPT;
+static const struct ath5k_gain_opt rf5112_gain_opt = AR5K_RF5112_GAIN_OPT;
/*
* Enable to overwrite the country code (use "00" for debug)
@@ -257,6 +260,8 @@ static void ath5k_hw_ini_registers(struct ath_hw *hal, unsigned int size,
/* Write initial registers */
for (i = 0; i < size; i++) {
+ /* On channel change there is
+ * no need to mess with PCU */
if (change_channel &&
ini_regs[i].ini_register >= AR5K_PCU_MIN &&
ini_regs[i].ini_register <= AR5K_PCU_MAX)
@@ -276,6 +281,20 @@ static void ath5k_hw_ini_registers(struct ath_hw *hal, unsigned int size,
}
}
+static void ath5k_hw_ini_mode_registers(struct ath_hw *hal,
+ unsigned int size, const struct ath5k_ini_mode *ini_mode,
+ u8 mode)
+{
+ unsigned int i;
+
+ for (i = 0; i < size; i++) {
+ AR5K_REG_WAIT(i);
+ ath5k_hw_reg_write(hal, ini_mode[i].mode_value[mode],
+ (u32)ini_mode[i].mode_register);
+ }
+
+}
+
/***************************************\
Attach/Detach Functions
\***************************************/
@@ -291,8 +310,6 @@ struct ath_hw *ath5k_hw_attach(u16 device, u8 mac_version, void *sc,
int ret;
u32 srev;
- /*TODO:Use eeprom_magic to verify chipset*/
-
/*If we passed the test malloc a hal struct*/
hal = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
if (hal == NULL) {
@@ -500,24 +517,34 @@ static int ath5k_hw_nic_wakeup(struct ath_hw *hal, int flags, bool initial)
if (flags & CHANNEL_2GHZ) {
mode |= AR5K_PHY_MODE_FREQ_2GHZ;
clock |= AR5K_PHY_PLL_44MHZ;
+
+ if (flags & CHANNEL_CCK) {
+ mode |= AR5K_PHY_MODE_MOD_CCK;
+ } else if (flags & CHANNEL_OFDM) {
+ /* XXX Dynamic OFDM/CCK is not supported by the
+ * AR5211 so we set MOD_OFDM for plain g (no
+ * CCK headers) operation. We need to test
+ * this, 5211 might support ofdm-only g after
+ * all, there are also initial register values
+ * in the code for g mode (see ath5k_hw.h). */
+ if (hal->ah_version == AR5K_AR5211)
+ mode |= AR5K_PHY_MODE_MOD_OFDM;
+ else
+ mode |= AR5K_PHY_MODE_MOD_DYN;
+ } else {
+ AR5K_PRINT("invalid radio modulation mode\n");
+ return -EINVAL;
+ }
} else if (flags & CHANNEL_5GHZ) {
mode |= AR5K_PHY_MODE_FREQ_5GHZ;
clock |= AR5K_PHY_PLL_40MHZ;
- } else {
- AR5K_PRINT("invalid radio frequency mode\n");
- return -EINVAL;
- }
- if (flags & CHANNEL_CCK) {
- mode |= AR5K_PHY_MODE_MOD_CCK;
- } else if (flags & CHANNEL_G) {
- /* Dynamic OFDM/CCK is not supported by the AR5211 */
- if (hal->ah_version == AR5K_AR5211)
- mode |= AR5K_PHY_MODE_MOD_CCK;
- else
- mode |= AR5K_PHY_MODE_MOD_DYN;
- } else if (flags & CHANNEL_OFDM) {
- mode |= AR5K_PHY_MODE_MOD_OFDM;
+ if (flags & CHANNEL_OFDM)
+ mode |= AR5K_PHY_MODE_MOD_OFDM;
+ else {
+ AR5K_PRINT("invalid radio modulation mode\n");
+ return -EINVAL;
+ }
} else {
AR5K_PRINT("invalid radio frequency mode\n");
return -EINVAL;
@@ -642,7 +669,6 @@ static u16 ath5k_hw_radio_revision(struct ath_hw *hal, unsigned int chan)
/*
* Get the rate table for a specific operation mode
- * TODO:Limit this per chipset
*/
const struct ath5k_rate_table *ath5k_hw_get_rate_table(struct ath_hw *hal,
unsigned int mode)
@@ -697,7 +723,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
struct ath5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
u32 data, noise_floor, s_seq, s_ant, s_led[3];
u8 mac[ETH_ALEN];
- unsigned int i, phy, mode, freq, off, ee_mode, ant[2];
+ unsigned int i, mode, freq, ee_mode, ant[2];
int ret;
AR5K_TRACE;
@@ -707,7 +733,6 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
ee_mode = 0;
freq = 0;
mode = 0;
- phy = 0;
/*
* Save some registers before a reset
@@ -747,11 +772,8 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
* 5210 only comes with RF5110
*/
if (hal->ah_version != AR5K_AR5210) {
- if (hal->ah_radio == AR5K_RF5111)
- phy = AR5K_INI_PHY_5111;
- else if (hal->ah_radio == AR5K_RF5112)
- phy = AR5K_INI_PHY_5112;
- else {
+ if (hal->ah_radio != AR5K_RF5111 &&
+ hal->ah_radio != AR5K_RF5112) {
AR5K_PRINTF("invalid phy radio: %u\n", hal->ah_radio);
return -EINVAL;
}
@@ -767,6 +789,7 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
freq = AR5K_INI_RFGAIN_2GHZ;
ee_mode = AR5K_EEPROM_MODE_11B;
break;
+ /* Is this ok on 5211 too ? */
case CHANNEL_G:
mode = AR5K_INI_VAL_11G;
freq = AR5K_INI_RFGAIN_2GHZ;
@@ -800,51 +823,32 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
/* PHY access enable */
ath5k_hw_reg_write(hal, AR5K_PHY_SHIFT_5GHZ, AR5K_PHY(0));
- /*
- * Write initial RF registers on 5211
- * do we need that ? Is ath5k_hw_rfregs going to work for
- * 5211 (5111) ?
- */
- if (hal->ah_version == AR5K_AR5211)
- ath5k_hw_ar5211_rfregs(hal, channel, freq, ee_mode);
}
/*
- * Write initial mode settings
- * TODO:Do this in a common way
+ * Write initial mode-specific settings
*/
/*For 5212*/
if (hal->ah_version == AR5K_AR5212) {
- for (i = 0; i < ARRAY_SIZE(ar5212_mode); i++) {
- if (ar5212_mode[i].mode_flags == AR5K_INI_FLAG_511X)
- off = AR5K_INI_PHY_511X;
- else if (ar5212_mode[i].mode_flags & AR5K_INI_FLAG_5111
- && hal->ah_radio == AR5K_RF5111)
- off = AR5K_INI_PHY_5111;
- else if (ar5212_mode[i].mode_flags & AR5K_INI_FLAG_5112
- && hal->ah_radio == AR5K_RF5112)
- off = AR5K_INI_PHY_5112;
- else
- continue;
-
- AR5K_REG_WAIT(i);
- ath5k_hw_reg_write(hal,
- ar5212_mode[i].mode_value[off][mode],
- (u32)ar5212_mode[i].mode_register);
- }
+ ath5k_hw_ini_mode_registers(hal, ARRAY_SIZE(ar5212_ini_mode),
+ ar5212_ini_mode, mode);
+ if (hal->ah_radio == AR5K_RF5111)
+ ath5k_hw_ini_mode_registers(hal,
+ ARRAY_SIZE(ar5212_rf5111_ini_mode),
+ ar5212_rf5111_ini_mode, mode);
+ else if (hal->ah_radio == AR5K_RF5112)
+ ath5k_hw_ini_mode_registers(hal,
+ ARRAY_SIZE(ar5212_rf5112_ini_mode),
+ ar5212_rf5112_ini_mode, mode);
}
/*For 5211*/
- if (hal->ah_version == AR5K_AR5211) {
- for (i = 0; i < ARRAY_SIZE(ar5211_mode); i++) {
- AR5K_REG_WAIT(i);
- ath5k_hw_reg_write(hal,
- ar5211_mode[i].mode_value[mode],
- (u32)ar5211_mode[i].mode_register);
- }
- }
+ if (hal->ah_version == AR5K_AR5211)
+ ath5k_hw_ini_mode_registers(hal, ARRAY_SIZE(ar5211_ini_mode),
+ ar5211_ini_mode, mode);
+ /* For 5210 mode settings check out ath5k_hw_reset_tx_queue */
/*
- * Initial register dump common for all modes
+ * Write initial settings common for all modes
*/
/*For 5212*/
if (hal->ah_version == AR5K_AR5212) {
@@ -854,23 +858,23 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
ath5k_hw_reg_write(hal, AR5K_PHY_PAPD_PROBE_INI_5112,
AR5K_PHY_PAPD_PROBE);
ath5k_hw_ini_registers(hal,
- ARRAY_SIZE(rf5112_bbgain_ini),
- rf5112_bbgain_ini, change_channel);
+ ARRAY_SIZE(rf5112_ini_bbgain),
+ rf5112_ini_bbgain, change_channel);
} else if (hal->ah_radio == AR5K_RF5111) {
ath5k_hw_reg_write(hal, AR5K_PHY_GAIN_2GHZ_INI_5111,
AR5K_PHY_GAIN_2GHZ);
ath5k_hw_reg_write(hal, AR5K_PHY_PAPD_PROBE_INI_5111,
AR5K_PHY_PAPD_PROBE);
ath5k_hw_ini_registers(hal,
- ARRAY_SIZE(rf5111_bbgain_ini),
- rf5111_bbgain_ini, change_channel);
+ ARRAY_SIZE(rf5111_ini_bbgain),
+ rf5111_ini_bbgain, change_channel);
}
} else if (hal->ah_version == AR5K_AR5211) {
ath5k_hw_ini_registers(hal, ARRAY_SIZE(ar5211_ini),
ar5211_ini, change_channel);
/* AR5211 only comes with 5111 */
- ath5k_hw_ini_registers(hal, ARRAY_SIZE(rf5111_bbgain_ini),
- rf5111_bbgain_ini, change_channel);
+ ath5k_hw_ini_registers(hal, ARRAY_SIZE(rf5111_ini_bbgain),
+ rf5111_ini_bbgain, change_channel);
} else if (hal->ah_version == AR5K_AR5210) {
ath5k_hw_ini_registers(hal, ARRAY_SIZE(ar5210_ini),
ar5210_ini, change_channel);
@@ -884,8 +888,9 @@ int ath5k_hw_reset(struct ath_hw *hal, enum ieee80211_if_types op_mode,
* Write initial RF gain settings
* This should work for both 5111/5112
*/
- if (ath5k_hw_rfgain(hal, phy, freq) == false)
- return -EIO;
+ ret = ath5k_hw_rfgain(hal, freq);
+ if (ret)
+ return ret;
mdelay(1);
@@ -1945,6 +1950,9 @@ static int ath5k_hw_eeprom_write(struct ath_hw *hal, u32 offset, u16 data)
return -EIO;
}
+/*
+ * Translate binary channel representation in EEPROM to frequency
+ */
static u16 ath5k_eeprom_bin2freq(struct ath_hw *hal, u16 bin, unsigned int mode)
{
u16 val;
@@ -3371,9 +3379,6 @@ int ath5k_hw_reset_tx_queue(struct ath_hw *hal, unsigned int queue)
{
u32 cw_min, cw_max, retry_lg, retry_sh;
struct ath5k_txq_info *tq = &hal->ah_txq[queue];
- int i;
- struct ath5k_ar5210_ini_mode ar5210_mode[] =
- AR5K_AR5210_INI_MODE(hal, hal->ah_aifs + tq->tqi_aifs);
AR5K_TRACE;
AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
@@ -3388,14 +3393,46 @@ int ath5k_hw_reset_tx_queue(struct ath_hw *hal, unsigned int queue)
if (tq->tqi_type != AR5K_TX_QUEUE_DATA)
return -EINVAL;
- /*
- * Write initial mode register settings
- */
- for (i = 0; i < ARRAY_SIZE(ar5210_mode); i++)
- ath5k_hw_reg_write(hal, hal->ah_turbo == true ?
- ar5210_mode[i].mode_turbo :
- ar5210_mode[i].mode_base,
- (u32)ar5210_mode[i].mode_register);
+ /* Set Slot time */
+ ath5k_hw_reg_write(hal, hal->ah_turbo == true ?
+ AR5K_INIT_SLOT_TIME_TURBO : AR5K_INIT_SLOT_TIME,
+ AR5K_SLOT_TIME);
+ /* Set ACK_CTS timeout */
+ ath5k_hw_reg_write(hal, hal->ah_turbo == true ?
+ AR5K_INIT_ACK_CTS_TIMEOUT_TURBO :
+ AR5K_INIT_ACK_CTS_TIMEOUT, AR5K_SLOT_TIME);
+ /* Set Transmit Latency */
+ ath5k_hw_reg_write(hal, hal->ah_turbo == true ?
+ AR5K_INIT_TRANSMIT_LATENCY_TURBO :
+ AR5K_INIT_TRANSMIT_LATENCY, AR5K_USEC_5210);
+ /* Set IFS0 */
+ if (hal->ah_turbo == true)
+ ath5k_hw_reg_write(hal, ((AR5K_INIT_SIFS_TURBO +
+ (hal->ah_aifs + tq->tqi_aifs) *
+ AR5K_INIT_SLOT_TIME_TURBO) <<
+ AR5K_IFS0_DIFS_S) | AR5K_INIT_SIFS_TURBO,
+ AR5K_IFS0);
+ else
+ ath5k_hw_reg_write(hal, ((AR5K_INIT_SIFS +
+ (hal->ah_aifs + tq->tqi_aifs) *
+ AR5K_INIT_SLOT_TIME) << AR5K_IFS0_DIFS_S) |
+ AR5K_INIT_SIFS, AR5K_IFS0);
+
+ /* Set IFS1 */
+ ath5k_hw_reg_write(hal, hal->ah_turbo == true ?
+ AR5K_INIT_PROTO_TIME_CNTRL_TURBO :
+ AR5K_INIT_PROTO_TIME_CNTRL, AR5K_IFS1);
+ /* Set PHY register 0x9844 (??) */
+ ath5k_hw_reg_write(hal, hal->ah_turbo == true ?
+ (ath5k_hw_reg_read(hal, AR5K_PHY(17)) & ~0x7F) | 0x38 :
+ (ath5k_hw_reg_read(hal, AR5K_PHY(17)) & ~0x7F) | 0x1C,
+ AR5K_PHY(17));
+ /* Set Frame Control Register */
+ ath5k_hw_reg_write(hal, hal->ah_turbo == true ?
+ (AR5K_PHY_FRAME_CTL_INI | AR5K_PHY_TURBO_MODE |
+ AR5K_PHY_TURBO_SHORT | 0x2020) :
+ (AR5K_PHY_FRAME_CTL_INI | 0x1020),
+ AR5K_PHY_FRAME_CTL_5210);
}
/*
@@ -4857,6 +4894,9 @@ ath5k_hw_get_def_antenna(struct ath_hw *hal)
return false; /*XXX: What do we return for 5210 ?*/
}
+/*
+ * Used to modify RF Banks before writing them to AR5K_RF_BUFFER
+ */
static unsigned int ath5k_hw_rfregs_op(u32 *rf, u32 offset, u32 reg, u32 bits,
u32 first, u32 col, bool set)
{
@@ -5072,7 +5112,7 @@ static int ath5k_hw_rfregs(struct ath_hw *hal,
}
/*
- * Initialize RF5111
+ * Read EEPROM Calibration data, modify RF Banks and Initialize RF5111
*/
static int ath5k_hw_rf5111_rfregs(struct ath_hw *hal,
struct ieee80211_channel *channel, unsigned int mode)
@@ -5173,7 +5213,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath_hw *hal,
}
/*
- * Initialize RF5112
+ * Read EEPROM Calibration data, modify RF Banks and Initialize RF5112
*/
static int ath5k_hw_rf5112_rfregs(struct ath_hw *hal,
struct ieee80211_channel *channel, unsigned int mode)
@@ -5267,81 +5307,22 @@ static int ath5k_hw_rf5112_rfregs(struct ath_hw *hal,
return 0;
}
-/*
- * Initialize 5211 RF
- * TODO: is this needed ? i mean 5211 has a 5111 RF
- * doesn't ar5k_rfregs work ?
- */
-static void ath5k_hw_ar5211_rfregs(struct ath_hw *hal,
- struct ieee80211_channel *channel, unsigned int freq,
- unsigned int ee_mode)
-{
- struct ath5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
- struct ath5k_ar5211_ini_rf rf[ARRAY_SIZE(ar5211_rf)];
- u32 ob, db, obdb, xpds, xpdp, x_gain;
- unsigned int i;
-
- memcpy(rf, ar5211_rf, sizeof(rf));
- obdb = 0;
-
- if (freq == AR5K_INI_RFGAIN_2GHZ &&
- hal->ah_ee_version >= AR5K_EEPROM_VERSION_3_1) {
- ob = ath5k_hw_bitswap(ee->ee_ob[ee_mode][0], 3);
- db = ath5k_hw_bitswap(ee->ee_db[ee_mode][0], 3);
- rf[25].rf_value[freq] =
- ((ob << 6) & 0xc0) | (rf[25].rf_value[freq] & ~0xc0);
- rf[26].rf_value[freq] =
- (((ob >> 2) & 0x1) | ((db << 1) & 0xe)) |
- (rf[26].rf_value[freq] & ~0xf);
- }
-
- if (freq == AR5K_INI_RFGAIN_5GHZ) {
- /* For 11a and Turbo */
- obdb = channel->freq >= 5725 ? 3 :
- (channel->freq >= 5500 ? 2 :
- (channel->freq >= 5260 ? 1 :
- (channel->freq > 4000 ? 0 : -1)));
- }
-
- ob = ee->ee_ob[ee_mode][obdb];
- db = ee->ee_db[ee_mode][obdb];
- x_gain = ee->ee_x_gain[ee_mode];
- xpds = ee->ee_xpd[ee_mode];
- xpdp = !xpds;
-
- rf[11].rf_value[freq] = (rf[11].rf_value[freq] & ~0xc0) |
- (((ath5k_hw_bitswap(x_gain, 4) << 7) | (xpdp << 6)) & 0xc0);
- rf[12].rf_value[freq] = (rf[12].rf_value[freq] & ~0x7) |
- ((ath5k_hw_bitswap(x_gain, 4) >> 1) & 0x7);
- rf[12].rf_value[freq] = (rf[12].rf_value[freq] & ~0x80) |
- ((ath5k_hw_bitswap(ob, 3) << 7) & 0x80);
- rf[13].rf_value[freq] = (rf[13].rf_value[freq] & ~0x3) |
- ((ath5k_hw_bitswap(ob, 3) >> 1) & 0x3);
- rf[13].rf_value[freq] = (rf[13].rf_value[freq] & ~0x1c) |
- ((ath5k_hw_bitswap(db, 3) << 2) & 0x1c);
- rf[17].rf_value[freq] = (rf[17].rf_value[freq] & ~0x8) |
- ((xpds << 3) & 0x8);
-
- for (i = 0; i < ARRAY_SIZE(rf); i++) {
- AR5K_REG_WAIT(i);
- ath5k_hw_reg_write(hal, rf[i].rf_value[freq],
- (u32)rf[i].rf_register);
- }
-
- hal->ah_rf_gain = AR5K_RFGAIN_INACTIVE;
-}
-
-bool
-ath5k_hw_rfgain(struct ath_hw *hal, unsigned int phy, u_int freq)
+static int ath5k_hw_rfgain(struct ath_hw *hal, unsigned int freq)
{
- unsigned int i;
+ const struct ath5k_ini_rfgain *ath5k_rfg;
+ unsigned int i, size;
- switch (phy) {
- case AR5K_INI_PHY_5111:
- case AR5K_INI_PHY_5112:
+ switch (hal->ah_radio) {
+ case AR5K_RF5111:
+ ath5k_rfg = rf5111_ini_rfgain;
+ size = ARRAY_SIZE(rf5111_ini_rfgain);
+ break;
+ case AR5K_RF5112:
+ ath5k_rfg = rf5112_ini_rfgain;
+ size = ARRAY_SIZE(rf5112_ini_rfgain);
break;
default:
- return false;
+ return -EINVAL;
}
switch (freq) {
@@ -5349,16 +5330,16 @@ ath5k_hw_rfgain(struct ath_hw *hal, unsigned int phy, u_int freq)
case AR5K_INI_RFGAIN_5GHZ:
break;
default:
- return false;
+ return -EINVAL;
}
- for (i = 0; i < ARRAY_SIZE(ath5k_rfg); i++) {
+ for (i = 0; i < size; i++) {
AR5K_REG_WAIT(i);
- ath5k_hw_reg_write(hal, ath5k_rfg[i].rfg_value[phy][freq],
+ ath5k_hw_reg_write(hal, ath5k_rfg[i].rfg_value[freq],
(u32)ath5k_rfg[i].rfg_register);
}
- return true;
+ return 0;
}
enum ath5k_rfgain ath5k_hw_get_rf_gain(struct ath_hw *hal)
diff --git a/drivers/net/wireless/ath5k_hw.h b/drivers/net/wireless/ath5k_hw.h
index cff160b..5549135 100644
--- a/drivers/net/wireless/ath5k_hw.h
+++ b/drivers/net/wireless/ath5k_hw.h
@@ -160,11 +160,14 @@ struct ath5k_eeprom_info {
u16 ee_cck_ofdm_gain_delta;
u16 ee_cck_ofdm_power_delta;
u16 ee_scaled_cck_delta;
+
+ /* Used for tx thermal adjustment (eeprom_init, rfregs) */
u16 ee_tx_clip;
u16 ee_pwd_84;
u16 ee_pwd_90;
u16 ee_gain_select;
+ /* RF Calibration settings (reset, rfregs) */
u16 ee_i_cal[AR5K_EEPROM_N_MODES];
u16 ee_q_cal[AR5K_EEPROM_N_MODES];
u16 ee_fixed_bias[AR5K_EEPROM_N_MODES];
@@ -184,13 +187,17 @@ struct ath5k_eeprom_info {
u16 ee_x_gain[AR5K_EEPROM_N_MODES];
u16 ee_i_gain[AR5K_EEPROM_N_MODES];
u16 ee_margin_tx_rx[AR5K_EEPROM_N_MODES];
+
+ /* Unused */
u16 ee_false_detect[AR5K_EEPROM_N_MODES];
u16 ee_cal_pier[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_2GHZ_CHAN];
- u16 ee_channel[AR5K_EEPROM_N_MODES][AR5K_EEPROM_MAX_CHAN];
+ u16 ee_channel[AR5K_EEPROM_N_MODES][AR5K_EEPROM_MAX_CHAN]; /*empty*/
+ /* Conformance test limits (Unused) */
u16 ee_ctls;
u16 ee_ctl[AR5K_EEPROM_MAX_CTLS];
+ /* Noise Floor Calibration settings */
s16 ee_noise_floor_thr[AR5K_EEPROM_N_MODES];
s8 ee_adc_desired_size[AR5K_EEPROM_N_MODES];
s8 ee_pga_desired_size[AR5K_EEPROM_N_MODES];
@@ -605,14 +612,10 @@ struct ath5k_hw_tx_status {
#define AR5K_INI_VAL_XR 0
#define AR5K_INI_VAL_MAX 5
-#define AR5K_INI_PHY_5111 0
-#define AR5K_INI_PHY_5112 1
-#define AR5K_INI_PHY_511X 1
-
#define AR5K_RF5111_INI_RF_MAX_BANKS AR5K_MAX_RF_BANKS
#define AR5K_RF5112_INI_RF_MAX_BANKS AR5K_MAX_RF_BANKS
-/* Struct to hold initial RF register values */
+/* Struct to hold initial RF register values (RF Banks) */
struct ath5k_ini_rf {
u8 rf_bank; /* check out ath5k_reg.h */
u16 rf_register; /* register address */
@@ -945,151 +948,164 @@ struct ath5k_ini_rf {
}
/*
- * Mode-specific RF Gain registers
+ * Mode-specific RF Gain table (64bytes) for RF5111/5112
+ * (RF5110 only comes with AR5210 and only supports a/turbo a mode so initial
+ * RF Gain values are included in AR5K_AR5210_INI)
*/
struct ath5k_ini_rfgain {
- u16 rfg_register; /* RF Gain register address */
- u32 rfg_value[2][2]; /* [phy (above)][freq (below)] */
+ u16 rfg_register; /* RF Gain register address */
+ u32 rfg_value[2]; /* [freq (see below)] */
#define AR5K_INI_RFGAIN_5GHZ 0
#define AR5K_INI_RFGAIN_2GHZ 1
};
-#define AR5K_INI_RFGAIN { \
- { 0x9a00, { \
- /* 5111 5Ghz 5111 2Ghz 5112 5Ghz 5112 2Ghz */ \
- { 0x000001a9, 0x00000000 }, { 0x00000007, 0x00000007 } } }, \
- { 0x9a04, { \
- { 0x000001e9, 0x00000040 }, { 0x00000047, 0x00000047 } } }, \
- { 0x9a08, { \
- { 0x00000029, 0x00000080 }, { 0x00000087, 0x00000087 } } }, \
- { 0x9a0c, { \
- { 0x00000069, 0x00000150 }, { 0x000001a0, 0x000001a0 } } }, \
- { 0x9a10, { \
- { 0x00000199, 0x00000190 }, { 0x000001e0, 0x000001e0 } } }, \
- { 0x9a14, { \
- { 0x000001d9, 0x000001d0 }, { 0x00000020, 0x00000020 } } }, \
- { 0x9a18, { \
- { 0x00000019, 0x00000010 }, { 0x00000060, 0x00000060 } } }, \
- { 0x9a1c, { \
- { 0x00000059, 0x00000044 }, { 0x000001a1, 0x000001a1 } } }, \
- { 0x9a20, { \
- { 0x00000099, 0x00000084 }, { 0x000001e1, 0x000001e1 } } }, \
- { 0x9a24, { \
- { 0x000001a5, 0x00000148 }, { 0x00000021, 0x00000021 } } }, \
- { 0x9a28, { \
- { 0x000001e5, 0x00000188 }, { 0x00000061, 0x00000061 } } }, \
- { 0x9a2c, { \
- { 0x00000025, 0x000001c8 }, { 0x00000162, 0x00000162 } } }, \
- { 0x9a30, { \
- { 0x000001c8, 0x00000014 }, { 0x000001a2, 0x000001a2 } } }, \
- { 0x9a34, { \
- { 0x00000008, 0x00000042 }, { 0x000001e2, 0x000001e2 } } }, \
- { 0x9a38, { \
- { 0x00000048, 0x00000082 }, { 0x00000022, 0x00000022 } } }, \
- { 0x9a3c, { \
- { 0x00000088, 0x00000178 }, { 0x00000062, 0x00000062 } } }, \
- { 0x9a40, { \
- { 0x00000198, 0x000001b8 }, { 0x00000163, 0x00000163 } } }, \
- { 0x9a44, { \
- { 0x000001d8, 0x000001f8 }, { 0x000001a3, 0x000001a3 } } }, \
- { 0x9a48, { \
- { 0x00000018, 0x00000012 }, { 0x000001e3, 0x000001e3 } } }, \
- { 0x9a4c, { \
- { 0x00000058, 0x00000052 }, { 0x00000023, 0x00000023 } } }, \
- { 0x9a50, { \
- { 0x00000098, 0x00000092 }, { 0x00000063, 0x00000063 } } }, \
- { 0x9a54, { \
- { 0x000001a4, 0x0000017c }, { 0x00000184, 0x00000184 } } }, \
- { 0x9a58, { \
- { 0x000001e4, 0x000001bc }, { 0x000001c4, 0x000001c4 } } }, \
- { 0x9a5c, { \
- { 0x00000024, 0x000001fc }, { 0x00000004, 0x00000004 } } }, \
- { 0x9a60, { \
- { 0x00000064, 0x0000000a }, { 0x000001ea, 0x0000000b } } }, \
- { 0x9a64, { \
- { 0x000000a4, 0x0000004a }, { 0x0000002a, 0x0000004b } } }, \
- { 0x9a68, { \
- { 0x000000e4, 0x0000008a }, { 0x0000006a, 0x0000008b } } }, \
- { 0x9a6c, { \
- { 0x0000010a, 0x0000015a }, { 0x000000aa, 0x000001ac } } }, \
- { 0x9a70, { \
- { 0x0000014a, 0x0000019a }, { 0x000001ab, 0x000001ec } } }, \
- { 0x9a74, { \
- { 0x0000018a, 0x000001da }, { 0x000001eb, 0x0000002c } } }, \
- { 0x9a78, { \
- { 0x000001ca, 0x0000000e }, { 0x0000002b, 0x00000012 } } }, \
- { 0x9a7c, { \
- { 0x0000000a, 0x0000004e }, { 0x0000006b, 0x00000052 } } }, \
- { 0x9a80, { \
- { 0x0000004a, 0x0000008e }, { 0x000000ab, 0x00000092 } } }, \
- { 0x9a84, { \
- { 0x0000008a, 0x0000015e }, { 0x000001ac, 0x00000193 } } }, \
- { 0x9a88, { \
- { 0x000001ba, 0x0000019e }, { 0x000001ec, 0x000001d3 } } }, \
- { 0x9a8c, { \
- { 0x000001fa, 0x000001de }, { 0x0000002c, 0x00000013 } } }, \
- { 0x9a90, { \
- { 0x0000003a, 0x00000009 }, { 0x0000003a, 0x00000053 } } }, \
- { 0x9a94, { \
- { 0x0000007a, 0x00000049 }, { 0x0000007a, 0x00000093 } } }, \
- { 0x9a98, { \
- { 0x00000186, 0x00000089 }, { 0x000000ba, 0x00000194 } } }, \
- { 0x9a9c, { \
- { 0x000001c6, 0x00000179 }, { 0x000001bb, 0x000001d4 } } }, \
- { 0x9aa0, { \
- { 0x00000006, 0x000001b9 }, { 0x000001fb, 0x00000014 } } }, \
- { 0x9aa4, { \
- { 0x00000046, 0x000001f9 }, { 0x0000003b, 0x0000003a } } }, \
- { 0x9aa8, { \
- { 0x00000086, 0x00000039 }, { 0x0000007b, 0x0000007a } } }, \
- { 0x9aac, { \
- { 0x000000c6, 0x00000079 }, { 0x000000bb, 0x000000ba } } }, \
- { 0x9ab0, { \
- { 0x000000c6, 0x000000b9 }, { 0x000001bc, 0x000001bb } } }, \
- { 0x9ab4, { \
- { 0x000000c6, 0x000001bd }, { 0x000001fc, 0x000001fb } } }, \
- { 0x9ab8, { \
- { 0x000000c6, 0x000001fd }, { 0x0000003c, 0x0000003b } } }, \
- { 0x9abc, { \
- { 0x000000c6, 0x0000003d }, { 0x0000007c, 0x0000007b } } }, \
- { 0x9ac0, { \
- { 0x000000c6, 0x0000007d }, { 0x000000bc, 0x000000bb } } }, \
- { 0x9ac4, { \
- { 0x000000c6, 0x000000bd }, { 0x000000fc, 0x000001bc } } }, \
- { 0x9ac8, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000001fc } } }, \
- { 0x9acc, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x0000003c } } }, \
- { 0x9ad0, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x0000007c } } }, \
- { 0x9ad4, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000bc } } }, \
- { 0x9ad8, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9adc, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9ae0, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9ae4, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9ae8, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9aec, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9af0, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9af4, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9af8, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
- { 0x9afc, { \
- { 0x000000c6, 0x000000fd }, { 0x000000fc, 0x000000fc } } }, \
+/* Initial RF Gain settings for RF5111 */
+#define AR5K_RF5111_INI_RFGAIN { \
+ /* 5Ghz 2Ghz */ \
+ { AR5K_RF_GAIN(0), { 0x000001a9, 0x00000000 } }, \
+ { AR5K_RF_GAIN(1), { 0x000001e9, 0x00000040 } }, \
+ { AR5K_RF_GAIN(2), { 0x00000029, 0x00000080 } }, \
+ { AR5K_RF_GAIN(3), { 0x00000069, 0x00000150 } }, \
+ { AR5K_RF_GAIN(4), { 0x00000199, 0x00000190 } }, \
+ { AR5K_RF_GAIN(5), { 0x000001d9, 0x000001d0 } }, \
+ { AR5K_RF_GAIN(6), { 0x00000019, 0x00000010 } }, \
+ { AR5K_RF_GAIN(7), { 0x00000059, 0x00000044 } }, \
+ { AR5K_RF_GAIN(8), { 0x00000099, 0x00000084 } }, \
+ { AR5K_RF_GAIN(9), { 0x000001a5, 0x00000148 } }, \
+ { AR5K_RF_GAIN(10), { 0x000001e5, 0x00000188 } }, \
+ { AR5K_RF_GAIN(11), { 0x00000025, 0x000001c8 } }, \
+ { AR5K_RF_GAIN(12), { 0x000001c8, 0x00000014 } }, \
+ { AR5K_RF_GAIN(13), { 0x00000008, 0x00000042 } }, \
+ { AR5K_RF_GAIN(14), { 0x00000048, 0x00000082 } }, \
+ { AR5K_RF_GAIN(15), { 0x00000088, 0x00000178 } }, \
+ { AR5K_RF_GAIN(16), { 0x00000198, 0x000001b8 } }, \
+ { AR5K_RF_GAIN(17), { 0x000001d8, 0x000001f8 } }, \
+ { AR5K_RF_GAIN(18), { 0x00000018, 0x00000012 } }, \
+ { AR5K_RF_GAIN(19), { 0x00000058, 0x00000052 } }, \
+ { AR5K_RF_GAIN(20), { 0x00000098, 0x00000092 } }, \
+ { AR5K_RF_GAIN(21), { 0x000001a4, 0x0000017c } }, \
+ { AR5K_RF_GAIN(22), { 0x000001e4, 0x000001bc } }, \
+ { AR5K_RF_GAIN(23), { 0x00000024, 0x000001fc } }, \
+ { AR5K_RF_GAIN(24), { 0x00000064, 0x0000000a } }, \
+ { AR5K_RF_GAIN(25), { 0x000000a4, 0x0000004a } }, \
+ { AR5K_RF_GAIN(26), { 0x000000e4, 0x0000008a } }, \
+ { AR5K_RF_GAIN(27), { 0x0000010a, 0x0000015a } }, \
+ { AR5K_RF_GAIN(28), { 0x0000014a, 0x0000019a } }, \
+ { AR5K_RF_GAIN(29), { 0x0000018a, 0x000001da } }, \
+ { AR5K_RF_GAIN(30), { 0x000001ca, 0x0000000e } }, \
+ { AR5K_RF_GAIN(31), { 0x0000000a, 0x0000004e } }, \
+ { AR5K_RF_GAIN(32), { 0x0000004a, 0x0000008e } }, \
+ { AR5K_RF_GAIN(33), { 0x0000008a, 0x0000015e } }, \
+ { AR5K_RF_GAIN(34), { 0x000001ba, 0x0000019e } }, \
+ { AR5K_RF_GAIN(35), { 0x000001fa, 0x000001de } }, \
+ { AR5K_RF_GAIN(36), { 0x0000003a, 0x00000009 } }, \
+ { AR5K_RF_GAIN(37), { 0x0000007a, 0x00000049 } }, \
+ { AR5K_RF_GAIN(38), { 0x00000186, 0x00000089 } }, \
+ { AR5K_RF_GAIN(39), { 0x000001c6, 0x00000179 } }, \
+ { AR5K_RF_GAIN(40), { 0x00000006, 0x000001b9 } }, \
+ { AR5K_RF_GAIN(41), { 0x00000046, 0x000001f9 } }, \
+ { AR5K_RF_GAIN(42), { 0x00000086, 0x00000039 } }, \
+ { AR5K_RF_GAIN(43), { 0x000000c6, 0x00000079 } }, \
+ { AR5K_RF_GAIN(44), { 0x000000c6, 0x000000b9 } }, \
+ { AR5K_RF_GAIN(45), { 0x000000c6, 0x000001bd } }, \
+ { AR5K_RF_GAIN(46), { 0x000000c6, 0x000001fd } }, \
+ { AR5K_RF_GAIN(47), { 0x000000c6, 0x0000003d } }, \
+ { AR5K_RF_GAIN(48), { 0x000000c6, 0x0000007d } }, \
+ { AR5K_RF_GAIN(49), { 0x000000c6, 0x000000bd } }, \
+ { AR5K_RF_GAIN(50), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(51), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(52), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(53), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(54), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(55), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(56), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(57), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(58), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(59), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(60), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(61), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(62), { 0x000000c6, 0x000000fd } }, \
+ { AR5K_RF_GAIN(63), { 0x000000c6, 0x000000fd } }, \
}
+/* Initial RF Gain settings for RF5112 */
+#define AR5K_RF5112_INI_RFGAIN { \
+ /* 5Ghz 2Ghz */ \
+ { AR5K_RF_GAIN(0), { 0x00000007, 0x00000007 } }, \
+ { AR5K_RF_GAIN(1), { 0x00000047, 0x00000047 } }, \
+ { AR5K_RF_GAIN(2), { 0x00000087, 0x00000087 } }, \
+ { AR5K_RF_GAIN(3), { 0x000001a0, 0x000001a0 } }, \
+ { AR5K_RF_GAIN(4), { 0x000001e0, 0x000001e0 } }, \
+ { AR5K_RF_GAIN(5), { 0x00000020, 0x00000020 } }, \
+ { AR5K_RF_GAIN(6), { 0x00000060, 0x00000060 } }, \
+ { AR5K_RF_GAIN(7), { 0x000001a1, 0x000001a1 } }, \
+ { AR5K_RF_GAIN(8), { 0x000001e1, 0x000001e1 } }, \
+ { AR5K_RF_GAIN(9), { 0x00000021, 0x00000021 } }, \
+ { AR5K_RF_GAIN(10), { 0x00000061, 0x00000061 } }, \
+ { AR5K_RF_GAIN(11), { 0x00000162, 0x00000162 } }, \
+ { AR5K_RF_GAIN(12), { 0x000001a2, 0x000001a2 } }, \
+ { AR5K_RF_GAIN(13), { 0x000001e2, 0x000001e2 } }, \
+ { AR5K_RF_GAIN(14), { 0x00000022, 0x00000022 } }, \
+ { AR5K_RF_GAIN(15), { 0x00000062, 0x00000062 } }, \
+ { AR5K_RF_GAIN(16), { 0x00000163, 0x00000163 } }, \
+ { AR5K_RF_GAIN(17), { 0x000001a3, 0x000001a3 } }, \
+ { AR5K_RF_GAIN(18), { 0x000001e3, 0x000001e3 } }, \
+ { AR5K_RF_GAIN(19), { 0x00000023, 0x00000023 } }, \
+ { AR5K_RF_GAIN(20), { 0x00000063, 0x00000063 } }, \
+ { AR5K_RF_GAIN(21), { 0x00000184, 0x00000184 } }, \
+ { AR5K_RF_GAIN(22), { 0x000001c4, 0x000001c4 } }, \
+ { AR5K_RF_GAIN(23), { 0x00000004, 0x00000004 } }, \
+ { AR5K_RF_GAIN(24), { 0x000001ea, 0x0000000b } }, \
+ { AR5K_RF_GAIN(25), { 0x0000002a, 0x0000004b } }, \
+ { AR5K_RF_GAIN(26), { 0x0000006a, 0x0000008b } }, \
+ { AR5K_RF_GAIN(27), { 0x000000aa, 0x000001ac } }, \
+ { AR5K_RF_GAIN(28), { 0x000001ab, 0x000001ec } }, \
+ { AR5K_RF_GAIN(29), { 0x000001eb, 0x0000002c } }, \
+ { AR5K_RF_GAIN(30), { 0x0000002b, 0x00000012 } }, \
+ { AR5K_RF_GAIN(31), { 0x0000006b, 0x00000052 } }, \
+ { AR5K_RF_GAIN(32), { 0x000000ab, 0x00000092 } }, \
+ { AR5K_RF_GAIN(33), { 0x000001ac, 0x00000193 } }, \
+ { AR5K_RF_GAIN(34), { 0x000001ec, 0x000001d3 } }, \
+ { AR5K_RF_GAIN(35), { 0x0000002c, 0x00000013 } }, \
+ { AR5K_RF_GAIN(36), { 0x0000003a, 0x00000053 } }, \
+ { AR5K_RF_GAIN(37), { 0x0000007a, 0x00000093 } }, \
+ { AR5K_RF_GAIN(38), { 0x000000ba, 0x00000194 } }, \
+ { AR5K_RF_GAIN(39), { 0x000001bb, 0x000001d4 } }, \
+ { AR5K_RF_GAIN(40), { 0x000001fb, 0x00000014 } }, \
+ { AR5K_RF_GAIN(41), { 0x0000003b, 0x0000003a } }, \
+ { AR5K_RF_GAIN(42), { 0x0000007b, 0x0000007a } }, \
+ { AR5K_RF_GAIN(43), { 0x000000bb, 0x000000ba } }, \
+ { AR5K_RF_GAIN(44), { 0x000001bc, 0x000001bb } }, \
+ { AR5K_RF_GAIN(45), { 0x000001fc, 0x000001fb } }, \
+ { AR5K_RF_GAIN(46), { 0x0000003c, 0x0000003b } }, \
+ { AR5K_RF_GAIN(47), { 0x0000007c, 0x0000007b } }, \
+ { AR5K_RF_GAIN(48), { 0x000000bc, 0x000000bb } }, \
+ { AR5K_RF_GAIN(49), { 0x000000fc, 0x000001bc } }, \
+ { AR5K_RF_GAIN(50), { 0x000000fc, 0x000001fc } }, \
+ { AR5K_RF_GAIN(51), { 0x000000fc, 0x0000003c } }, \
+ { AR5K_RF_GAIN(52), { 0x000000fc, 0x0000007c } }, \
+ { AR5K_RF_GAIN(53), { 0x000000fc, 0x000000bc } }, \
+ { AR5K_RF_GAIN(54), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(55), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(56), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(57), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(58), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(59), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(60), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(61), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(62), { 0x000000fc, 0x000000fc } }, \
+ { AR5K_RF_GAIN(63), { 0x000000fc, 0x000000fc } }, \
+}
+
+
+/*
+ * MAC/PHY REGISTERS
+ */
+
/*
- * Mode-independet initial register writes
+ * Mode-independent initial register writes
*/
struct ath5k_ini {
@@ -1239,7 +1255,7 @@ struct ath5k_ini {
{ AR5K_BB_GAIN(61), 0x0000002f }, \
{ AR5K_BB_GAIN(62), 0x0000002f }, \
{ AR5K_BB_GAIN(63), 0x0000002f }, \
- /* RF gain table (64btes) */ \
+ /* 5110 RF gain table (64btes) */ \
{ AR5K_RF_GAIN(0), 0x0000001d }, \
{ AR5K_RF_GAIN(1), 0x0000005d }, \
{ AR5K_RF_GAIN(2), 0x0000009d }, \
@@ -1597,6 +1613,7 @@ struct ath5k_ini {
{ 0x87d4, 0x17161514 }, \
{ 0x87d8, 0x1b1a1918 }, \
{ 0x87dc, 0x1f1e1d1c }, \
+ /* loop ? */ \
{ 0x87e0, 0x03020100 }, \
{ 0x87e4, 0x07060504 }, \
{ 0x87e8, 0x0b0a0908 }, \
@@ -1686,8 +1703,14 @@ struct ath5k_ini {
{ AR5K_PHY(658), 0x0fff3ffc }, \
{ AR5K_PHY_CCKTXCTL, 0x00000000 }, \
}
-/* RF5111 Initial BB Gain settings */
-#define AR5K_RF5111_BBGAIN_INI { \
+
+/*
+ * Initial BaseBand Gain settings for RF5111/5112 (only AR5210 comes with
+ * RF5110 so initial BB Gain settings are included in AR5K_AR5210_INI)
+ */
+
+/* RF5111 Initial BaseBand Gain settings */
+#define AR5K_RF5111_INI_BBGAIN { \
{ AR5K_BB_GAIN(0), 0x00000000 }, \
{ AR5K_BB_GAIN(1), 0x00000020 }, \
{ AR5K_BB_GAIN(2), 0x00000010 }, \
@@ -1754,8 +1777,8 @@ struct ath5k_ini {
{ AR5K_BB_GAIN(63), 0x00000016 }, \
}
-/* RF 5112 Initial BB Gain settings */
-#define AR5K_RF5112_BBGAIN_INI { \
+/* RF 5112 Initial BaseBand Gain settings */
+#define AR5K_RF5112_INI_BBGAIN { \
{ AR5K_BB_GAIN(0), 0x00000000 }, \
{ AR5K_BB_GAIN(1), 0x00000001 }, \
{ AR5K_BB_GAIN(2), 0x00000002 }, \
@@ -1822,331 +1845,231 @@ struct ath5k_ini {
{ AR5K_BB_GAIN(63), 0x0000001a }, \
}
-struct ath5k_ar5210_ini_mode{
- u16 mode_register;
- u32 mode_base, mode_turbo;
-};
-
-#define AR5K_AR5210_INI_MODE(hal, _aifs) { \
- { AR5K_SLOT_TIME, \
- AR5K_INIT_SLOT_TIME, \
- AR5K_INIT_SLOT_TIME_TURBO }, \
- { AR5K_SLOT_TIME, \
- AR5K_INIT_ACK_CTS_TIMEOUT, \
- AR5K_INIT_ACK_CTS_TIMEOUT_TURBO }, \
- { AR5K_USEC_5210, \
- AR5K_INIT_TRANSMIT_LATENCY, \
- AR5K_INIT_TRANSMIT_LATENCY_TURBO}, \
- { AR5K_IFS0, \
- ((AR5K_INIT_SIFS + (_aifs) * AR5K_INIT_SLOT_TIME) \
- << AR5K_IFS0_DIFS_S) | AR5K_INIT_SIFS, \
- ((AR5K_INIT_SIFS_TURBO + (_aifs) * AR5K_INIT_SLOT_TIME_TURBO) \
- << AR5K_IFS0_DIFS_S) | AR5K_INIT_SIFS_TURBO }, \
- { AR5K_IFS1, \
- AR5K_INIT_PROTO_TIME_CNTRL, \
- AR5K_INIT_PROTO_TIME_CNTRL_TURBO }, \
- { AR5K_PHY(17), \
- (ath5k_hw_reg_read(hal, AR5K_PHY(17)) & ~0x7F) | 0x1C, \
- (ath5k_hw_reg_read(hal, AR5K_PHY(17)) & ~0x7F) | 0x38 }, \
- { AR5K_PHY_FRAME_CTL_5210, \
- AR5K_PHY_FRAME_CTL_SERVICE_ERR | \
- AR5K_PHY_FRAME_CTL_TXURN_ERR | \
- AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \
- AR5K_PHY_FRAME_CTL_ILLRATE_ERR | \
- AR5K_PHY_FRAME_CTL_PARITY_ERR | \
- AR5K_PHY_FRAME_CTL_TIMING_ERR | 0x1020, \
- AR5K_PHY_FRAME_CTL_SERVICE_ERR | \
- AR5K_PHY_FRAME_CTL_TXURN_ERR | \
- AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \
- AR5K_PHY_FRAME_CTL_ILLRATE_ERR | \
- AR5K_PHY_FRAME_CTL_PARITY_ERR | \
- /*PHY_TURBO is PHY_FRAME_CTL on 5210*/ \
- AR5K_PHY_TURBO_MODE | \
- AR5K_PHY_TURBO_SHORT | \
- AR5K_PHY_FRAME_CTL_TIMING_ERR | 0x2020 }, \
-}
+/*
+ * Mode specific initial register values
+ */
-struct ath5k_ar5211_ini_mode {
+struct ath5k_ini_mode {
u16 mode_register;
- u32 mode_value[4];
+ u32 mode_value[5];
};
-#define AR5K_AR5211_INI_MODE { \
- { 0x0030, { 0x00000017, 0x00000017, 0x00000017, 0x00000017 } }, \
- { 0x1040, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1044, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1048, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x104c, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1050, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1054, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1058, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x105c, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1060, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1064, { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f } }, \
- { 0x1070, { 0x00000168, 0x000001e0, 0x000001b8, 0x00000168 } }, \
- { 0x1030, { 0x00000230, 0x000001e0, 0x000000b0, 0x00000230 } }, \
- { 0x10b0, { 0x00000d98, 0x00001180, 0x00001f48, 0x00000d98 } }, \
- { 0x10f0, { 0x0000a0e0, 0x00014068, 0x00005880, 0x0000a0e0 } }, \
- { 0x8014, { 0x04000400, 0x08000800, 0x20003000, 0x04000400 } }, \
- { 0x801c, { 0x0e8d8fa7, 0x0e8d8fcf, 0x01608f95, 0x0e8d8fa7 } }, \
- { 0x9804, { 0x00000000, 0x00000003, 0x00000000, 0x00000000 } }, \
- { 0x9820, { 0x02020200, 0x02020200, 0x02010200, 0x02020200 } }, \
- { 0x9824, { 0x00000e0e, 0x00000e0e, 0x00000707, 0x00000e0e } }, \
- { 0x9828, { 0x0a020001, 0x0a020001, 0x05010000, 0x0a020001 } }, \
- { 0x9834, { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } }, \
- { 0x9838, { 0x00000007, 0x00000007, 0x0000000b, 0x0000000b } }, \
- { 0x9844, { 0x1372169c, 0x137216a5, 0x137216a8, 0x1372169c } }, \
- { 0x9848, { 0x0018ba67, 0x0018ba67, 0x0018ba69, 0x0018ba69 } }, \
- { 0x9850, { 0x0c28b4e0, 0x0c28b4e0, 0x0c28b4e0, 0x0c28b4e0 } }, \
- { 0x9858, { 0x7e800d2e, 0x7e800d2e, 0x7ec00d2e, 0x7e800d2e } }, \
- { 0x985c, { 0x31375d5e, 0x31375d5e, 0x313a5d5e, 0x31375d5e } }, \
- { 0x9860, { 0x0000bd10, 0x0000bd10, 0x0000bd38, 0x0000bd10 } }, \
- { 0x9864, { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } }, \
- { 0x9914, { 0x00002710, 0x00002710, 0x0000157c, 0x00002710 } }, \
- { 0x9918, { 0x00000190, 0x00000190, 0x00000084, 0x00000190 } }, \
- { 0x9944, { 0x6fe01020, 0x6fe01020, 0x6fe00920, 0x6fe01020 } }, \
- { 0xa180, { 0x05ff14ff, 0x05ff14ff, 0x05ff14ff, 0x05ff19ff } }, \
- { 0x98d4, { 0x00000010, 0x00000014, 0x00000010, 0x00000010 } }, \
+/* Initial mode-specific settings for AR5211
+ * XXX: how about gTurbo ? RF5111 supports it, how about AR5211 ?
+ */
+#define AR5K_AR5211_INI_MODE { \
+ { AR5K_TXCFG, \
+ /* a/XR aTurbo b g(OFDM?) gTurbo (N/A) */ \
+ { 0x00000017, 0x00000017, 0x00000017, 0x00000017, 0x00000017 } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(0), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(1), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(2), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(3), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(4), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(5), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(6), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(7), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(8), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(9), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_DCU_GBL_IFS_SLOT, \
+ { 0x00000168, 0x000001e0, 0x000001b8, 0x00000168, 0x00000168 } }, \
+ { AR5K_DCU_GBL_IFS_SIFS, \
+ { 0x00000230, 0x000001e0, 0x000000b0, 0x00000230, 0x00000230 } }, \
+ { AR5K_DCU_GBL_IFS_EIFS, \
+ { 0x00000d98, 0x00001180, 0x00001f48, 0x00000d98, 0x00000d98 } }, \
+ { AR5K_DCU_GBL_IFS_MISC, \
+ { 0x0000a0e0, 0x00014068, 0x00005880, 0x0000a0e0, 0x0000a0e0 } }, \
+ { AR5K_TIME_OUT, \
+ { 0x04000400, 0x08000800, 0x20003000, 0x04000400, 0x04000400 } }, \
+ { AR5K_USEC_5211, \
+ { 0x0e8d8fa7, 0x0e8d8fcf, 0x01608f95, 0x0e8d8fa7, 0x0e8d8fa7 } }, \
+ { AR5K_PHY_TURBO, \
+ { 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000 } }, \
+ { 0x9820, \
+ { 0x02020200, 0x02020200, 0x02010200, 0x02020200, 0x02020200 } }, \
+ { 0x9824, \
+ { 0x00000e0e, 0x00000e0e, 0x00000707, 0x00000e0e, 0x00000e0e } }, \
+ { 0x9828, \
+ { 0x0a020001, 0x0a020001, 0x05010000, 0x0a020001, 0x0a020001 } }, \
+ { 0x9834, \
+ { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } }, \
+ { 0x9838, \
+ { 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } }, \
+ { 0x9844, \
+ { 0x1372169c, 0x137216a5, 0x137216a8, 0x1372169c, 0x1372169c } }, \
+ { 0x9848, \
+ { 0x0018ba67, 0x0018ba67, 0x0018ba69, 0x0018ba69, 0x0018ba69 } }, \
+ { 0x9850, \
+ { 0x0c28b4e0, 0x0c28b4e0, 0x0c28b4e0, 0x0c28b4e0, 0x0c28b4e0 } }, \
+ { AR5K_PHY_SIG, \
+ { 0x7e800d2e, 0x7e800d2e, 0x7ec00d2e, 0x7e800d2e, 0x7e800d2e } }, \
+ { AR5K_PHY_AGCCOARSE, \
+ { 0x31375d5e, 0x31375d5e, 0x313a5d5e, 0x31375d5e, 0x31375d5e } }, \
+ { AR5K_PHY_AGCCTL, \
+ { 0x0000bd10, 0x0000bd10, 0x0000bd38, 0x0000bd10, 0x0000bd10 } }, \
+ { AR5K_PHY_NF, \
+ { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } }, \
+ { AR5K_PHY_RX_DELAY, \
+ { 0x00002710, 0x00002710, 0x0000157c, 0x00002710, 0x00002710 } }, \
+ { 0x9918, \
+ { 0x00000190, 0x00000190, 0x00000084, 0x00000190, 0x00000190 } }, \
+ { AR5K_PHY_FRAME_CTL_5211, \
+ { 0x6fe01020, 0x6fe01020, 0x6fe00920, 0x6fe01020, 0x6fe01020 } }, \
+ { AR5K_PHY_PCDAC_TXPOWER(0), \
+ { 0x05ff14ff, 0x05ff14ff, 0x05ff14ff, 0x05ff19ff, 0x05ff19ff } }, \
+ { AR5K_RF_BUFFER_CONTROL_4, \
+ { 0x00000010, 0x00000014, 0x00000010, 0x00000010, 0x00000010 } }, \
}
-struct ath5k_ar5212_ini_mode {
- u16 mode_register;
- u8 mode_flags;
- u32 mode_value[2][5];
-};
-
-#define AR5K_INI_FLAG_511X 0x00
-#define AR5K_INI_FLAG_5111 0x01
-#define AR5K_INI_FLAG_5112 0x02
-#define AR5K_INI_FLAG_BOTH (AR5K_INI_FLAG_5111 | AR5K_INI_FLAG_5112)
-
-#define AR5K_AR5212_INI_MODE { \
- { 0x0030, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00008107, 0x00008107, 0x00008107, 0x00008107, 0x00008107 } \
- } }, \
- { 0x1040, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1044, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1048, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x104c, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1050, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1054, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1058, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x105c, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1060, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1064, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
- } }, \
- { 0x1030, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00000230, 0x000001e0, 0x000000b0, 0x00000160, 0x000001e0 } \
- } }, \
- { 0x1070, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00000168, 0x000001e0, 0x000001b8, 0x0000018c, 0x000001e0 } \
- } }, \
- { 0x10b0, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00000e60, 0x00001180, 0x00001f1c, 0x00003e38, 0x00001180 } \
- } }, \
- { 0x10f0, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x0000a0e0, 0x00014068, 0x00005880, 0x0000b0e0, 0x00014068 } \
- } }, \
- { 0x8014, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x03e803e8, 0x06e006e0, 0x04200420, 0x08400840, 0x06e006e0 } \
- } }, \
- { 0x9804, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000003 } \
- } }, \
- { 0x9820, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x02020200, 0x02020200, 0x02010200, 0x02020200, 0x02020200 } \
- } }, \
- { 0x9834, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } \
- } }, \
- { 0x9838, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } \
- } }, \
- { 0x9844, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x1372161c, 0x13721c25, 0x13721728, 0x137216a2, 0x13721c25 } \
- } }, \
- { 0x9850, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } \
- } }, \
- { 0x9858, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x7e800d2e, 0x7e800d2e, 0x7ee84d2e, 0x7ee84d2e, 0x7e800d2e } \
- } }, \
- { 0x9860, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d10, 0x00009d10 } \
- } }, \
- { 0x9864, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } \
- } }, \
- { 0x9868, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 } \
- } }, \
- { 0x9918, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x000001b8, 0x000001b8, 0x00000084, 0x00000108, 0x000001b8 } \
- } }, \
- { 0x9924, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05 } \
- } }, \
- { 0xa180, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x10ff14ff, 0x10ff14ff, 0x10ff10ff, 0x10ff19ff, 0x10ff19ff } \
- } }, \
- { 0xa230, AR5K_INI_FLAG_511X, { \
- { 0, }, \
- { 0x00000000, 0x00000000, 0x00000000, 0x00000108, 0x00000000 } \
- } }, \
- { 0x801c, AR5K_INI_FLAG_BOTH, { \
- { 0x128d8fa7, 0x09880fcf, 0x04e00f95, 0x128d8fab, 0x09880fcf }, \
- { 0x128d93a7, 0x098813cf, 0x04e01395, 0x128d93ab, 0x098813cf } \
- } }, \
- { 0x9824, AR5K_INI_FLAG_BOTH, { \
- { 0x00000e0e, 0x00000e0e, 0x00000707, 0x00000e0e, 0x00000e0e }, \
- { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } \
- } }, \
- { 0x9828, AR5K_INI_FLAG_BOTH, { \
- { 0x0a020001, 0x0a020001, 0x05010100, 0x0a020001, 0x0a020001 }, \
- { 0x0a020001, 0x0a020001, 0x05020100, 0x0a020001, 0x0a020001 } \
- } }, \
- { 0x9848, AR5K_INI_FLAG_BOTH, { \
- { 0x0018da5a, 0x0018da5a, 0x0018ca69, 0x0018ca69, 0x0018ca69 }, \
- { 0x0018da6d, 0x0018da6d, 0x0018ca75, 0x0018ca75, 0x0018ca75 } \
- } }, \
- { 0x985c, AR5K_INI_FLAG_BOTH, { \
- { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137615e }, \
- { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } \
- } }, \
- { 0x986c, AR5K_INI_FLAG_BOTH, { \
- { 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb080, 0x050cb080 }, \
- { 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 } \
- } }, \
- { 0x9914, AR5K_INI_FLAG_BOTH, { \
- { 0x00002710, 0x00002710, 0x0000157c, 0x00002af8, 0x00002710 }, \
- { 0x000007d0, 0x000007d0, 0x0000044c, 0x00000898, 0x000007d0 } \
- } }, \
- { 0x9944, AR5K_INI_FLAG_BOTH, { \
- { 0xffb81020, 0xffb81020, 0xffb80d20, 0xffb81020, 0xffb81020 }, \
- { 0xffb81020, 0xffb81020, 0xffb80d10, 0xffb81010, 0xffb81010 } \
- } }, \
- { 0xa204, AR5K_INI_FLAG_5112, { \
- { 0, }, \
- { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } \
- } }, \
- { 0xa208, AR5K_INI_FLAG_BOTH, { \
- { 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 }, \
- { 0xd6be6788, 0xd6be6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } \
- } }, \
- { 0xa20c, AR5K_INI_FLAG_5112, { \
- { 0, }, \
- { 0x642c0140, 0x642c0140, 0x6442c160, 0x6442c160, 0x6442c160 } \
- } }, \
+/* Initial mode-specific settings for AR5212 */
+#define AR5K_AR5212_INI_MODE { \
+ { AR5K_TXCFG, \
+ /* a/XR aTurbo b g (DYN) gTurbo */ \
+ { 0x00008107, 0x00008107, 0x00008107, 0x00008107, 0x00008107 } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(0), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(1), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(2), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(3), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(4), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(5), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(6), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(7), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(8), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_QUEUE_DFS_LOCAL_IFS(9), \
+ { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } }, \
+ { AR5K_DCU_GBL_IFS_SIFS, \
+ { 0x00000230, 0x000001e0, 0x000000b0, 0x00000160, 0x000001e0 } }, \
+ { AR5K_DCU_GBL_IFS_SLOT, \
+ { 0x00000168, 0x000001e0, 0x000001b8, 0x0000018c, 0x000001e0 } }, \
+ { AR5K_DCU_GBL_IFS_EIFS, \
+ { 0x00000e60, 0x00001180, 0x00001f1c, 0x00003e38, 0x00001180 } }, \
+ { AR5K_DCU_GBL_IFS_MISC, \
+ { 0x0000a0e0, 0x00014068, 0x00005880, 0x0000b0e0, 0x00014068 } }, \
+ { AR5K_TIME_OUT, \
+ { 0x03e803e8, 0x06e006e0, 0x04200420, 0x08400840, 0x06e006e0 } }, \
}
-struct ath5k_ar5211_ini_rf {
- u16 rf_register;
- u32 rf_value[2];
-};
+/* Initial mode-specific settings for AR5212 + RF5111 */
+#define AR5K_AR5212_RF5111_INI_MODE { \
+ { AR5K_USEC_5211, \
+ /* a/XR aTurbo b g gTurbo */ \
+ { 0x128d8fa7, 0x09880fcf, 0x04e00f95, 0x128d8fab, 0x09880fcf } }, \
+ { AR5K_PHY_TURBO, \
+ { 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000003 } }, \
+ { 0x9820, \
+ { 0x02020200, 0x02020200, 0x02010200, 0x02020200, 0x02020200 } }, \
+ { 0x9824, \
+ { 0x00000e0e, 0x00000e0e, 0x00000707, 0x00000e0e, 0x00000e0e } }, \
+ { 0x9828, \
+ { 0x0a020001, 0x0a020001, 0x05010100, 0x0a020001, 0x0a020001 } }, \
+ { 0x9834, \
+ { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } }, \
+ { 0x9838, \
+ { 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } }, \
+ { 0x9844, \
+ { 0x1372161c, 0x13721c25, 0x13721728, 0x137216a2, 0x13721c25 } }, \
+ { 0x9848, \
+ { 0x0018da5a, 0x0018da5a, 0x0018ca69, 0x0018ca69, 0x0018ca69 } }, \
+ { 0x9850, \
+ { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } }, \
+ { AR5K_PHY_SIG, \
+ { 0x7e800d2e, 0x7e800d2e, 0x7ee84d2e, 0x7ee84d2e, 0x7e800d2e } }, \
+ { AR5K_PHY_AGCCOARSE, \
+ { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137615e } }, \
+ { AR5K_PHY_AGCCTL, \
+ { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d10, 0x00009d10 } }, \
+ { AR5K_PHY_NF, \
+ { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } }, \
+ { AR5K_PHY_ADCSAT, \
+ { 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 } }, \
+ { 0x986c, \
+ { 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb080, 0x050cb080 } }, \
+ { AR5K_PHY_RX_DELAY, \
+ { 0x00002710, 0x00002710, 0x0000157c, 0x00002af8, 0x00002710 } }, \
+ { 0x9918, \
+ { 0x000001b8, 0x000001b8, 0x00000084, 0x00000108, 0x000001b8 } }, \
+ { 0x9924, \
+ { 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05 } }, \
+ { AR5K_PHY_FRAME_CTL_5211, \
+ { 0xffb81020, 0xffb81020, 0xffb80d20, 0xffb81020, 0xffb81020 } }, \
+ { AR5K_PHY_PCDAC_TXPOWER(0), \
+ { 0x10ff14ff, 0x10ff14ff, 0x10ff10ff, 0x10ff19ff, 0x10ff19ff } }, \
+ { 0xa230, \
+ { 0x00000000, 0x00000000, 0x00000000, 0x00000108, 0x00000000 } }, \
+ { 0xa208, \
+ { 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } }, \
+}
-#define AR5K_AR5211_INI_RF { \
-/* Static -> moved on ar5211_ini */ \
- { 0x0000a204, { 0x00000000, 0x00000000 } }, \
- { 0x0000a208, { 0x503e4646, 0x503e4646 } }, \
- { 0x0000a20c, { 0x6480416c, 0x6480416c } }, \
- { 0x0000a210, { 0x0199a003, 0x0199a003 } }, \
- { 0x0000a214, { 0x044cd610, 0x044cd610 } }, \
- { 0x0000a218, { 0x13800040, 0x13800040 } }, \
- { 0x0000a21c, { 0x1be00060, 0x1be00060 } }, \
- { 0x0000a220, { 0x0c53800a, 0x0c53800a } }, \
- { 0x0000a224, { 0x0014df3b, 0x0014df3b } }, \
- { 0x0000a228, { 0x000001b5, 0x000001b5 } }, \
- { 0x0000a22c, { 0x00000020, 0x00000020 } }, \
-/* Bank 6 ? */ \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00380000, 0x00380000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x000400f9, 0x000400f9 } }, \
- { 0x000098d4, { 0x00000000, 0x00000004 } }, \
-/* Bank 7 ? */ \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x10000000, 0x10000000 } }, \
- { 0x0000989c, { 0x04000000, 0x04000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x00000000 } }, \
- { 0x0000989c, { 0x00000000, 0x0a000000 } }, \
- { 0x0000989c, { 0x00380080, 0x02380080 } }, \
- { 0x0000989c, { 0x00020006, 0x00000006 } }, \
- { 0x0000989c, { 0x00000092, 0x00000092 } }, \
- { 0x0000989c, { 0x000000a0, 0x000000a0 } }, \
- { 0x0000989c, { 0x00040007, 0x00040007 } }, \
- { 0x000098d4, { 0x0000001a, 0x0000001a } }, \
- { 0x0000989c, { 0x00000048, 0x00000048 } }, \
- { 0x0000989c, { 0x00000010, 0x00000010 } }, \
- { 0x0000989c, { 0x00000008, 0x00000008 } }, \
- { 0x0000989c, { 0x0000000f, 0x0000000f } }, \
- { 0x0000989c, { 0x000000f2, 0x00000062 } }, \
- { 0x0000989c, { 0x0000904f, 0x0000904c } }, \
- { 0x0000989c, { 0x0000125a, 0x0000129a } }, \
- { 0x000098cc, { 0x0000000e, 0x0000000f } }, \
+/* Initial mode-specific settings for AR5212 + RF5112 */
+#define AR5K_AR5212_RF5112_INI_MODE { \
+ { AR5K_USEC_5211, \
+ /* a/XR aTurbo b g gTurbo */ \
+ { 0x128d93a7, 0x098813cf, 0x04e01395, 0x128d93ab, 0x098813cf } }, \
+ { AR5K_PHY_TURBO, \
+ { 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000003 } }, \
+ { 0x9820, \
+ { 0x02020200, 0x02020200, 0x02010200, 0x02020200, 0x02020200 } }, \
+ { 0x9824, \
+ { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } }, \
+ { 0x9828, \
+ { 0x0a020001, 0x0a020001, 0x05020100, 0x0a020001, 0x0a020001 } }, \
+ { 0x9834, \
+ { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } }, \
+ { 0x9838, \
+ { 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } }, \
+ { 0x9844, \
+ { 0x1372161c, 0x13721c25, 0x13721728, 0x137216a2, 0x13721c25 } }, \
+ { 0x9848, \
+ { 0x0018da6d, 0x0018da6d, 0x0018ca75, 0x0018ca75, 0x0018ca75 } }, \
+ { 0x9850, \
+ { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } }, \
+ { AR5K_PHY_SIG, \
+ { 0x7e800d2e, 0x7e800d2e, 0x7ee84d2e, 0x7ee84d2e, 0x7e800d2e } }, \
+ { AR5K_PHY_AGCCOARSE, \
+ { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } }, \
+ { AR5K_PHY_AGCCTL, \
+ { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d10, 0x00009d10 } }, \
+ { AR5K_PHY_NF, \
+ { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } }, \
+ { AR5K_PHY_ADCSAT, \
+ { 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 } }, \
+ { 0x986c, \
+ { 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 } }, \
+ { AR5K_PHY_RX_DELAY, \
+ { 0x000007d0, 0x000007d0, 0x0000044c, 0x00000898, 0x000007d0 } }, \
+ { 0x9918, \
+ { 0x000001b8, 0x000001b8, 0x00000084, 0x00000108, 0x000001b8 } }, \
+ { 0x9924, \
+ { 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05 } }, \
+ { AR5K_PHY_FRAME_CTL_5211, \
+ { 0xffb81020, 0xffb81020, 0xffb80d10, 0xffb81010, 0xffb81010 } }, \
+ { AR5K_PHY_PCDAC_TXPOWER(0), \
+ { 0x10ff14ff, 0x10ff14ff, 0x10ff10ff, 0x10ff19ff, 0x10ff19ff } }, \
+ { 0xa230, \
+ { 0x00000000, 0x00000000, 0x00000000, 0x00000108, 0x00000000 } }, \
+ { AR5K_PHY_CCKTXCTL, \
+ { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } }, \
+ { 0xa208, \
+ { 0xd6be6788, 0xd6be6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } }, \
+ { AR5K_PHY_GAIN_2GHZ, \
+ { 0x642c0140, 0x642c0140, 0x6442c160, 0x6442c160, 0x6442c160 } }, \
}
^ permalink raw reply related
* [PATCH 3/4] Net: ath5k, use short preamble for some rates
From: Jiri Slaby @ 2007-08-25 7:58 UTC (permalink / raw)
To: linville-2XuSBdqkA4R54TAoqtyWWQ
Cc: Andrew Morton, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <149438602455517207-+5AFNAhbZwkm4RdzfppkhA@public.gmane.org>
ath5k, use short preamble for some rates
2, 5.5 and 11 in b/g are now in short preamble mode
Signed-off-by: Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: <linville-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org>
---
commit 0a11d301ccb5caf1c9738a7307002a5295aecd58
tree f812c3fb91651437c7b434afbd4f8dc8435611f0
parent 0aebc8bb5574b6b0cc8f9f0d73672c1bee5cbfbb
author Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:24:05 +0200
committer Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:24:05 +0200
drivers/net/wireless/ath5k.h | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/ath5k.h b/drivers/net/wireless/ath5k.h
index c70cd30..ad5e196 100644
--- a/drivers/net/wireless/ath5k.h
+++ b/drivers/net/wireless/ath5k.h
@@ -613,9 +613,9 @@ struct ath5k_rate_table {
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \
{ 1, MODULATION_CCK, 1000, 27, 130, 0 }, \
- { 1, MODULATION_CCK, 2000, 26, 132, 1 }, \
- { 1, MODULATION_CCK, 5500, 25, 139, 1 }, \
- { 1, MODULATION_CCK, 11000, 24, 150, 1 } } \
+ { 1, MODULATION_CCK_SP, 2000, 26, 132, 1 }, \
+ { 1, MODULATION_CCK_SP, 5500, 25, 139, 1 }, \
+ { 1, MODULATION_CCK_SP, 11000, 24, 150, 1 } } \
}
#define AR5K_RATES_11G { 12, { \
@@ -623,9 +623,9 @@ struct ath5k_rate_table {
11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \
{ 1, MODULATION_CCK, 1000, 27, 2, 0 }, \
- { 1, MODULATION_CCK, 2000, 26, 4, 1 }, \
- { 1, MODULATION_CCK, 5500, 25, 11, 1 }, \
- { 1, MODULATION_CCK, 11000, 24, 22, 1 }, \
+ { 1, MODULATION_CCK_SP, 2000, 26, 4, 1 }, \
+ { 1, MODULATION_CCK_SP, 5500, 25, 11, 1 }, \
+ { 1, MODULATION_CCK_SP, 11000, 24, 22, 1 }, \
{ 0, MODULATION_OFDM, 6000, 11, 12, 4 }, \
{ 0, MODULATION_OFDM, 9000, 15, 18, 4 }, \
{ 1, MODULATION_OFDM, 12000, 10, 24, 6 }, \
^ permalink raw reply related
* [PATCH 4/4] Net: ath5k, remove some ieee80211 re-defines
From: Jiri Slaby @ 2007-08-25 7:59 UTC (permalink / raw)
To: linville-2XuSBdqkA4R54TAoqtyWWQ
Cc: Andrew Morton, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-wireless-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <149438602455517207-+5AFNAhbZwkm4RdzfppkhA@public.gmane.org>
ath5k, remove some ieee80211 re-defines
use mac80211 defines directly instead. this means MODULATION_* to
IEEE80211_RATE_* switch.
Signed-off-by: Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: <linville-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org>
---
commit c858c1b27bfb4c58c9ebfa24de0d6442e364db97
tree 1add137b1e95ca1b4905441b5e30c779f8801c36
parent 0a11d301ccb5caf1c9738a7307002a5295aecd58
author Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:25:32 +0200
committer Jiri Slaby <jirislaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sat, 25 Aug 2007 09:25:32 +0200
drivers/net/wireless/ath5k.h | 92 ++++++++++++++++++-------------------
drivers/net/wireless/ath5k_base.c | 2 -
drivers/net/wireless/ath5k_hw.c | 9 ++--
3 files changed, 50 insertions(+), 53 deletions(-)
diff --git a/drivers/net/wireless/ath5k.h b/drivers/net/wireless/ath5k.h
index ad5e196..78d7cb2 100644
--- a/drivers/net/wireless/ath5k.h
+++ b/drivers/net/wireless/ath5k.h
@@ -82,7 +82,7 @@
#define AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF 0
#define AR5K_TUNE_RADAR_ALERT false
#define AR5K_TUNE_MIN_TX_FIFO_THRES 1
-#define AR5K_TUNE_MAX_TX_FIFO_THRES ((MAX_PDU_LENGTH / 64) + 1)
+#define AR5K_TUNE_MAX_TX_FIFO_THRES ((IEEE80211_MAX_LEN / 64) + 1)
#define AR5K_TUNE_RSSI_THRES 1792
#define AR5K_TUNE_REGISTER_TIMEOUT 20000
#define AR5K_TUNE_REGISTER_DWELL_TIME 20000
@@ -187,18 +187,14 @@ struct ath5k_srev_name {
#define IEEE80211_MAX_LEN 2500
-#define MAX_PDU_LENGTH IEEE80211_MAX_LEN
-#define MODULATION_CCK IEEE80211_RATE_CCK
-#define MODULATION_OFDM IEEE80211_RATE_OFDM
-#define MODULATION_TURBO IEEE80211_RATE_TURBO
+/* TODO Merge this to mac80211 */
#define MODULATION_XR 0x00000200 /*XR thingie*/
-#define MODULATION_CCK_SP IEEE80211_RATE_CCK_2 /*CCK + Shortpreamble*/
#define AR5K_SET_SHORT_PREAMBLE 0x04 /* adding this flag to rate_code
enables short preamble, see
ar5212_reg.h */
-#define HAS_SHPREAMBLE(_ix) (rt->rates[_ix].modulation == MODULATION_CCK_SP)
-#define SHPREAMBLE_FLAG(_ix) HAS_SHPREAMBLE(_ix)?AR5K_SET_SHORT_PREAMBLE:0
+#define HAS_SHPREAMBLE(_ix) (rt->rates[_ix].modulation == IEEE80211_RATE_CCK_2)
+#define SHPREAMBLE_FLAG(_ix) (HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0)
/****************\
TX DEFINITIONS
@@ -598,56 +594,56 @@ struct ath5k_rate_table {
255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0, \
7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255, \
255, 255, 255, 255, 255, 255, 255, 255 }, { \
- { 1, MODULATION_OFDM, 6000, 11, 140, 0 }, \
- { 1, MODULATION_OFDM, 9000, 15, 18, 0 }, \
- { 1, MODULATION_OFDM, 12000, 10, 152, 2 }, \
- { 1, MODULATION_OFDM, 18000, 14, 36, 2 }, \
- { 1, MODULATION_OFDM, 24000, 9, 176, 4 }, \
- { 1, MODULATION_OFDM, 36000, 13, 72, 4 }, \
- { 1, MODULATION_OFDM, 48000, 8, 96, 4 }, \
- { 1, MODULATION_OFDM, 54000, 12, 108, 4 } } \
+ { 1, IEEE80211_RATE_OFDM, 6000, 11, 140, 0 }, \
+ { 1, IEEE80211_RATE_OFDM, 9000, 15, 18, 0 }, \
+ { 1, IEEE80211_RATE_OFDM, 12000, 10, 152, 2 }, \
+ { 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 2 }, \
+ { 1, IEEE80211_RATE_OFDM, 24000, 9, 176, 4 }, \
+ { 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 4 }, \
+ { 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 4 }, \
+ { 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 4 } } \
}
#define AR5K_RATES_11B { 4, { \
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \
- { 1, MODULATION_CCK, 1000, 27, 130, 0 }, \
- { 1, MODULATION_CCK_SP, 2000, 26, 132, 1 }, \
- { 1, MODULATION_CCK_SP, 5500, 25, 139, 1 }, \
- { 1, MODULATION_CCK_SP, 11000, 24, 150, 1 } } \
+ { 1, IEEE80211_RATE_CCK, 1000, 27, 130, 0 }, \
+ { 1, IEEE80211_RATE_CCK_2, 2000, 26, 132, 1 }, \
+ { 1, IEEE80211_RATE_CCK_2, 5500, 25, 139, 1 }, \
+ { 1, IEEE80211_RATE_CCK_2, 11000, 24, 150, 1 } } \
}
#define AR5K_RATES_11G { 12, { \
255, 255, 255, 255, 255, 255, 255, 255, 10, 8, 6, 4, \
11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \
- { 1, MODULATION_CCK, 1000, 27, 2, 0 }, \
- { 1, MODULATION_CCK_SP, 2000, 26, 4, 1 }, \
- { 1, MODULATION_CCK_SP, 5500, 25, 11, 1 }, \
- { 1, MODULATION_CCK_SP, 11000, 24, 22, 1 }, \
- { 0, MODULATION_OFDM, 6000, 11, 12, 4 }, \
- { 0, MODULATION_OFDM, 9000, 15, 18, 4 }, \
- { 1, MODULATION_OFDM, 12000, 10, 24, 6 }, \
- { 1, MODULATION_OFDM, 18000, 14, 36, 6 }, \
- { 1, MODULATION_OFDM, 24000, 9, 48, 8 }, \
- { 1, MODULATION_OFDM, 36000, 13, 72, 8 }, \
- { 1, MODULATION_OFDM, 48000, 8, 96, 8 }, \
- { 1, MODULATION_OFDM, 54000, 12, 108, 8 } } \
+ { 1, IEEE80211_RATE_CCK, 1000, 27, 2, 0 }, \
+ { 1, IEEE80211_RATE_CCK_2, 2000, 26, 4, 1 }, \
+ { 1, IEEE80211_RATE_CCK_2, 5500, 25, 11, 1 }, \
+ { 1, IEEE80211_RATE_CCK_2, 11000, 24, 22, 1 }, \
+ { 0, IEEE80211_RATE_OFDM, 6000, 11, 12, 4 }, \
+ { 0, IEEE80211_RATE_OFDM, 9000, 15, 18, 4 }, \
+ { 1, IEEE80211_RATE_OFDM, 12000, 10, 24, 6 }, \
+ { 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 6 }, \
+ { 1, IEEE80211_RATE_OFDM, 24000, 9, 48, 8 }, \
+ { 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 8 }, \
+ { 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 8 }, \
+ { 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 8 } } \
}
#define AR5K_RATES_TURBO { 8, { \
255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0, \
7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255, \
255, 255, 255, 255, 255, 255, 255, 255 }, { \
- { 1, MODULATION_TURBO, 6000, 11, 140, 0 }, \
- { 1, MODULATION_TURBO, 9000, 15, 18, 0 }, \
- { 1, MODULATION_TURBO, 12000, 10, 152, 2 }, \
- { 1, MODULATION_TURBO, 18000, 14, 36, 2 }, \
- { 1, MODULATION_TURBO, 24000, 9, 176, 4 }, \
- { 1, MODULATION_TURBO, 36000, 13, 72, 4 }, \
- { 1, MODULATION_TURBO, 48000, 8, 96, 4 }, \
- { 1, MODULATION_TURBO, 54000, 12, 108, 4 } } \
+ { 1, IEEE80211_RATE_TURBO, 6000, 11, 140, 0 }, \
+ { 1, IEEE80211_RATE_TURBO, 9000, 15, 18, 0 }, \
+ { 1, IEEE80211_RATE_TURBO, 12000, 10, 152, 2 }, \
+ { 1, IEEE80211_RATE_TURBO, 18000, 14, 36, 2 }, \
+ { 1, IEEE80211_RATE_TURBO, 24000, 9, 176, 4 }, \
+ { 1, IEEE80211_RATE_TURBO, 36000, 13, 72, 4 }, \
+ { 1, IEEE80211_RATE_TURBO, 48000, 8, 96, 4 }, \
+ { 1, IEEE80211_RATE_TURBO, 54000, 12, 108, 4 } } \
}
#define AR5K_RATES_XR { 12, { \
@@ -658,14 +654,14 @@ struct ath5k_rate_table {
{ 1, MODULATION_XR, 1000, 2, 139, 1 }, \
{ 1, MODULATION_XR, 2000, 6, 150, 2 }, \
{ 1, MODULATION_XR, 3000, 1, 150, 3 }, \
- { 1, MODULATION_OFDM, 6000, 11, 140, 4 }, \
- { 1, MODULATION_OFDM, 9000, 15, 18, 4 }, \
- { 1, MODULATION_OFDM, 12000, 10, 152, 6 }, \
- { 1, MODULATION_OFDM, 18000, 14, 36, 6 }, \
- { 1, MODULATION_OFDM, 24000, 9, 176, 8 }, \
- { 1, MODULATION_OFDM, 36000, 13, 72, 8 }, \
- { 1, MODULATION_OFDM, 48000, 8, 96, 8 }, \
- { 1, MODULATION_OFDM, 54000, 12, 108, 8 } } \
+ { 1, IEEE80211_RATE_OFDM, 6000, 11, 140, 4 }, \
+ { 1, IEEE80211_RATE_OFDM, 9000, 15, 18, 4 }, \
+ { 1, IEEE80211_RATE_OFDM, 12000, 10, 152, 6 }, \
+ { 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 6 }, \
+ { 1, IEEE80211_RATE_OFDM, 24000, 9, 176, 8 }, \
+ { 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 8 }, \
+ { 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 8 }, \
+ { 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 8 } } \
}
/*
diff --git a/drivers/net/wireless/ath5k_base.c b/drivers/net/wireless/ath5k_base.c
index 7f938c4..4bbccf9 100644
--- a/drivers/net/wireless/ath5k_base.c
+++ b/drivers/net/wireless/ath5k_base.c
@@ -1089,7 +1089,7 @@ static void ath_setcurmode(struct ath_softc *sc, unsigned int mode)
}
sc->hwmap[i].txflags = IEEE80211_RADIOTAP_F_DATAPAD;
if (SHPREAMBLE_FLAG(ix) || rt->rates[ix].modulation ==
- MODULATION_OFDM)
+ IEEE80211_RATE_OFDM)
sc->hwmap[i].txflags |=
IEEE80211_RADIOTAP_F_SHORTPRE;
/* receive frames include FCS */
diff --git a/drivers/net/wireless/ath5k_hw.c b/drivers/net/wireless/ath5k_hw.c
index 887213d..3501b4c 100644
--- a/drivers/net/wireless/ath5k_hw.c
+++ b/drivers/net/wireless/ath5k_hw.c
@@ -142,15 +142,16 @@ ath_hal_computetxtime(struct ath_hw *hal, const struct ath5k_rate_table *rates,
* Calculate the transmission time by operation (PHY) mode
*/
switch (rate->modulation) {
- case MODULATION_CCK:
+ case IEEE80211_RATE_CCK:
/*
* CCK / DS mode (802.11b)
*/
value = AR5K_CCK_TX_TIME(rate->rate_kbps, frame_length,
- (short_preamble && (rate->modulation == MODULATION_CCK_SP)));
+ short_preamble &&
+ rate->modulation == IEEE80211_RATE_CCK_2);
break;
- case MODULATION_OFDM:
+ case IEEE80211_RATE_OFDM:
/*
* Orthogonal Frequency Division Multiplexing
*/
@@ -159,7 +160,7 @@ ath_hal_computetxtime(struct ath_hw *hal, const struct ath5k_rate_table *rates,
value = AR5K_OFDM_TX_TIME(rate->rate_kbps, frame_length);
break;
- case MODULATION_TURBO:
+ case IEEE80211_RATE_TURBO:
/*
* Orthogonal Frequency Division Multiplexing
* Atheros "Turbo Mode" (doubled rates)
^ permalink raw reply related
* [PATCH 1/1] MAINTAINERS, order NETERION alphabetically
From: Jiri Slaby @ 2007-08-25 8:00 UTC (permalink / raw)
To: Andrew Morton
Cc: linux-kernel, ram.vepa, santosh.rastapur, sivakumar.subramani,
sreenivasa.honnur, netdev
MAINTAINERS, order NETERION alphabetically
Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
---
commit f5f10b061961546a77300f3ebe92abd9cb5b9b48
tree 90ad6e22504aeaadb17309d01996eb6cd7eb5a93
parent c858c1b27bfb4c58c9ebfa24de0d6442e364db97
author Jiri Slaby <jirislaby@gmail.com> Sat, 25 Aug 2007 09:39:05 +0200
committer Jiri Slaby <jirislaby@gmail.com> Sat, 25 Aug 2007 09:39:05 +0200
MAINTAINERS | 26 +++++++++++++-------------
1 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 16a8abd..c986d11 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2654,6 +2654,19 @@ M: shemminger@linux-foundation.org
L: netem@lists.linux-foundation.org
S: Maintained
+NETERION (S2IO) Xframe 10GbE DRIVER
+P: Ramkrishna Vepa
+M: ram.vepa@neterion.com
+P: Rastapur Santosh
+M: santosh.rastapur@neterion.com
+P: Sivakumar Subramani
+M: sivakumar.subramani@neterion.com
+P: Sreenivasa Honnur
+M: sreenivasa.honnur@neterion.com
+L: netdev@vger.kernel.org
+W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/TitleIndex?anonymous
+S: Supported
+
NETFILTER/IPTABLES/IPCHAINS
P: Rusty Russell
P: Marc Boucher
@@ -2788,19 +2801,6 @@ M: adaplas@gmail.com
L: linux-fbdev-devel@lists.sourceforge.net (subscribers-only)
S: Maintained
-NETERION (S2IO) Xframe 10GbE DRIVER
-P: Ramkrishna Vepa
-M: ram.vepa@neterion.com
-P: Rastapur Santosh
-M: santosh.rastapur@neterion.com
-P: Sivakumar Subramani
-M: sivakumar.subramani@neterion.com
-P: Sreenivasa Honnur
-M: sreenivasa.honnur@neterion.com
-L: netdev@vger.kernel.org
-W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/TitleIndex?anonymous
-S: Supported
-
OPENCORES I2C BUS DRIVER
P: Peter Korsgaard
M: jacmet@sunsite.dk
^ permalink raw reply related
* Re: [PATCH 4/5] [TCP]: Discard fuzzy SACK blocks
From: Ilpo Järvinen @ 2007-08-25 8:47 UTC (permalink / raw)
To: David Miller; +Cc: Netdev
In-Reply-To: <20070824.225529.43496742.davem@davemloft.net>
[-- Attachment #1: Type: TEXT/PLAIN, Size: 3971 bytes --]
On Fri, 24 Aug 2007, David Miller wrote:
> From: "Ilpo_Järvinen" <ilpo.jarvinen@helsinki.fi>
> Date: Mon, 20 Aug 2007 16:16:32 +0300
>
> > SACK processing code has been a sort of russian roulette as no
> > validation of SACK blocks is previously attempted. Besides, it
> > is not very clear what all kinds of broken SACK blocks really
> > mean (e.g., one that has start and end sequence numbers
> > reversed). So now close the roulette once and for all.
> >
> > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@helsinki.fi>
>
> Thanks a lot for coding this up, I like it a lot, applied.
>
> I have some minor worries about the D-SACK lower bound, but
> it's probably OK and I'm just being paranoid :-)
...Please tell what is your concern rather than hinting :-), or is it
just a hunch?...
Elsewhere we do a similar checking anyway (I might eventually end up
dropping this check in dsack as duplicate due to other planned changes
but it's necessary still as the validation is being done in the mainloop
after check_dsack call):
/* D-SACK for already forgotten data... Do dumb counting. */
if (dup_sack &&
!after(end_seq_0, prior_snd_una) &&
after(end_seq_0, tp->undo_marker))
tp->undo_retrans--;
...It's natural that due to HW duplication that we get DSACK below
undo_marker when state <= CA_CWR. In general, they almost always mean
exactly that, a HW duplication, so instead IMHO we should account them as
DSACK lying bit in sack_ok and disable DSACK undos for that flow (similar
case is !EVER_RETRANS skb gets DSACKed). In theory, it could be delayed
rexmission or something but we've already lost our state already and
cannot verify that, so choosing the conservative dsack-lying bit there
seems fine and should even be right thing for majority of the cases
anyway. I was planning to do something along those lines later...
The key problem here was (in the previous version that was in tcp-2.6),
that the whole validation business becomes rather useless, if any invalid
SACK blocks (those that really aren't DSACK but due to bug, malicious or
whatever reason) below snd_una gets accepted as DSACK, that's basically
the thing I wanted to avoid as it will be significant for the half of
the seqno space... Now there's hopefully a bit smaller window for such
garbage... :-)
Key exits from tcp_is_sackblock_valid reside before those checks anyway,
so they shouldn't be that problematic in performance wise either. ...I was
thinking of adding unlikely to the latter checks but wasn't too sure if
that's wise thing to do as malicious entity could push TCP to do them
(basically at will), Comments?
One additional note: the mainloop operates anyway only in the seqno range
above prior_snd_una (earlier skbs already being dropped), that can't ever
be < undo_marker (so some of the DSACK checks are not yet strictly
necessary but I wanted to do things right from the beginning as I might
end up re-placing validation soo ;-)). ...So our discussion currently
probably covers seqno range that is not going to have any significance at
all... :-)
Maybe my "Too old" comment deserves some additional explanation:
[PATCH] [TCP]: More verbose comment to DSACK validation
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@helsinki.fi>
---
net/ipv4/tcp_input.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 8692d0b..cd187c6 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -1070,7 +1070,10 @@ static int tcp_is_sackblock_valid(struct tcp_sock *tp, int is_dsack,
if (!before(start_seq, tp->undo_marker))
return 1;
- /* Too old */
+ /* Too old (it no longer has any significance to TCP state though
+ * it can be valid; for more complete explanation see comment above
+ * and similar validation done in tcp_check_dsack())
+ */
if (!after(end_seq, tp->undo_marker))
return 0;
--
1.5.0.6
^ permalink raw reply related
* Re: [PATCH 2.6.23-rc3-mm1] request_irq fix DEBUG_SHIRQ handling Re: 2.6.23-rc2-mm1: rtl8139 inconsistent lock state
From: Mariusz Kozlowski @ 2007-08-25 9:43 UTC (permalink / raw)
To: Jarek Poplawski
Cc: Andrew Morton, netdev, Jeff Garzik, David Woodhouse, Ingo Molnar,
Thomas Gleixner, linux-kernel
In-Reply-To: <20070822133511.GH1684@ff.dom.local>
> > =================================
> > [ INFO: inconsistent lock state ]
> > 2.6.23-rc2-mm1 #7
> > ---------------------------------
> > inconsistent {in-hardirq-W} -> {hardirq-on-W} usage.
> > ifconfig/5492 [HC0[0]:SC0[0]:HE1:SE1] takes:
> > (&tp->lock){+...}, at: [<de8706e0>] rtl8139_interrupt+0x27/0x46b [8139too]
> > {in-hardirq-W} state was registered at:
> > [<c0138eeb>] __lock_acquire+0x949/0x11ac
> > [<c01397e7>] lock_acquire+0x99/0xb2
> > [<c0452ff3>] _spin_lock+0x35/0x42
> > [<de8706e0>] rtl8139_interrupt+0x27/0x46b [8139too]
> > [<c0147a5d>] handle_IRQ_event+0x28/0x59
> > [<c01493ca>] handle_level_irq+0xad/0x10b
> > [<c0105a13>] do_IRQ+0x93/0xd0
> > [<c010441e>] common_interrupt+0x2e/0x34
> ...
> > other info that might help us debug this:
> > 1 lock held by ifconfig/5492:
> > #0: (rtnl_mutex){--..}, at: [<c0451778>] mutex_lock+0x1c/0x1f
> >
> > stack backtrace:
> ...
> > [<c0452ff3>] _spin_lock+0x35/0x42
> > [<de8706e0>] rtl8139_interrupt+0x27/0x46b [8139too]
> > [<c01480fd>] free_irq+0x11b/0x146
> > [<de871d59>] rtl8139_close+0x8a/0x14a [8139too]
> > [<c03bde63>] dev_close+0x57/0x74
> ...
>
> It looks like this was possible after David's fix, which really
> enabled running of the handler in free_irq, but before Andrew's patch
> disabling local irqs for this time.
>
> So, this bug should be fixed, but IMHO similar problem is possible in
> request_irq. And, I think, this is not only about lockdep complaining,
> but real lockup possibility, because any locks in such a handler are
> taken in another, not expected for them context, and could be
> vulnerable (especially with softirqs, but probably hardirqs as well).
>
> Reported-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
> Signed-off-by: Jarek Poplawski <jarkao2@o2.pl>
>
> ---
>
> diff -Nurp 2.6.23-rc3-mm1-/kernel/irq/manage.c 2.6.23-rc3-mm1/kernel/irq/manage.c
> --- 2.6.23-rc3-mm1-/kernel/irq/manage.c 2007-08-22 13:58:58.000000000 +0200
> +++ 2.6.23-rc3-mm1/kernel/irq/manage.c 2007-08-22 14:12:21.000000000 +0200
> @@ -546,14 +546,11 @@ int request_irq(unsigned int irq, irq_ha
> * We do this before actually registering it, to make sure that
> * a 'real' IRQ doesn't run in parallel with our fake
> */
> - if (irqflags & IRQF_DISABLED) {
> - unsigned long flags;
> + unsigned long flags;
>
> - local_irq_save(flags);
> - handler(irq, dev_id);
> - local_irq_restore(flags);
> - } else
> - handler(irq, dev_id);
> + local_irq_save(flags);
> + handler(irq, dev_id);
> + local_irq_restore(flags);
> }
> #endif
I tested your patch and it still happens. Dmesg info from patched kernel attached.
I coulnd't reproduce that on 2.6.23-rc3-mm1 - but on 2.6.23-rc2-mm2 it is easily
reproducible.
If you need more info, test some patches, etc. - just mail me.
Pozdrawiam,
Mariusz
=========================================================
[ INFO: possible irq lock inversion dependency detected ]
2.6.23-rc2-mm2 #2
---------------------------------------------------------
runscript.sh/5065 just changed the state of lock:
(_xmit_ETHER){-+..}, at: [<c03cb659>] dev_watchdog+0x17/0xcc
but this lock took another, soft-irq-unsafe lock in the past:
(&tp->lock){--..}
and interrupts could create inverse lock ordering between them.
other info that might help us debug this:
1 lock held by runscript.sh/5065:
#0: (&mm->mmap_sem){----}, at: [<c0454569>] do_page_fault+0x159/0x6f0
the first lock's dependencies:
-> (_xmit_ETHER){-+..} ops: 21 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c045281a>] _spin_lock_bh+0x3a/0x47
[<c03bc096>] dev_set_rx_mode+0x14/0x3b
[<c03bc59f>] dev_change_flags+0x68/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c03cb659>] dev_watchdog+0x17/0xcc
[<c01224b7>] run_timer_softirq+0x14b/0x1a9
[<c011ecc2>] __do_softirq+0x5b/0xb2
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c014b039>] find_lock_page+0x9b/0xa5
[<c014d680>] filemap_fault+0x188/0x4d9
[<c015760d>] __do_fault+0xb7/0x444
[<c0159164>] handle_mm_fault+0x18a/0x6fc
[<c0454864>] do_page_fault+0x454/0x6f0
[<c0453102>] error_code+0x6a/0x70
[<ffffffff>] 0xffffffff
hardirq-on-W at:
[<c01393d0>] __lock_acquire+0x73e/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c045281a>] _spin_lock_bh+0x3a/0x47
[<c03bc096>] dev_set_rx_mode+0x14/0x3b
[<c03bc59f>] dev_change_flags+0x68/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
}
... key at: [<c087e9e8>] netdev_xmit_lock_key+0x8/0x1c0
-> (&tp->lock){--..} ops: 44 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<de8706e2>] rtl8139_interrupt+0x27/0x469 [8139too]
[<c0148bae>] request_irq+0xd6/0xf8
[<de87152d>] rtl8139_open+0x2f/0x1e2 [8139too]
[<c03be7fd>] dev_open+0x37/0x76
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
softirq-on-W at:
[<c01393f9>] __lock_acquire+0x767/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<de8706e2>] rtl8139_interrupt+0x27/0x469 [8139too]
[<c01487ed>] free_irq+0x11b/0x146
[<de871c90>] rtl8139_close+0x8a/0x14a [8139too]
[<c03bd5c3>] dev_close+0x57/0x74
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
hardirq-on-W at:
[<c01393d0>] __lock_acquire+0x73e/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<de8706e2>] rtl8139_interrupt+0x27/0x469 [8139too]
[<c01487ed>] free_irq+0x11b/0x146
[<de871c90>] rtl8139_close+0x8a/0x14a [8139too]
[<c03bd5c3>] dev_close+0x57/0x74
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
}
... key at: [<de875190>] __key.19796+0x0/0xffffd3c9 [8139too]
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<de870275>] rtl8139_set_rx_mode+0x1e/0x166 [8139too]
[<c03bbe62>] __dev_set_rx_mode+0x24/0x85
[<c03bc0a8>] dev_set_rx_mode+0x26/0x3b
[<c03be820>] dev_open+0x5a/0x76
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
-> (&priv->lock){++..} ops: 103 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04529bc>] _spin_lock_irq+0x3b/0x48
[<ded03256>] orinoco_init+0x8f5/0xbbd [orinoco]
[<c03bdbce>] register_netdevice+0x13a/0x3f8
[<c03bdebe>] register_netdev+0x32/0x3f
[<ded2c4bb>] orinoco_cs_probe+0x368/0x3df [orinoco_cs]
[<ded378d9>] pcmcia_device_probe+0xc9/0x14c [pcmcia]
[<c02f323f>] driver_probe_device+0xa6/0x198
[<c02f3482>] __driver_attach+0xa2/0xa4
[<c02f270a>] bus_for_each_dev+0x43/0x61
[<c02f30c1>] driver_attach+0x19/0x1b
[<c02f2a79>] bus_add_driver+0x7e/0x1a5
[<c02f362f>] driver_register+0x45/0x75
[<ded38560>] pcmcia_register_driver+0xdb/0x12f [pcmcia]
[<de87c024>] 0xde87c024
[<c0140a47>] sys_init_module+0xc4/0x1622
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
in-hardirq-W at:
[<c01395db>] __lock_acquire+0x949/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<ded03bb4>] orinoco_interrupt+0x3f/0x1219 [orinoco]
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<ded06a99>] orinoco_get_wireless_stats+0xeb/0x140 [orinoco]
[<c042b2aa>] get_wireless_stats+0x1a/0x21
[<c042bf59>] wireless_seq_show+0x20/0x143
[<c0187347>] seq_read+0x1af/0x2b8
[<c01a1ec2>] proc_reg_read+0x57/0x78
[<c016d771>] vfs_read+0xaa/0x147
[<c016db96>] sys_read+0x3d/0x7b
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<ded03bb4>] orinoco_interrupt+0x3f/0x1219 [orinoco]
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<ded06a99>] orinoco_get_wireless_stats+0xeb/0x140 [orinoco]
[<c042b2aa>] get_wireless_stats+0x1a/0x21
[<c042bf59>] wireless_seq_show+0x20/0x143
[<c0187347>] seq_read+0x1af/0x2b8
[<c01a1ec2>] proc_reg_read+0x57/0x78
[<c016d771>] vfs_read+0xaa/0x147
[<c016db96>] sys_read+0x3d/0x7b
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
}
... key at: [<ded0a298>] __key.20430+0x0/0xffffc9cd [orinoco]
-> (lweventlist_lock){+...} ops: 8 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c03c78cb>] linkwatch_add_event+0x10/0x31
[<c03c79aa>] linkwatch_fire_event+0x35/0x37
[<c03cb35a>] netif_carrier_off+0x19/0x20
[<ded023b5>] alloc_orinocodev+0x181/0x19c [orinoco]
[<ded2c170>] orinoco_cs_probe+0x1d/0x3df [orinoco_cs]
[<ded378d9>] pcmcia_device_probe+0xc9/0x14c [pcmcia]
[<c02f323f>] driver_probe_device+0xa6/0x198
[<c02f3482>] __driver_attach+0xa2/0xa4
[<c02f270a>] bus_for_each_dev+0x43/0x61
[<c02f30c1>] driver_attach+0x19/0x1b
[<c02f2a79>] bus_add_driver+0x7e/0x1a5
[<c02f362f>] driver_register+0x45/0x75
[<ded38560>] pcmcia_register_driver+0xdb/0x12f [pcmcia]
[<de87c024>] 0xde87c024
[<c0140a47>] sys_init_module+0xc4/0x1622
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
in-hardirq-W at:
[<c01395db>] __lock_acquire+0x949/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c03c78cb>] linkwatch_add_event+0x10/0x31
[<c03c79aa>] linkwatch_fire_event+0x35/0x37
[<c03cb38a>] netif_carrier_on+0x29/0x2b
[<ded04bdc>] orinoco_interrupt+0x1067/0x1219 [orinoco]
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c03706bb>] cpuidle_idle_call+0x74/0x99
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
}
... key at: [<c05e4990>] lweventlist_lock+0x10/0x20
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c03c78cb>] linkwatch_add_event+0x10/0x31
[<c03c79aa>] linkwatch_fire_event+0x35/0x37
[<c03cb38a>] netif_carrier_on+0x29/0x2b
[<ded04bdc>] orinoco_interrupt+0x1067/0x1219 [orinoco]
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c03706bb>] cpuidle_idle_call+0x74/0x99
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
-> (&cwq->lock){++..} ops: 4755 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c0129002>] __queue_work+0xf/0x2d
[<c012909f>] queue_work+0x57/0x90
[<c0128714>] call_usermodehelper_exec+0xce/0xe1
[<c0265375>] kobject_uevent_env+0x34d/0x449
[<c026547b>] kobject_uevent+0xa/0xf
[<c0264b59>] kset_register+0x32/0x38
[<c0264b67>] subsystem_register+0x8/0xa
[<c02f2c8a>] bus_register+0x65/0x1f3
[<c0611db6>] platform_bus_init+0x23/0x38
[<c0611e0c>] driver_init+0x1c/0x31
[<c05fc68d>] kernel_init+0x5d/0x26b
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
in-hardirq-W at:
[<c01395db>] __lock_acquire+0x949/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c0129002>] __queue_work+0xf/0x2d
[<c012909f>] queue_work+0x57/0x90
[<c029238a>] acpi_os_execute+0xae/0xcb
[<c02aa216>] acpi_ec_gpe_handler+0x4d/0x5e
[<c0297f41>] acpi_ev_gpe_dispatch+0x4b/0x115
[<c0298243>] acpi_ev_gpe_detect+0x9a/0xe1
[<c0296979>] acpi_ev_sci_xrupt_handler+0x15/0x1d
[<c0291a9e>] acpi_irq+0xe/0x18
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c0129002>] __queue_work+0xf/0x2d
[<c0129044>] delayed_work_timer_fn+0x24/0x28
[<c01224b7>] run_timer_softirq+0x14b/0x1a9
[<c011ecc2>] __do_softirq+0x5b/0xb2
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c0452cac>] _spin_unlock+0x16/0x4d
[<c02638ce>] _atomic_dec_and_lock+0x2e/0x50
[<c017e962>] dput+0x36/0x101
[<c0176080>] __link_path_walk+0x8de/0xe06
[<c0176603>] link_path_walk+0x5b/0xe0
[<c01766a0>] path_walk+0x18/0x1a
[<c01768b2>] do_path_lookup+0x8f/0x21c
[<c017757a>] __path_lookup_intent_open+0x44/0x99
[<c0177658>] path_lookup_open+0x21/0x27
[<c0171056>] open_exec+0x27/0xac
[<c0172776>] do_execve+0x34/0x181
[<c0102752>] sys_execve+0x48/0x98
[<c0104256>] syscall_call+0x7/0xb
[<ffffffff>] 0xffffffff
}
... key at: [<c0657ae8>] __key.11148+0x0/0x8
-> (&q->lock){++..} ops: 69175 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04529bc>] _spin_lock_irq+0x3b/0x48
[<c044fce5>] wait_for_completion+0x24/0xb5
[<c012c1d1>] kthread_create+0x69/0xa8
[<c0606fcc>] cpu_callback+0x48/0xa3
[<c0607043>] spawn_ksoftirqd+0x1c/0x4e
[<c05fc66c>] kernel_init+0x3c/0x26b
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
in-hardirq-W at:
[<c01395db>] __lock_acquire+0x949/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c0113d3b>] __wake_up+0x15/0x42
[<c02aa1ef>] acpi_ec_gpe_handler+0x26/0x5e
[<c0297f41>] acpi_ev_gpe_dispatch+0x4b/0x115
[<c0298243>] acpi_ev_gpe_detect+0x9a/0xe1
[<c0296979>] acpi_ev_sci_xrupt_handler+0x15/0x1d
[<c0291a9e>] acpi_irq+0xe/0x18
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c0113c7c>] complete+0x15/0x4b
[<c0129ebe>] wakeme_after_rcu+0xb/0xd
[<c012a013>] __rcu_process_callbacks+0x69/0x1cf
[<c012a18b>] rcu_process_callbacks+0x12/0x23
[<c011eda3>] tasklet_action+0x3b/0x7b
[<c011ecc2>] __do_softirq+0x5b/0xb2
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
}
... key at: [<c0657f30>] __key.11466+0x0/0x8
-> (&rq->rq_lock_key){++..} ops: 212030 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c060664a>] init_idle+0x40/0x6d
[<c06067e0>] sched_init+0x169/0x17c
[<c05fc970>] start_kernel+0xd5/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-hardirq-W at:
[<c01395db>] __lock_acquire+0x949/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c01157f3>] scheduler_tick+0x20/0x192
[<c0122c31>] update_process_times+0x43/0x62
[<c0134325>] tick_periodic+0x24/0x75
[<c013438e>] tick_handle_periodic+0x18/0x7a
[<c01064ae>] timer_interrupt+0xe/0x15
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c014890a>] setup_irq+0xf2/0x20d
[<c060656f>] time_init_hook+0x19/0x1b
[<c05ffcc8>] hpet_time_init+0xd/0x15
[<c05fca70>] start_kernel+0x1d5/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c01157f3>] scheduler_tick+0x20/0x192
[<c0122c31>] update_process_times+0x43/0x62
[<c0134325>] tick_periodic+0x24/0x75
[<c013438e>] tick_handle_periodic+0x18/0x7a
[<c01064ae>] timer_interrupt+0xe/0x15
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c029cf88>] acpi_ex_system_io_space_handler+0x3f/0x45
[<c0296612>] acpi_ev_address_space_dispatch+0x12f/0x170
[<c029a374>] acpi_ex_access_region+0x1a7/0x1b9
[<c029a497>] acpi_ex_field_datum_io+0x111/0x198
[<c029a812>] acpi_ex_write_with_update_rule+0xf7/0x100
[<c029aa97>] acpi_ex_insert_into_field+0x27c/0x289
[<c02991cc>] acpi_ex_write_data_to_field+0x207/0x21f
[<c029d1f8>] acpi_ex_store_object_to_node+0x70/0xa5
[<c029d387>] acpi_ex_store+0xd5/0x216
[<c029b2e6>] acpi_ex_opcode_1A_1T_1R+0x3a8/0x504
[<c0293f74>] acpi_ds_exec_end_op+0xc1/0x3bd
[<c02a2238>] acpi_ps_parse_loop+0x539/0x6d9
[<c02a16fa>] acpi_ps_parse_aml+0x68/0x235
[<c02a291c>] acpi_ps_execute_method+0x111/0x1b5
[<c029fd5b>] acpi_ns_evaluate+0x93/0xe8
[<c02a509c>] acpi_ut_evaluate_object+0x55/0x15f
[<c02a521f>] acpi_ut_execute_STA+0x1d/0x49
[<c029f7e7>] acpi_ns_get_device_callback+0x5a/0x11c
[<c02a0e74>] acpi_ns_walk_namespace+0xf0/0x10c
[<c029f711>] acpi_get_devices+0x47/0x5d
[<c06100a6>] pnpacpi_init+0x5e/0x8b
[<c05fc6c7>] kernel_init+0x97/0x26b
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
}
... key at: [<c0635d28>] per_cpu__runqueues+0x468/0x470
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c0114ec2>] task_rq_lock+0x28/0x40
[<c011504c>] try_to_wake_up+0x18/0x92
[<c01150d1>] default_wake_function+0xb/0xd
[<c011284b>] __wake_up_common+0x39/0x59
[<c0113ca1>] complete+0x3a/0x4b
[<c012c037>] kthread+0x1f/0x58
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c0113d3b>] __wake_up+0x15/0x42
[<c0128c6b>] insert_work+0x60/0x75
[<c0129012>] __queue_work+0x1f/0x2d
[<c012909f>] queue_work+0x57/0x90
[<c0128714>] call_usermodehelper_exec+0xce/0xe1
[<c0265375>] kobject_uevent_env+0x34d/0x449
[<c026547b>] kobject_uevent+0xa/0xf
[<c0264b59>] kset_register+0x32/0x38
[<c0264b67>] subsystem_register+0x8/0xa
[<c02f2c8a>] bus_register+0x65/0x1f3
[<c0611db6>] platform_bus_init+0x23/0x38
[<c0611e0c>] driver_init+0x1c/0x31
[<c05fc68d>] kernel_init+0x5d/0x26b
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c0129002>] __queue_work+0xf/0x2d
[<c012909f>] queue_work+0x57/0x90
[<c01294af>] queue_delayed_work+0x27/0x48
[<c01294f2>] schedule_delayed_work+0x22/0x26
[<c03c792c>] linkwatch_schedule_work+0x40/0x89
[<c03c7999>] linkwatch_fire_event+0x24/0x37
[<c03cb38a>] netif_carrier_on+0x29/0x2b
[<ded04bdc>] orinoco_interrupt+0x1067/0x1219 [orinoco]
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c03706bb>] cpuidle_idle_call+0x74/0x99
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
-> (base_lock_keys + cpu){++..} ops: 85554 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c01229f6>] lock_timer_base+0x41/0x66
[<c0122ab8>] __mod_timer+0x3b/0xc5
[<c0122bea>] mod_timer+0x47/0x4b
[<c0611091>] con_init+0x24b/0x27e
[<c061075a>] console_init+0x20/0x2e
[<c05fca30>] start_kernel+0x195/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-hardirq-W at:
[<c01395db>] __lock_acquire+0x949/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c01229f6>] lock_timer_base+0x41/0x66
[<c0122a47>] del_timer+0x2c/0x62
[<c0302a7b>] ide_intr+0x72/0x1f0
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04529bc>] _spin_lock_irq+0x3b/0x48
[<c0122395>] run_timer_softirq+0x29/0x1a9
[<c011ecc2>] __do_softirq+0x5b/0xb2
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c014890a>] setup_irq+0xf2/0x20d
[<c060656f>] time_init_hook+0x19/0x1b
[<c05ffcc8>] hpet_time_init+0xd/0x15
[<c05fca70>] start_kernel+0x1d5/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
}
... key at: [<c0657a96>] base_lock_keys+0x0/0xa
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c01229f6>] lock_timer_base+0x41/0x66
[<c0122ab8>] __mod_timer+0x3b/0xc5
[<c0122bea>] mod_timer+0x47/0x4b
[<c03cae57>] __netdev_watchdog_up+0x37/0x50
[<c03cb380>] netif_carrier_on+0x1f/0x2b
[<ded04bdc>] orinoco_interrupt+0x1067/0x1219 [orinoco]
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c03706bb>] cpuidle_idle_call+0x74/0x99
[<c01025e4>] cpu_idle+0x87/0x89
[<c044f204>] rest_init+0x60/0x62
[<c05fcad5>] start_kernel+0x23a/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
-> (&list->lock#2){.+..} ops: 12 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c03b70ab>] skb_queue_tail+0x14/0x33
[<c042b66b>] wireless_send_event+0x348/0x369
[<c042b9a9>] ioctl_standard_call+0x1b2/0x34d
[<c042be9e>] wext_handle_ioctl+0x35a/0x3e4
[<c03be755>] dev_ioctl+0x31e/0x325
[<c03b152c>] sock_ioctl+0xb7/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c03b715c>] skb_dequeue+0x12/0x50
[<c042b31d>] wireless_nlevent_process+0x2d/0x33
[<c011eda3>] tasklet_action+0x3b/0x7b
[<c011ecc2>] __do_softirq+0x5b/0xb2
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<ded028e3>] orinoco_ioctl_commit+0x8e/0x10c [orinoco]
[<c042b2e0>] call_commit_handler+0x2f/0x3f
[<c042b9c2>] ioctl_standard_call+0x1cb/0x34d
[<c042be9e>] wext_handle_ioctl+0x35a/0x3e4
[<c03be755>] dev_ioctl+0x31e/0x325
[<c03b152c>] sock_ioctl+0xb7/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
}
... key at: [<c0884a80>] __key.13323+0x0/0x20
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c03b70ab>] skb_queue_tail+0x14/0x33
[<c042b66b>] wireless_send_event+0x348/0x369
[<ded03b69>] orinoco_send_wevents+0x9a/0xa6 [orinoco]
[<c0128b28>] run_workqueue+0x110/0x1f3
[<c0129648>] worker_thread+0x9a/0xf2
[<c012c04e>] kthread+0x36/0x58
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
-> (&rq->rq_lock_key){++..} ops: 212030 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<c060664a>] init_idle+0x40/0x6d
[<c06067e0>] sched_init+0x169/0x17c
[<c05fc970>] start_kernel+0xd5/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-hardirq-W at:
[<c01395db>] __lock_acquire+0x949/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c01157f3>] scheduler_tick+0x20/0x192
[<c0122c31>] update_process_times+0x43/0x62
[<c0134325>] tick_periodic+0x24/0x75
[<c013438e>] tick_handle_periodic+0x18/0x7a
[<c01064ae>] timer_interrupt+0xe/0x15
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c014890a>] setup_irq+0xf2/0x20d
[<c060656f>] time_init_hook+0x19/0x1b
[<c05ffcc8>] hpet_time_init+0xd/0x15
[<c05fca70>] start_kernel+0x1d5/0x2c5
[<00000000>] 0x0
[<ffffffff>] 0xffffffff
in-softirq-W at:
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c01157f3>] scheduler_tick+0x20/0x192
[<c0122c31>] update_process_times+0x43/0x62
[<c0134325>] tick_periodic+0x24/0x75
[<c013438e>] tick_handle_periodic+0x18/0x7a
[<c01064ae>] timer_interrupt+0xe/0x15
[<c014814d>] handle_IRQ_event+0x28/0x59
[<c0149a0a>] handle_level_irq+0xad/0x10b
[<c01058f3>] do_IRQ+0x93/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c029cf88>] acpi_ex_system_io_space_handler+0x3f/0x45
[<c0296612>] acpi_ev_address_space_dispatch+0x12f/0x170
[<c029a374>] acpi_ex_access_region+0x1a7/0x1b9
[<c029a497>] acpi_ex_field_datum_io+0x111/0x198
[<c029a812>] acpi_ex_write_with_update_rule+0xf7/0x100
[<c029aa97>] acpi_ex_insert_into_field+0x27c/0x289
[<c02991cc>] acpi_ex_write_data_to_field+0x207/0x21f
[<c029d1f8>] acpi_ex_store_object_to_node+0x70/0xa5
[<c029d387>] acpi_ex_store+0xd5/0x216
[<c029b2e6>] acpi_ex_opcode_1A_1T_1R+0x3a8/0x504
[<c0293f74>] acpi_ds_exec_end_op+0xc1/0x3bd
[<c02a2238>] acpi_ps_parse_loop+0x539/0x6d9
[<c02a16fa>] acpi_ps_parse_aml+0x68/0x235
[<c02a291c>] acpi_ps_execute_method+0x111/0x1b5
[<c029fd5b>] acpi_ns_evaluate+0x93/0xe8
[<c02a509c>] acpi_ut_evaluate_object+0x55/0x15f
[<c02a521f>] acpi_ut_execute_STA+0x1d/0x49
[<c029f7e7>] acpi_ns_get_device_callback+0x5a/0x11c
[<c02a0e74>] acpi_ns_walk_namespace+0xf0/0x10c
[<c029f711>] acpi_get_devices+0x47/0x5d
[<c06100a6>] pnpacpi_init+0x5e/0x8b
[<c05fc6c7>] kernel_init+0x97/0x26b
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
}
... key at: [<c0635d28>] per_cpu__runqueues+0x468/0x470
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c0114ec2>] task_rq_lock+0x28/0x40
[<c011504c>] try_to_wake_up+0x18/0x92
[<c01150ee>] wake_up_process+0xf/0x11
[<c011f5cc>] __tasklet_schedule+0x6d/0x6f
[<c042b687>] wireless_send_event+0x364/0x369
[<ded03b69>] orinoco_send_wevents+0x9a/0xa6 [orinoco]
[<c0128b28>] run_workqueue+0x110/0x1f3
[<c0129648>] worker_thread+0x9a/0xf2
[<c012c04e>] kthread+0x36/0x58
[<c010454b>] kernel_thread_helper+0x7/0x1c
[<ffffffff>] 0xffffffff
... acquired at:
[<c0139d2d>] __lock_acquire+0x109b/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c0452a4f>] _spin_lock_irqsave+0x3e/0x4e
[<ded03598>] orinoco_set_multicast_list+0x1b/0x5f [orinoco]
[<c03bbe62>] __dev_set_rx_mode+0x24/0x85
[<c03bc0a8>] dev_set_rx_mode+0x26/0x3b
[<c03be820>] dev_open+0x5a/0x76
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
the second lock's dependencies:
-> (&tp->lock){--..} ops: 44 {
initial-use at:
[<c0138ea9>] __lock_acquire+0x217/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<de8706e2>] rtl8139_interrupt+0x27/0x469 [8139too]
[<c0148bae>] request_irq+0xd6/0xf8
[<de87152d>] rtl8139_open+0x2f/0x1e2 [8139too]
[<c03be7fd>] dev_open+0x37/0x76
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
softirq-on-W at:
[<c01393f9>] __lock_acquire+0x767/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<de8706e2>] rtl8139_interrupt+0x27/0x469 [8139too]
[<c01487ed>] free_irq+0x11b/0x146
[<de871c90>] rtl8139_close+0x8a/0x14a [8139too]
[<c03bd5c3>] dev_close+0x57/0x74
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
hardirq-on-W at:
[<c01393d0>] __lock_acquire+0x73e/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<de8706e2>] rtl8139_interrupt+0x27/0x469 [8139too]
[<c01487ed>] free_irq+0x11b/0x146
[<de871c90>] rtl8139_close+0x8a/0x14a [8139too]
[<c03bd5c3>] dev_close+0x57/0x74
[<c03bc5c5>] dev_change_flags+0x8e/0x190
[<c03fcb4c>] devinet_ioctl+0x4af/0x652
[<c03fd432>] inet_ioctl+0x56/0x71
[<c03b151a>] sock_ioctl+0xa5/0x1d4
[<c0178a42>] do_ioctl+0x22/0x71
[<c0178ae6>] vfs_ioctl+0x55/0x29e
[<c0178d62>] sys_ioctl+0x33/0x69
[<c01041da>] sysenter_past_esp+0x5f/0x99
[<ffffffff>] 0xffffffff
}
... key at: [<de875190>] __key.19796+0x0/0xffffd3c9 [8139too]
stack backtrace:
[<c0104899>] show_trace_log_lvl+0x1a/0x30
[<c0105296>] show_trace+0x12/0x14
[<c01053fe>] dump_stack+0x15/0x17
[<c0137462>] print_irq_inversion_bug+0x101/0x123
[<c0137db1>] check_usage_forwards+0x3e/0x45
[<c0137f67>] mark_lock+0x1af/0x70c
[<c0139384>] __lock_acquire+0x6f2/0x11ac
[<c0139ed7>] lock_acquire+0x99/0xb2
[<c04527d3>] _spin_lock+0x35/0x42
[<c03cb659>] dev_watchdog+0x17/0xcc
[<c01224b7>] run_timer_softirq+0x14b/0x1a9
[<c011ecc2>] __do_softirq+0x5b/0xb2
[<c011ed66>] do_softirq+0x4d/0x4f
[<c011f04b>] irq_exit+0x48/0x4a
[<c01058f8>] do_IRQ+0x98/0xd0
[<c010444e>] common_interrupt+0x2e/0x34
[<c014b039>] find_lock_page+0x9b/0xa5
[<c014d680>] filemap_fault+0x188/0x4d9
[<c015760d>] __do_fault+0xb7/0x444
[<c0159164>] handle_mm_fault+0x18a/0x6fc
[<c0454864>] do_page_fault+0x454/0x6f0
[<c0453102>] error_code+0x6a/0x70
=======================
Clocksource tsc unstable (delta = 9373021754 ns)
^ permalink raw reply
* [XFRM] policy: Replace magic number with XFRM_POLICY_OUT
From: Thomas Graf @ 2007-08-25 10:53 UTC (permalink / raw)
To: davem; +Cc: netdev
Signed-off-by: Thomas Graf <tgraf@suug.ch>
Index: net-2.6.24/net/xfrm/xfrm_policy.c
===================================================================
--- net-2.6.24.orig/net/xfrm/xfrm_policy.c 2007-08-24 13:11:17.000000000 +0200
+++ net-2.6.24/net/xfrm/xfrm_policy.c 2007-08-24 13:11:48.000000000 +0200
@@ -1477,7 +1477,7 @@ restart:
pol_dead = 0;
xfrm_nr = 0;
- if (sk && sk->sk_policy[1]) {
+ if (sk && sk->sk_policy[XFRM_POLICY_OUT]) {
policy = xfrm_sk_policy_lookup(sk, XFRM_POLICY_OUT, fl);
if (IS_ERR(policy))
return PTR_ERR(policy);
^ permalink raw reply
* Re: [PATCH] ucc_geth: kill unused include
From: Kumar Gala @ 2007-08-25 14:57 UTC (permalink / raw)
To: Jeff Garzik; +Cc: Paul Mackerras, netdev, linuxppc-dev, Li Yang
In-Reply-To: <46CFB1FA.1040705@garzik.org>
On Aug 24, 2007, at 11:37 PM, Jeff Garzik wrote:
> Kumar Gala wrote:
>> The ucc_geth_mii code is based on the gianfar_mii code that use to
>> include
>> ocp.h. ucc never need this and it causes issues when we want to kill
>> arch/ppc includes from arch/powerpc.
>> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
>> ---
>> Jeff, if you issue with this for 2.6.23, I'd prefer to push this via
>> the powerpc.git trees in 2.6.24 as part of a larger cleanup. Let
>> me know
>> one way or the other.
>> - k
>> drivers/net/ucc_geth_mii.c | 1 -
>> 1 files changed, 0 insertions(+), 1 deletions(-)
>> diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
>> index 6c257b8..df884f0 100644
>> --- a/drivers/net/ucc_geth_mii.c
>> +++ b/drivers/net/ucc_geth_mii.c
>> @@ -32,7 +32,6 @@
>> #include <linux/mm.h>
>> #include <linux/module.h>
>> #include <linux/platform_device.h>
>> -#include <asm/ocp.h>
>> #include <linux/crc32.h>
>> #include <linux/mii.h>
>
> Feel free to push via PPC git
will do.
thanks
- k
^ permalink raw reply
* Re: [Bug 8934] System freeze when restarting network connection with Broadcom driver
From: Andrew Morton @ 2007-08-25 16:08 UTC (permalink / raw)
To: Michal Piotrowski
Cc: bugme-daemon, linux-wireless, netdev, casteyde.christian, mchan
In-Reply-To: <20070825102624.732A810807E@picon.linux-foundation.org>
On Sat, 25 Aug 2007 03:26:24 -0700 (PDT) bugme-daemon@bugzilla.kernel.org wrote:
> http://bugzilla.kernel.org/show_bug.cgi?id=8934
Various nasty box-killing things happening here and
http://bugzilla.kernel.org/show_bug.cgi?id=8937 might be related.
Michal, 8934 (at least) is a post-2.6.22 regression - can you please add it
to the list?
^ permalink raw reply
* iproute2: no error messages for unsupported table requests
From: Martin von Gagern @ 2007-08-25 16:29 UTC (permalink / raw)
To: netdev
[-- Attachment #1: Type: text/plain, Size: 1188 bytes --]
Hi!
A while ago I've tried to configure multiple routing tables using
iproute2-2.6.20. As my kernel at that time was configured without
CONFIG_IP_MULTIPLE_TABLES this could not work. However, I got no error
message from the ip command, the route was added to the main table, and
it took me quite a while to locate the error.
From what a quick diff to 2.6.22 tells me, there seems to be no change
addressing the issue, so I guess the same would hold for that version.
Originally I had reported this issue with my distro, Gentoo:
http://bugs.gentoo.org/show_bug.cgi?id=181928
Now a Gentoo dev directed me towards this list here.
There I also posted the steps I used to reproduce the issue:
ip route add 123.45.67.89 dev ppp0 table 100
ip route show table 100
ip route show table main
Expected result:
route listed in table 100 but not listed in table main
Actual result:
route listed in table main, table 100 still empty
I now have resolved the issue for me by reconfiguring my kernel, but you
could probably save others some trouble by generating an error message
in case the kernel doesn't support multiple tables.
Greetings,
Martin von Gagern
[-- Attachment #2: OpenPGP digital signature --]
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^ permalink raw reply
* [PATCH] bmac: add simple ethtool support for network manager
From: Olaf Hering @ 2007-08-25 18:32 UTC (permalink / raw)
To: linuxppc-dev, netdev
NetworkManager will not start dhcpd on an interface unless it reports
link-up state via ethtool.
Signed-off-by: Olaf Hering <olaf@aepfle.de>
---
drivers/net/bmac.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
--- a/drivers/net/bmac.c
+++ b/drivers/net/bmac.c
@@ -19,6 +19,7 @@
#include <linux/spinlock.h>
#include <linux/crc32.h>
#include <linux/bitrev.h>
+#include <linux/ethtool.h>
#include <asm/prom.h>
#include <asm/dbdma.h>
#include <asm/io.h>
@@ -1246,6 +1247,17 @@ static void bmac_reset_and_enable(struct
}
spin_unlock_irqrestore(&bp->lock, flags);
}
+static void bmac_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
+{
+ struct bmac_data *bp = netdev_priv(dev);
+ strcpy(info->driver, "bmac");
+ strcpy(info->bus_info, bp->mdev->ofdev.dev.bus_id);
+}
+
+static const struct ethtool_ops bmac_ethtool_ops = {
+ .get_drvinfo = bmac_get_drvinfo,
+ .get_link = ethtool_op_get_link,
+};
static int __devinit bmac_probe(struct macio_dev *mdev, const struct of_device_id *match)
{
@@ -1311,6 +1323,7 @@ static int __devinit bmac_probe(struct m
dev->open = bmac_open;
dev->stop = bmac_close;
+ dev->ethtool_ops = &bmac_ethtool_ops;
dev->hard_start_xmit = bmac_output;
dev->get_stats = bmac_stats;
dev->set_multicast_list = bmac_set_multicast;
^ permalink raw reply
* Re: [XFRM] policy: Replace magic number with XFRM_POLICY_OUT
From: David Miller @ 2007-08-25 20:47 UTC (permalink / raw)
To: tgraf; +Cc: netdev
In-Reply-To: <20070825105341.GB894@postel.suug.ch>
From: Thomas Graf <tgraf@suug.ch>
Date: Sat, 25 Aug 2007 12:53:41 +0200
> Signed-off-by: Thomas Graf <tgraf@suug.ch>
Applied, thanks Thomas.
^ permalink raw reply
* [PATCH 00/10] SFQ: backport some features from ESFQ (try 3)
From: Corey Hickey @ 2007-08-25 22:26 UTC (permalink / raw)
To: netdev
Patchset try 2 addresses the review by Michael Buesch.
Patchset try 3 addresses the review by Patrick McHardy.
The first 7 patches in this series resemble the corresponding 7 patches
I sent previously. There aren't any major changes--just modifications
to address errors noticed in review and slight reorganizations to make
the next patches easier.
Patches 8-10 implement parameter passing via nested compat attributes.
This is necessary for using 'tc qdisc change' to disable perturbation.
The rest of the parameters were added for consistency.
Iproute2 patches will follow shortly.
The following is the original patch text.
This set of patches adds some of ESFQ's modifications to the original
SFQ. Thus far, I have received support for this approach rather than for
trying to get ESFQ included as a separate qdisc.
http://mailman.ds9a.nl/pipermail/lartc/2007q2/021056.html
My patches here implement "tc qdisc change", user-configurable depth
(number of flows), and user-configurable divisor (for setting hash table
size). I've left out the remaining ESFQ features (usage of jhash and
different hashing methods) because Patrick McHardy intends to submit a
patch that will supersede that functionality; see the URL above.
Default values remain the same, and SFQ's default behavior remains the
same, so there should be no user disruption.
Thanks for your consideration,
Corey
include/linux/pkt_sched.h | 23 ++-
net/sched/sch_sfq.c | 356 ++++++++++++++++++++++++++++++--------------
2 files changed, 257 insertions(+), 122 deletions(-)
[PATCH 01/10] Preparatory refactoring part 1.
[PATCH 02/10] Preparatory refactoring part 2.
[PATCH 03/10] Move two functions.
[PATCH 04/10] Make "depth" (number of queues) user-configurable:
[PATCH 05/10] Add divisor.
[PATCH 06/10] Make qdisc changeable.
[PATCH 07/10] Remove comments about hardcoded values.
[PATCH 08/10] Multiply perturb_period by HZ when used rather than when assigned.
[PATCH 09/10] Change perturb_period to unsigned.
[PATCH 10/10] Use nested compat attributes to pass parameters.
^ permalink raw reply
* [PATCH 01/10] Preparatory refactoring part 1.
From: Corey Hickey @ 2007-08-25 22:26 UTC (permalink / raw)
To: netdev; +Cc: Corey Hickey
In-Reply-To: <11880808243166-git-send-email-bugfood-ml@fatooh.org>
Make a new function sfq_q_enqueue() that operates directly on the
queue data. This will be useful for implementing sfq_change() in
a later patch. A pleasant side-effect is reducing most of the
duplicate code in sfq_enqueue() and sfq_requeue().
Similarly, make a new function sfq_q_dequeue().
Signed-off-by: Corey Hickey <bugfood-ml@fatooh.org>
---
net/sched/sch_sfq.c | 72 +++++++++++++++++++++++++++------------------------
1 files changed, 38 insertions(+), 34 deletions(-)
diff --git a/net/sched/sch_sfq.c b/net/sched/sch_sfq.c
index 9579573..346e966 100644
--- a/net/sched/sch_sfq.c
+++ b/net/sched/sch_sfq.c
@@ -77,6 +77,9 @@
#define SFQ_DEPTH 128
#define SFQ_HASH_DIVISOR 1024
+#define SFQ_HEAD 0
+#define SFQ_TAIL 1
+
/* This type should contain at least SFQ_DEPTH*2 values */
typedef unsigned char sfq_index;
@@ -244,10 +247,9 @@ static unsigned int sfq_drop(struct Qdisc *sch)
return 0;
}
-static int
-sfq_enqueue(struct sk_buff *skb, struct Qdisc* sch)
+static void
+sfq_q_enqueue(struct sk_buff *skb, struct sfq_sched_data *q, unsigned int end)
{
- struct sfq_sched_data *q = qdisc_priv(sch);
unsigned hash = sfq_hash(q, skb);
sfq_index x;
@@ -256,8 +258,12 @@ sfq_enqueue(struct sk_buff *skb, struct Qdisc* sch)
q->ht[hash] = x = q->dep[SFQ_DEPTH].next;
q->hash[x] = hash;
}
- sch->qstats.backlog += skb->len;
- __skb_queue_tail(&q->qs[x], skb);
+
+ if (end == SFQ_TAIL)
+ __skb_queue_tail(&q->qs[x], skb);
+ else
+ __skb_queue_head(&q->qs[x], skb);
+
sfq_inc(q, x);
if (q->qs[x].qlen == 1) { /* The flow is new */
if (q->tail == SFQ_DEPTH) { /* It is the first flow */
@@ -270,6 +276,15 @@ sfq_enqueue(struct sk_buff *skb, struct Qdisc* sch)
q->tail = x;
}
}
+}
+
+static int
+sfq_enqueue(struct sk_buff *skb, struct Qdisc* sch)
+{
+ struct sfq_sched_data *q = qdisc_priv(sch);
+
+ sfq_q_enqueue(skb, q, SFQ_TAIL);
+ sch->qstats.backlog += skb->len;
if (++sch->q.qlen < q->limit-1) {
sch->bstats.bytes += skb->len;
sch->bstats.packets++;
@@ -284,45 +299,21 @@ static int
sfq_requeue(struct sk_buff *skb, struct Qdisc* sch)
{
struct sfq_sched_data *q = qdisc_priv(sch);
- unsigned hash = sfq_hash(q, skb);
- sfq_index x;
- x = q->ht[hash];
- if (x == SFQ_DEPTH) {
- q->ht[hash] = x = q->dep[SFQ_DEPTH].next;
- q->hash[x] = hash;
- }
+ sfq_q_enqueue(skb, q, SFQ_HEAD);
sch->qstats.backlog += skb->len;
- __skb_queue_head(&q->qs[x], skb);
- sfq_inc(q, x);
- if (q->qs[x].qlen == 1) { /* The flow is new */
- if (q->tail == SFQ_DEPTH) { /* It is the first flow */
- q->tail = x;
- q->next[x] = x;
- q->allot[x] = q->quantum;
- } else {
- q->next[x] = q->next[q->tail];
- q->next[q->tail] = x;
- q->tail = x;
- }
- }
if (++sch->q.qlen < q->limit - 1) {
sch->qstats.requeues++;
return 0;
}
- sch->qstats.drops++;
sfq_drop(sch);
return NET_XMIT_CN;
}
-
-
-
-static struct sk_buff *
-sfq_dequeue(struct Qdisc* sch)
+static struct
+sk_buff *sfq_q_dequeue(struct sfq_sched_data *q)
{
- struct sfq_sched_data *q = qdisc_priv(sch);
struct sk_buff *skb;
sfq_index a, old_a;
@@ -335,8 +326,6 @@ sfq_dequeue(struct Qdisc* sch)
/* Grab packet */
skb = __skb_dequeue(&q->qs[a]);
sfq_dec(q, a);
- sch->q.qlen--;
- sch->qstats.backlog -= skb->len;
/* Is the slot empty? */
if (q->qs[a].qlen == 0) {
@@ -353,6 +342,21 @@ sfq_dequeue(struct Qdisc* sch)
a = q->next[a];
q->allot[a] += q->quantum;
}
+
+ return skb;
+}
+
+static struct sk_buff
+*sfq_dequeue(struct Qdisc* sch)
+{
+ struct sfq_sched_data *q = qdisc_priv(sch);
+ struct sk_buff *skb;
+
+ skb = sfq_q_dequeue(q);
+ if (skb == NULL)
+ return NULL;
+ sch->q.qlen--;
+ sch->qstats.backlog -= skb->len;
return skb;
}
--
1.5.2.4
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